x86: Initial commit for running as a coreboot payload
Add a target for running u-boot as a coreboot payload in boards.cfg, a board, CPU and a config. This is a skeleton implementation which always reports the size of memory as 64 MB. Signed-off-by: Gabe Black <gabeblack@chromium.org>
This commit is contained in:
Gabe Black
Graeme Russ
parent
7b725f8485
commit
ef5a5b0049
55
arch/x86/cpu/coreboot/Makefile
Normal file
55
arch/x86/cpu/coreboot/Makefile
Normal file
@ -0,0 +1,55 @@
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#
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# Copyright (c) 2011 The Chromium OS Authors.
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#
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# (C) Copyright 2008
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# Graeme Russ, graeme.russ@gmail.com.
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2002
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# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
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||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB := $(obj)lib$(SOC).o
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COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o
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SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
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all: $(obj).depend $(LIB)
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$(LIB): $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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25
arch/x86/cpu/coreboot/asm-offsets.c
Normal file
25
arch/x86/cpu/coreboot/asm-offsets.c
Normal file
@ -0,0 +1,25 @@
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/*
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* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
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*
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* This program is used to generate definitions needed by
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* assembly language modules.
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*
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* We use the technique used in the OSF Mach kernel code:
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* generate asm statements containing #defines,
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* compile this file to assembler, and then extract the
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* #defines from the assembly-language output.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <common.h>
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#include <linux/kbuild.h>
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int main(void)
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{
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DEFINE(GENERATED_GD_RELOC_OFF, offsetof(gd_t, reloc_off));
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return 0;
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}
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29
arch/x86/cpu/coreboot/coreboot_car.S
Normal file
29
arch/x86/cpu/coreboot/coreboot_car.S
Normal file
@ -0,0 +1,29 @@
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/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* (C) Copyright 2010-2011
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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.section .text
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.globl car_init
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car_init:
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jmp car_init_ret
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39
arch/x86/cpu/coreboot/sdram.c
Normal file
39
arch/x86/cpu/coreboot/sdram.c
Normal file
@ -0,0 +1,39 @@
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/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* (C) Copyright 2010,2011
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* See file CREDITS for list of people who contributed to this
|
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* project.
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*
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* This program is free software; you can redistribute it and/or
|
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* modify it under the terms of the GNU General Public License as
|
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but without any warranty; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/u-boot-x86.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init_f(void)
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{
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gd->ram_size = 64*1024*1024;
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return 0;
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}
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int dram_init(void)
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{
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return 0;
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}
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53
board/chromebook-x86/coreboot/Makefile
Normal file
53
board/chromebook-x86/coreboot/Makefile
Normal file
@ -0,0 +1,53 @@
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#
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# Copyright (c) 2011 The Chromium OS Authors.
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# (C) Copyright 2008
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# Graeme Russ, graeme.russ@gmail.com.
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2002
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# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
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#
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# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS-y += coreboot.o
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COBJS-$(CONFIG_PCI) += coreboot_pci.o
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SOBJS-y += coreboot_start16.o
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SOBJS-y += coreboot_start.o
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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77
board/chromebook-x86/coreboot/coreboot.c
Normal file
77
board/chromebook-x86/coreboot/coreboot.c
Normal file
@ -0,0 +1,77 @@
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/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* (C) Copyright 2008
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* Graeme Russ, graeme.russ@gmail.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
|
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* modify it under the terms of the GNU General Public License as
|
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
|
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
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* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/u-boot-x86.h>
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#include <flash.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
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/*
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* Miscellaneous platform dependent initializations
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*/
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int board_early_init_f(void)
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{
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return 0;
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}
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int board_early_init_r(void)
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{
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/* CPU Speed to 100MHz */
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gd->cpu_clk = 100000000;
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/* Crystal is 33.000MHz */
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gd->bus_clk = 33000000;
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return 0;
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}
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void show_boot_progress(int val)
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{
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}
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int last_stage_init(void)
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{
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return 0;
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}
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#ifndef CONFIG_SYS_NO_FLASH
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ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
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{
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return 0;
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}
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#endif
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int board_eth_init(bd_t *bis)
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{
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return pci_eth_init(bis);
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}
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void setup_pcat_compatibility()
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{
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}
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30
board/chromebook-x86/coreboot/coreboot_pci.c
Normal file
30
board/chromebook-x86/coreboot/coreboot_pci.c
Normal file
@ -0,0 +1,30 @@
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/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* (C) Copyright 2008,2009
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*
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* See file CREDITS for list of people who contributed to this
|
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* project.
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*
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* This program is free software; you can redistribute it and/or
|
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* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
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* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
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* MA 02111-1307 USA
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*/
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void pci_init_board(void)
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{
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}
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29
board/chromebook-x86/coreboot/coreboot_start.S
Normal file
29
board/chromebook-x86/coreboot/coreboot_start.S
Normal file
@ -0,0 +1,29 @@
|
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/*
|
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* Copyright (c) 2011 The Chromium OS Authors.
|
||||
* (C) Copyright 2008
|
||||
* Graeme Russ, graeme.russ@gmail.com.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
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|
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/* board early intialization */
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.globl early_board_init
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early_board_init:
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/* No 32-bit board specific initialisation */
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jmp early_board_init_ret
|
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46
board/chromebook-x86/coreboot/coreboot_start16.S
Normal file
46
board/chromebook-x86/coreboot/coreboot_start16.S
Normal file
@ -0,0 +1,46 @@
|
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/*
|
||||
* Copyright (c) 2011 The Chromium OS Authors.
|
||||
* (C) Copyright 2008
|
||||
* Graeme Russ, graeme.russ@gmail.com.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
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|
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/*
|
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* 16bit initialization code.
|
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* This code have to map the area of the boot flash
|
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* that is used by U-boot to its final destination.
|
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*/
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|
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.text
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.section .start16, "ax"
|
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.code16
|
||||
.globl board_init16
|
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board_init16:
|
||||
jmp board_init16_ret
|
||||
|
||||
.section .bios, "ax"
|
||||
.code16
|
||||
.globl realmode_reset
|
||||
.hidden realmode_reset
|
||||
.type realmode_reset, @function
|
||||
realmode_reset:
|
||||
|
||||
1: hlt
|
||||
jmp 1
|
||||
@ -1007,6 +1007,7 @@ gr_cpci_ax2000 sparc leon3 - gaisler
|
||||
gr_ep2s60 sparc leon3 - gaisler
|
||||
grsim sparc leon3 - gaisler
|
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gr_xc3s_1500 sparc leon3 - gaisler
|
||||
coreboot-x86 x86 x86 coreboot chromebook-x86 coreboot coreboot:SYS_TEXT_BASE=0xFC0000
|
||||
eNET x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x38040000
|
||||
eNET_SRAM x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x19000000
|
||||
# Target ARCH CPU Board name Vendor SoC Options
|
||||
|
||||
225
include/configs/coreboot.h
Normal file
225
include/configs/coreboot.h
Normal file
@ -0,0 +1,225 @@
|
||||
/*
|
||||
* Copyright (c) 2011 The Chromium OS Authors.
|
||||
* (C) Copyright 2008
|
||||
* Graeme Russ, graeme.russ@gmail.com.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <asm/ibmpc.h>
|
||||
/*
|
||||
* board/config.h - configuration options, board specific
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
* (easy to change)
|
||||
*/
|
||||
#define CONFIG_SYS_COREBOOT
|
||||
#undef CONFIG_SHOW_BOOT_PROGRESS
|
||||
#define CONFIG_LAST_STAGE_INIT
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Watchdog Configuration
|
||||
*/
|
||||
#undef CONFIG_WATCHDOG
|
||||
#undef CONFIG_HW_WATCHDOG
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Real Time Clock Configuration
|
||||
*/
|
||||
#define CONFIG_RTC_MC146818
|
||||
#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Serial Configuration
|
||||
*/
|
||||
#define CONFIG_SERIAL_MULTI
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_SYS_NS16550
|
||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE 1
|
||||
#define CONFIG_SYS_NS16550_CLK 1843200
|
||||
#define CONFIG_BAUDRATE 9600
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \
|
||||
9600, 19200, 38400, 115200}
|
||||
#define CONFIG_SYS_NS16550_COM1 UART0_BASE
|
||||
#define CONFIG_SYS_NS16550_COM2 UART1_BASE
|
||||
#define CONFIG_SYS_NS16550_PORT_MAPPED
|
||||
|
||||
/* max. 1 IDE bus */
|
||||
#define CONFIG_SYS_IDE_MAXBUS 1
|
||||
/* max. 1 drive per IDE bus */
|
||||
#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1)
|
||||
|
||||
#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
|
||||
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
|
||||
#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170
|
||||
#define CONFIG_SYS_ATA_DATA_OFFSET 0
|
||||
#define CONFIG_SYS_ATA_REG_OFFSET 0
|
||||
#define CONFIG_SYS_ATA_ALT_OFFSET 0x200
|
||||
|
||||
|
||||
#define CONFIG_SUPPORT_VFAT
|
||||
/************************************************************
|
||||
* ATAPI support (experimental)
|
||||
************************************************************/
|
||||
#define CONFIG_ATAPI
|
||||
|
||||
/************************************************************
|
||||
* DISK Partition support
|
||||
************************************************************/
|
||||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_MAC_PARTITION
|
||||
#define CONFIG_ISO_PARTITION /* Experimental */
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Video Configuration
|
||||
*/
|
||||
#undef CONFIG_VIDEO
|
||||
#undef CONFIG_CFB_CONSOLE
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Command line configuration.
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_BDI
|
||||
#define CONFIG_CMD_BOOTD
|
||||
#define CONFIG_CMD_CONSOLE
|
||||
#define CONFIG_CMD_DATE
|
||||
#define CONFIG_CMD_ECHO
|
||||
#undef CONFIG_CMD_FLASH
|
||||
#define CONFIG_CMD_FPGA
|
||||
#define CONFIG_CMD_IMI
|
||||
#undef CONFIG_CMD_IMLS
|
||||
#define CONFIG_CMD_IRQ
|
||||
#define CONFIG_CMD_ITEST
|
||||
#define CONFIG_CMD_LOADB
|
||||
#define CONFIG_CMD_LOADS
|
||||
#define CONFIG_CMD_MEMORY
|
||||
#define CONFIG_CMD_MISC
|
||||
#define CONFIG_CMD_NET
|
||||
#undef CONFIG_CMD_NFS
|
||||
#define CONFIG_CMD_PCI
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_RUN
|
||||
#define CONFIG_CMD_SAVEENV
|
||||
#define CONFIG_CMD_SETGETDCR
|
||||
#define CONFIG_CMD_SOURCE
|
||||
#define CONFIG_CMD_XIMG
|
||||
#define CONFIG_CMD_IDE
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_EXT2
|
||||
|
||||
#define CONFIG_BOOTDELAY 2
|
||||
#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
|
||||
|
||||
#if defined(CONFIG_CMD_KGDB)
|
||||
#define CONFIG_KGDB_BAUDRATE 115200
|
||||
#define CONFIG_KGDB_SER_INDEX 2
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_PROMPT "boot > "
|
||||
#define CONFIG_SYS_CBSIZE 256
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||
sizeof(CONFIG_SYS_PROMPT) + \
|
||||
16)
|
||||
#define CONFIG_SYS_MAXARGS 16
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x00100000
|
||||
#define CONFIG_SYS_MEMTEST_END 0x01000000
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x100000
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
#define CONFIG_SYS_X86_ISR_TIMER
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* SDRAM Configuration
|
||||
*/
|
||||
#define CONFIG_NR_DRAM_BANKS 4
|
||||
|
||||
/* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
|
||||
#undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
|
||||
#undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
|
||||
#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
|
||||
#undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* CPU Features
|
||||
*/
|
||||
|
||||
#define CONFIG_SYS_GENERIC_TIMER
|
||||
#define CONFIG_SYS_PCAT_INTERRUPTS
|
||||
#define CONFIG_SYS_NUM_IRQS 16
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Memory organization:
|
||||
* 32kB Stack
|
||||
* 16kB Cache-As-RAM @ 0x19200000
|
||||
* 256kB Monitor
|
||||
* (128kB + Environment Sector Size) malloc pool
|
||||
*/
|
||||
#define CONFIG_SYS_STACK_SIZE (32 * 1024)
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (256 * 1024 + 16 * 1024)
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
|
||||
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
|
||||
#define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024)
|
||||
/* Address of temporary Global Data */
|
||||
#define CONFIG_SYS_INIT_GD_ADDR (256 * 1024)
|
||||
|
||||
|
||||
/* allow to overwrite serial and ethaddr */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH configuration
|
||||
*/
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#undef CONFIG_FLASH_CFI_DRIVER
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 1
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Environment configuration
|
||||
*/
|
||||
#define CONFIG_ENV_IS_NOWHERE
|
||||
#define CONFIG_ENV_SIZE 0x01000
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* PCI configuration
|
||||
*/
|
||||
#define CONFIG_PCI
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Network device support
|
||||
*/
|
||||
#define CONFIG_NET_MULTI
|
||||
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
@ -32,7 +32,7 @@ extern struct serial_device *default_serial_console(void);
|
||||
defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) || \
|
||||
defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
|
||||
defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) || \
|
||||
defined(CONFIG_TEGRA2)
|
||||
defined(CONFIG_TEGRA2) || defined(CONFIG_SYS_COREBOOT)
|
||||
extern struct serial_device serial0_device;
|
||||
extern struct serial_device serial1_device;
|
||||
#if defined(CONFIG_SYS_NS16550_SERIAL)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user