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u-boot/drivers/spi/Kconfig

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Convert CONFIG_SPI to Kconfig This converts the following to Kconfig: CONFIG_SPI This partly involves updating code that assumes that CONFIG_SPI implies things that are specific to the MPC8xx SPI driver. For now, just update the CONFIG tests. This also involves reworking the default for CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a reasonable default, as it does not cause any compile failures. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-15 17:51:26 +00:00
menuconfig SPI
bool "SPI Support"
spi: Kconfig: Add help text Add detailed help text for SPI support. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-16 12:34:13 +00:00
help
The "Serial Peripheral Interface" is a low level synchronous
protocol. Chips that support SPI can have data transfer rates
up to several tens of Mbit/sec. Chips are addressed with a
controller and a chipselect. Most SPI slaves don't support
dynamic device discovery; some are even write-only or read-only.
SPI is widely used by microcontrollers to talk with sensors,
eeprom and flash memory, codecs and various other controller
chips, analog to digital (and d-to-a) converters, and more.
MMC and SD cards can be accessed using SPI protocol; and for
DataFlash cards used in MMC sockets, SPI must always be used.
SPI is one of a family of similar protocols using a four wire
interface (select, clock, data in, data out) including Microwire
(half duplex), SSP, SSI, and PSP. This driver framework should
work with most such devices and controllers.
Convert CONFIG_SPI to Kconfig This converts the following to Kconfig: CONFIG_SPI This partly involves updating code that assumes that CONFIG_SPI implies things that are specific to the MPC8xx SPI driver. For now, just update the CONFIG tests. This also involves reworking the default for CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a reasonable default, as it does not cause any compile failures. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-15 17:51:26 +00:00
if SPI
spi: Add Kconfig menu entry Added Kconfig menu ... endmenu enties for spi support. Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-06-27 17:05:14 +00:00
dm: add entries to Kconfig Create entries of CONFIG_DM, CONFIG_DM_SERIAL, CONFIG_DM_GPIO and CONFIG_DM_SPI. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
2014-10-23 13:26:09 +00:00
config DM_SPI
bool "Enable Driver Model for SPI drivers"
depends on DM
help
dm: Expand and complete Kconfig in drivers/ Expand the help messages for each driver. Add missing Kconfig for I2C, SPI flash and thermal. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-02-06 04:41:35 +00:00
Enable driver model for SPI. The SPI slave interface
(spi_setup_slave(), spi_xfer(), etc.) is then implemented by
the SPI uclass. Drivers provide methods to access the SPI
buses that they control. The uclass interface is defined in
include/spi.h. The existing spi_slave structure is attached
as 'parent data' to every slave on each bus. Slaves
typically use driver-private data instead of extending the
spi_slave structure.
sandbox: Move CONFIG_SANDBOX_SPI to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-03-06 20:19:05 +00:00
spi: Extend the core to ease integration of SPI memory controllers Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the current spi_controller model and usually have drivers placed in drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI memories in general. This is an attempt at defining a SPI memory interface which works for all kinds of SPI memories (NORs, NANDs, SRAMs). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-08-16 15:30:11 +00:00
config SPI_MEM
bool "SPI memory extension"
help
Enable this option if you want to enable the SPI memory extension.
This extension is meant to simplify interaction with SPI memories
by providing an high-level interface to send memory-like commands.
spi-mem: Add dirmap API from Linux This adds the dirmap API originally introduced in Linux commit aa167f3fed0c ("spi: spi-mem: Add a new API to support direct mapping"). This also includes several follow-up patches and fixes. Changes from Linux include: * Added Kconfig option * Changed struct device to struct udevice * Changed struct spi_mem to struct spi_slave This patch is obtained from the following patch https://patchwork.ozlabs.org/project/uboot/patch/20210205043924.149504-3-seanga2@gmail.com/ The corresponding Linux kernel SHA1 is aa167f3fed0c. Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> Signed-off-by: Sean Anderson <seanga2@gmail.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
2022-08-19 09:01:08 +00:00
config SPI_DIRMAP
bool "SPI direct mapping"
depends on SPI_MEM
help
Enable the SPI direct mapping API. Most modern SPI controllers can
directly map a SPI memory (or a portion of the SPI memory) in the CPU
address space. Most of the time this brings significant performance
improvements as it automates the whole process of sending SPI memory
operations every time a new region is accessed.
spi: Add non DM version of SPI_MEM Add non DM version of SPI_MEM to support easy migration to new SPI NOR framework. This can be removed once DM_SPI conversion is complete. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-05 05:59:15 +00:00
if DM_SPI
spi : convert altera_spi to driver model Convert altera_spi to driver model Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-10-14 00:33:34 +00:00
config ALTERA_SPI
bool "Altera SPI driver"
help
Enable the Altera SPI driver. This driver can be used to
access the SPI NOR flash on platforms embedding this Altera
IP core. Please find details on the "Embedded Peripherals IP
User Guide" of Altera.
spi: apple: Add driver for Apple SPI controller Add a driver for the SPI controller integrated on Apple SoCs. This is necessary to support the keyboard on Apple Silicon laopts since their keyboard uses an Apple-specific HID over SPI protocol. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested on: Macbook Air M1 Tested-by: Simon Glass <sjg@chromium.org>
2022-01-23 15:48:12 +00:00
config APPLE_SPI
bool "Apple SPI driver"
default y if ARCH_APPLE
help
Enable the Apple SPI driver. This driver can be used to
access the SPI flash and keyboard on machines based on Apple SoCs.
spi: atcspi200: Drop non-dm code Boards adp-ae3xx_defconfig, nx25-ae250_defconfig already enabled DM_SPI, so non-dm code make no use of it hence droped. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-07 05:03:33 +00:00
config ATCSPI200_SPI
bool "Andestech ATCSPI200 SPI driver"
help
Enable the Andestech ATCSPI200 SPI driver. This driver can be
used to access the SPI flash on AE3XX and AE250 platforms embedding
this Andestech IP core.
drivers: spi: add spi support for QCA/Atheros ath79 SOCs This patch add a compatible spi driver for ath79 series SOC. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-03-16 08:59:58 +00:00
config ATH79_SPI
bool "Atheros SPI driver"
depends on ARCH_ATH79
help
Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used
to access SPI NOR flash and other SPI peripherals. This driver
uses driver model and requires a device tree binding to operate.
please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
spi: Add Atmel QuadSPI driver Backport the driver from linux v5.1-rc5 and adapt it for u-boot. Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-18 08:51:50 +00:00
config ATMEL_QSPI
bool "Atmel Quad SPI Controller"
depends on ARCH_AT91
help
Enable the Atmel Quad SPI controller in master mode. This driver
does not support generic SPI. The implementation supports only the
spi-mem interface.
dm: at91: Add driver model support for the spi driver Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-28 06:17:49 +00:00
config ATMEL_SPI
bool "Atmel SPI driver"
spi: atmel: default y if DM_SPI && ARCH_AT91 ATMEL_SPI is now fully converted to driver-model and respective boards switch to DM_SPI as well, so make default y for ARCH_AT91 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Wenyou Yang <wenyouya@gmail.com>
2018-03-14 13:16:44 +00:00
default y if ARCH_AT91
dm: at91: Add driver model support for the spi driver Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-28 06:17:49 +00:00
help
This enables driver for the Atmel SPI Controller, present on
avr32: Retire AVR32 for good AVR32 is gone. It's already more than two years for no support in Buildroot, even longer there is no support in GCC (last version is heavily patched 4.2.4). Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully). There is no good point to keep this support in U-Boot either. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-07-05 13:25:22 +00:00
many AT91 (ARM) chips. This driver can be used to access
the SPI Flash, such as AT25DF321.
dm: at91: Add driver model support for the spi driver Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-28 06:17:49 +00:00
dm: spi: add BCM63xx HSSPI driver This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-20 01:13:38 +00:00
config BCM63XX_HSSPI
bool "BCM63XX HSSPI driver"
spi: bcm63xx-hsspi: allow to use this driver on arm bcm68360 This IP is also used on some arm SoC, so we allow to use it on arm bcm68360 too. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-07 19:14:12 +00:00
depends on (ARCH_BMIPS || ARCH_BCM68360 || \
ARCH_BCM6858 || ARCH_BCM63158)
dm: spi: add BCM63xx HSSPI driver This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-20 01:13:38 +00:00
help
Enable the BCM6328 HSSPI driver. This driver can be used to
access the SPI NOR flash on platforms embedding this Broadcom
SPI core.
dm: spi: add BCM63xx SPI driver This driver is a simplified version of linux/drivers/spi/spi-bcm63xx.c Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-23 16:14:58 +00:00
config BCM63XX_SPI
bool "BCM6348 SPI driver"
depends on ARCH_BMIPS
help
Enable the BCM6348/BCM6358 SPI driver. This driver can be used to
access the SPI NOR flash on platforms embedding these Broadcom
SPI cores.
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com>
2018-06-08 21:59:45 +00:00
config BCMSTB_SPI
bool "BCMSTB SPI driver"
help
Enable the Broadcom set-top box SPI driver. This driver can
be used to access the SPI flash on platforms embedding this
Broadcom SPI core.
spi: ca_sflash: Add CAxxxx SPI Flash Controller Add SPI Flash controller driver for Cortina Access CAxxxx SoCs Signed-off-by: Pengpeng Chen <pengpeng.chen@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Vignesh R <vigneshr@ti.com> CC: Tom Rini <trini@konsulko.com> [jagan: rebase on master] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-30 19:52:45 +00:00
config CORTINA_SFLASH
bool "Cortina-Access Serial Flash controller driver"
depends on DM_SPI && SPI_MEM
help
Enable the Cortina-Access Serial Flash controller driver. This driver
can be used to access the SPI NOR/NAND flash on platforms embedding this
Cortina-Access IP core.
spi: Kconfig: Show dm-spi drivers if DM_SPI set DM supported spi drivers are enbled only when DM_SPI enabled, so added DM_SPI if condition in Kconfig to show thoese only when it enabled. Also re-order the config items as incresing alphabetic order. Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-06-27 17:07:00 +00:00
config CADENCE_QSPI
bool "Cadence QSPI driver"
help
Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
used to access the SPI NOR flash on platforms embedding this
Cadence IP core.
spi: cadence_qspi: Migrate CONFIG_CQSPI_REF_CLK to Kconfig This is a little tricky since SoCFPGA has code to determine this as runtime. Introduce a guard variable for platforms to select if they have a static value to use. Then for ARCH_SOCFPGA, call cm_get_qspi_controller_clk_hz() and otherwise continue the previous behavior. Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-30 22:07:23 +00:00
config HAS_CQSPI_REF_CLK
bool "Cadence QSPI static reference clock"
depends on CADENCE_QSPI
config CQSPI_REF_CLK
int "Cadence QSPI reference clock value in Hz"
depends on HAS_CQSPI_REF_CLK
arm64: versal: Add versal specific cadence ospi driver Add support for cadence ospi driver for Versal platform. This driver provides support for DMA read operation which utilizes cadence qspi driver. If "cdns,is-dma" DT property is specified use dma for read operation from cadence_qspi driver. As cadence_qspi_apb_dma_read() is defined in cadence_ospi_versal driver add a weak function defination in cadence_qspi driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/20220512100535.16364-3-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-05-12 10:05:32 +00:00
config CADENCE_OSPI_VERSAL
bool "Configure Versal OSPI"
spi: cadence_qspi: Add support for Versal NET platform Trivial changes to support cadence ospi driver for Versal NET platform. Also avoid ospi flash reset for now. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/0789141f432189aab69bc496fe33e0218d1d7510.1663589964.git.michal.simek@amd.com
2022-09-19 12:21:03 +00:00
depends on (ARCH_VERSAL || ARCH_VERSAL_NET) && CADENCE_QSPI
arm64: versal: Add versal specific cadence ospi driver Add support for cadence ospi driver for Versal platform. This driver provides support for DMA read operation which utilizes cadence qspi driver. If "cdns,is-dma" DT property is specified use dma for read operation from cadence_qspi driver. As cadence_qspi_apb_dma_read() is defined in cadence_ospi_versal driver add a weak function defination in cadence_qspi driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/20220512100535.16364-3-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-05-12 10:05:32 +00:00
imply DM_GPIO
help
This option is used to enable Versal OSPI DMA operations which
are used for ospi flash read using cadence qspi controller.
drivers: spi: cf_spi: add Kconfig option This patch adds cf_spi DM Kconfig option. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2019-03-13 20:46:46 +00:00
config CF_SPI
bool "ColdFire SPI driver"
help
Enable the ColdFire SPI driver. This driver can be used on
some m68k SoCs.
spi: davinci: Drop non-dm code Now all boards which are using davinci SPI driver have moved to SPL_DM so drop the unneeded non-dm code. Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2020-05-26 08:04:26 +00:00
config DAVINCI_SPI
bool "Davinci & Keystone SPI driver"
depends on ARCH_DAVINCI || ARCH_KEYSTONE
help
Enable the Davinci SPI driver
spi: Kconfig: Show dm-spi drivers if DM_SPI set DM supported spi drivers are enbled only when DM_SPI enabled, so added DM_SPI if condition in Kconfig to show thoese only when it enabled. Also re-order the config items as incresing alphabetic order. Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-06-27 17:07:00 +00:00
config DESIGNWARE_SPI
bool "Designware SPI driver"
help
Enable the Designware SPI driver. This driver can be used to
access the SPI NOR flash on platforms embedding this Designware
IP core.
spi: Kconfig: Add EXYNOS_SPI entry Added EXYNOS_SPI entry on Kconfig with help description. Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-06-27 10:02:19 +00:00
config EXYNOS_SPI
bool "Samsung Exynos SPI driver"
help
Enable the Samsung Exynos SPI driver. This driver can be used to
access the SPI NOR flash on platforms embedding this Samsung
Exynos IP core.
spi: Kconfig: Add FSL_DSPI entry Added FSL_DSPI entry on Kconfig with help description. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Haikun Wang <haikun.wang@freescale.com>
2015-06-27 08:47:06 +00:00
config FSL_DSPI
bool "Freescale DSPI driver"
help
Enable the Freescale DSPI driver. This driver can be used to
access the SPI NOR flash and SPI Data flash on platforms embedding
this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
use this driver.
spi: Kconfig: Move MSCC_BB_SPI, FSL_QSPI into DM_SPI - MSCC_BB_SPI - FSL_QSPI Both are fully dm-driven, let's move them into DM_SPI side definition. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-25 18:54:19 +00:00
config FSL_QSPI
bool "Freescale QSPI driver"
imply SPI_FLASH_BAR
help
Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
used to access the SPI NOR flash on platforms embedding this
Freescale IP core.
spi: fsl_qspi: Support to use full AHB space on i.MX i.MX platforms provide large AHB mapped space for QSPI, each controller has 256MB. However, current driver only maps small size (AHB buffer size) of AHB space, this implementation causes i.MX failed to boot M4 with QSPI XIP image. Add config CONFIG_FSL_QSPI_AHB_FULL_MAP (default enabled for i.MX) to address above problem. When the config is set: 1. Full AHB space is divided to each CS. 2. A dedicated LUT entry is used for AHB read only. 3. The MODE instruction in LUT is replaced to standard ADDR instruction 4. The address in spi_mem_op is used to SFAR and AHB read Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2020-06-09 07:59:06 +00:00
config FSL_QSPI_AHB_FULL_MAP
bool "Use full AHB memory map space"
depends on FSL_QSPI
default y if ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_IMX8M
help
Enable the Freescale QSPI driver to use full AHB memory map space for
flash access.
spi: gxp_spi: Add GXP SPI controller driver The GXP supports 3 separate SPI interfaces to accommodate the system flash, core flash, and other functions. The SPI engine supports variable clock frequency, selectable 3-byte or 4-byte addressing and a configurable x1, x2, and x4 command/address/data modes. The memory buffer for reading and writing ranges between 256 bytes and 8KB. This driver supports access to the core flash. Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-08 21:21:36 +00:00
config GXP_SPI
bool "SPI driver for GXP"
imply SPI_FLASH_BAR
help
Enable support for SPI on GXP.
spi: Kconfig: Add ICH_SPI entry Added ICH_SPI entry on Kconfig with help description. Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-06-27 10:13:27 +00:00
config ICH_SPI
bool "Intel ICH SPI driver"
help
Enable the Intel ICH SPI driver. This driver can be used to
access the SPI NOR flash on platforms embedding this Intel
ICH IP core.
driver: spi: add bcm iproc qspi support IPROC qspi driver supports both BSPI and MSPI modes. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Roman Bacik <roman.bacik@broadcom.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-02-09 22:16:13 +00:00
config IPROC_QSPI
bool "Broadcom iProc QSPI Flash Controller driver"
help
Enable Broadcom iProc QSPI Flash Controller driver.
This driver can be used to access the SPI NOR flash.
spi: kirkwood: Drop nondm code Drop the nondm code from kirkwood_spi.c since there is no board or any other code using for it. Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-18 17:45:13 +00:00
config KIRKWOOD_SPI
bool "Marvell Kirkwood SPI Driver"
help
Enable support for SPI on various Marvell SoCs, such as
Kirkwood and Armada 375.
spi: Add Amlogic Meson SPI Flash Controller driver The Amlogic Meson SoCs embeds a Flash oriented SPI Controller name SPIFC. This driver, ported from the Linux meson-spi-spifc driver, add support for this controller on the Amlogic Meson GX SoCs in U-Boot. Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-22 10:01:05 +00:00
config MESON_SPIFC
bool "Amlogic Meson SPI Flash Controller driver"
depends on ARCH_MESON
help
Enable the Amlogic Meson SPI Flash Controller SPIFC) driver.
This driver can be used to access the SPI NOR flash chips on
Amlogic Meson SoCs.
spi: mpc8xx: Migrate to DM_SPI Drop non-dm code and migrate into DM_SPI. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> [jagan: Move config menu in DM_SPI area] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-11-21 08:51:57 +00:00
config MPC8XX_SPI
bool "MPC8XX SPI Driver"
depends on MPC8xx
help
Enable support for SPI on MPC8XX
spi: mpc8xxx: Convert to DM Support DM in the MPC8xxx SPI driver, and remove the legacy SPI interface. Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-28 20:28:53 +00:00
config MPC8XXX_SPI
bool "MPC8XXX SPI Driver"
help
Enable support for SPI on the MPC8XXX PowerPC SoCs.
spi: Kconfig: Move MSCC_BB_SPI, FSL_QSPI into DM_SPI - MSCC_BB_SPI - FSL_QSPI Both are fully dm-driven, let's move them into DM_SPI side definition. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-25 18:54:19 +00:00
config MSCC_BB_SPI
bool "MSCC bitbang SPI driver"
depends on SOC_VCOREIII
help
Enable MSCC bitbang SPI driver. This driver can be used on
MSCC SOCs.
spi: add spi controller support for MediaTek MT7620 SoC This patch adds spi controller support for MediaTek MT7620 SoC. The SPI controller supports two chip selects. These two chip selects are implemented as two separate register groups, but they share the same bus (DI/DO/CLK), only CS pins are dedicated for each register group. Appearently these two register groups cannot operates simulataneously so they are implemented as one controller. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-11-12 08:36:42 +00:00
config MT7620_SPI
bool "MediaTek MT7620 SPI driver"
depends on SOC_MT7620
help
Enable the MT7620 SPI driver. This driver can be used to access
generic SPI devices on MediaTek MT7620 SoC.
spi: Add SPI driver for MT76xx SoCs This patch adds the SPI driver for the MediaTek MT7688 SoC (and derivates). Its been tested on the LinkIt Smart 7688 and the Gardena Smart Gateway with and SPI NOR on CS0 and on the Gardena Smart Gateway additionally with an SPI NAND on CS1. Note that the SPI controller only supports a max transfer size of 32 bytes. This driver implementes a workaround to enable bigger xfer sizes to speed up the transfer especially for the SPI NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jagan Teki <jagan@openedev.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Piotr Dymacz <pepe2k@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-16 08:48:48 +00:00
config MT7621_SPI
bool "MediaTek MT7621 SPI driver"
spi: add support for MediaTek MT7621 SoC This patch makes mt7621_spi driver available for MediaTek MT7621 SoC Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-05-20 03:23:08 +00:00
depends on SOC_MT7621 || SOC_MT7628
spi: Add SPI driver for MT76xx SoCs This patch adds the SPI driver for the MediaTek MT7688 SoC (and derivates). Its been tested on the LinkIt Smart 7688 and the Gardena Smart Gateway with and SPI NOR on CS0 and on the Gardena Smart Gateway additionally with an SPI NAND on CS1. Note that the SPI controller only supports a max transfer size of 32 bytes. This driver implementes a workaround to enable bigger xfer sizes to speed up the transfer especially for the SPI NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jagan Teki <jagan@openedev.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Piotr Dymacz <pepe2k@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-16 08:48:48 +00:00
help
Enable the MT7621 SPI driver. This driver can be used to access
the SPI NOR flash on platforms embedding this Ralink / MediaTek
SPI core, like MT7621/7628/7688.
spi: mtk_snor: add support for MTK SPI NOR controller This patch adds support for MTK SPI NOR controller, which you can see on mt7622 & mt7629. 1. This controller is designed only for SPI NOR. We can't adjust its bus clock dynamically. Set clock in dts instead. 2. This controller only supports 1-1-1 write mode. 3. Remove mtk_snor_match_read() since upper SPI-MEM layer already handles command. 4. sf read/write/update commands are tested with this driver. Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
2021-01-20 07:31:33 +00:00
config MTK_SNOR
bool "Mediatek SPI-NOR controller driver"
depends on SPI_MEM
help
Enable the Mediatek SPINOR controller driver. This driver has
better read/write performance with NOR.
spi: add spi-mem driver for MediaTek MT7629 SoC This patch adds spi-mem driver for MediaTek MT7629 SoC to access SPI-NOR and SPI-NAND flashes. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> [jagan: squash MAINTAINERS file] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-22 11:39:01 +00:00
config MTK_SNFI_SPI
bool "Mediatek SPI memory controller driver"
depends on SPI_MEM
help
Enable the Mediatek SPI memory controller driver. This driver is
originally based on the MediaTek SNFI IP core. It can only be
used to access SPI memory devices like SPI-NOR or SPI-NAND on
platforms embedding this IP core, like MT7622/M7629.
spi: Add driver for Marvell Armada 3700 SoC The SPI IP core in the Marvell Armada 3700 is similar to the one in the other Armada SoCs. But the differences are big enough that it makes sense to introduce a new driver instead of cluttering the old kirkwood driver with #ifdef's. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-05-19 13:56:44 +00:00
config MVEBU_A3700_SPI
bool "Marvell Armada 3700 SPI driver"
spi: mvebu_a3700_spi: Use Armada 37xx clk driver for SPI clock frequency Since now we have driver for clocks on Armada 37xx, use it to determine SQF clock frequency for the SPI driver. Also change the default config files for Armada 37xx devices so that the clock driver is enabled by default, otherwise the SPI driver cannot be enabled. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2018-04-24 15:21:26 +00:00
select CLK_ARMADA_3720
spi: Add driver for Marvell Armada 3700 SoC The SPI IP core in the Marvell Armada 3700 is similar to the one in the other Armada SoCs. But the differences are big enough that it makes sense to introduce a new driver instead of cluttering the old kirkwood driver with #ifdef's. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-05-19 13:56:44 +00:00
help
Enable the Marvell Armada 3700 SPI driver. This driver can be
used to access the SPI NOR flash on platforms embedding this
Marvell IP core.
spi: mxs: Drop nondm code Deadline for DM migration already passed by months and no response on full dm conversation hence removed the nondm code. Note: Look like there is no user for nondm code for this driver. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-25 17:54:23 +00:00
config MXS_SPI
bool "MXS SPI Driver"
help
Enable the MXS SPI controller driver. This driver can be used
on the i.MX23 and i.MX28 SoCs.
spi: Add MXIC controller driver Add a driver for Macronix SPI controller IP. This patch referred from linux spi-mxic.c. The difference from the linux version is described here. 1. To adapt uboot spi framework, modify some functions naming. 2. Remove the incompatible functions of Uboot. 3. Add dummy byte recalculattion function to support dummy buswidth not align data buswidth operation.(ex: 1-1-4, 1-1-8) 4. Add Octal mode support. Signed-off-by: Zhengxun <zhengxunli.mxic@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [jagan: fixed file permission, comment line, kconfig] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-23 17:15:15 +00:00
config SPI_MXIC
bool "Macronix MX25F0A SPI controller"
help
Enable the Macronix MX25F0A SPI controller driver. This driver
can be used to access the SPI flash on platforms embedding
this Macronix IP core.
spi: npcm-fiu: add NPCM7xx FIU controller driver Add Nuvoton NPCM BMC Flash Interface Unit(FIU) SPI master controller driver using SPI-MEM interface. The FIU supports single, dual or quad communication interface. The FIU controller driver provides flash access in UMA(User Mode Access) mode by using an indirect address/data mechanism. the dts node is followed upstream kernel dts name. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Signed-off-by: Stanley Chu <yschu@nuvoton.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [Jagan: fixed the Kconfig, Makefile order] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2022-04-26 08:52:45 +00:00
config NPCM_FIU_SPI
bool "FIU driver for Nuvoton NPCM SoC"
help
This enables support for the Flash Interface Unit SPI controller
in master mode.
spi: nxp_fspi: new driver for the FlexSPI controller This is a port of the kernel's spi-nxp-fspi driver. It uses the new spi-mem interface and does not expose the more generic spi-xfer interface. The source was taken from the v5.3-rc3 tag. The port was straightforward: - remove the interrupt handling and the completion by busy polling the controller - remove locks - move the setup of the memory windows into claim_bus() - move the setup of the speed into set_speed() - port the device tree bindings from the original fspi_probe() to ofdata_to_platdata() There were only some style change fixes, no change in any logic. For example, there are busy loops where the return code is not handled correctly, eg. only prints a warning with WARN_ON(). This port intentionally left most functions unchanged to ease future bugfixes. This was tested on a custom LS1028A board. Because the LS1028A doesn't have proper clock framework support, changing the clock speed was not tested. This also means that it is not possible to change the SPI speed on LS1028A for now (neither is it possible in the linux driver). Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2019-12-17 23:09:58 +00:00
config NXP_FSPI
bool "NXP FlexSPI driver"
depends on SPI_MEM
help
Enable the NXP FlexSPI (FSPI) driver. This driver can be used to
access the SPI NOR flash on platforms embedding this NXP IP core.
drivers: spi: Add SPI controller driver for Octeon Adds support for SPI controllers found on Octeon II/III and Octeon TX TX2 SoC platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-07-30 11:56:18 +00:00
config OCTEON_SPI
bool "Octeon SPI driver"
pci: Drop DM_PCI This option has not effect now. Drop it, using PCI instead where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02 00:54:44 +00:00
depends on ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2
drivers: spi: Add SPI controller driver for Octeon Adds support for SPI controllers found on Octeon II/III and Octeon TX TX2 SoC platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-07-30 11:56:18 +00:00
help
Enable the Octeon SPI driver. This driver can be used to
access the SPI NOR flash on Octeon II/III and OcteonTX/TX2
SoC platforms.
spi: omap3: Drop nondm code Now all boards are using this omap3 spi driver in dm model, so drop the nondm code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-27 12:56:36 +00:00
config OMAP3_SPI
bool "McSPI driver for OMAP"
help
SPI master controller for OMAP24XX and later Multichannel SPI
(McSPI). This driver be used to access SPI chips on platforms
embedding this OMAP3 McSPI IP core.
spi: pic32_spi: add SPI master driver for PIC32 SoC. This driver implements SPI protocol in master mode to communicate with the SPI device connected on SPI bus. It handles /CS explicitly by controlling respective pin as gpio ('cs-gpios' property in dt node) and uses PIO mode for SPI transaction. It is configurable based on driver-model only. Cc: Jagan Teki <jteki@openedev.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-06-02 08:56:08 +00:00
config PIC32_SPI
bool "Microchip PIC32 SPI driver"
depends on MACH_PIC32
help
Enable the Microchip PIC32 SPI driver. This driver can be used
to access the SPI NOR flash, MMC-over-SPI on platforms based on
Microchip PIC32 family devices.
spi: add support for ARM PL022 SPI controller This adds support for the ARM PL022 SPI controller for the standard variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX FIFO. A few parts were borrowed from the Linux kernel driver. Cc: Armando Visconti <armando.visconti@st.com> Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-08-31 14:28:29 +00:00
config PL022_SPI
bool "ARM AMBA PL022 SSP controller driver"
depends on ARM
help
This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP
controller. If you have an embedded system with an AMBA(R)
bus and a PL022 controller, say Y or M here.
spi: Add Qualcomm QUP SPI controller driver This patch adds support for the Qualcomm QUP SPI controller that is commonly found in most of Qualcomm SoC-s. Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW. FIFO and Block modes are supported, no support for DMA mode is planned. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-10-08 20:05:09 +00:00
config SPI_QUP
bool "Qualcomm SPI controller with QUP interface"
depends on ARCH_IPQ40XX
help
Qualcomm Universal Peripheral (QUP) core is an AHB slave that
provides a common data path (an output FIFO and an input FIFO)
for serial peripheral interface (SPI) mini-core. SPI in master
mode supports up to 50MHz, up to four chip selects, programmable
data path from 4 bits to 32 bits and numerous protocol variants.
mtd: spi: Add Renesas RPC SPI-flash driver Add driver for the RPC block in SPI-flash mode. This driver allows access to a SPI NOR flash attached to the RPC block and does not support RPC in Hyperflash mode. Note that this block is extremely selective when communicating with the SPI NOR. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-29 05:29:46 +00:00
config RENESAS_RPC_SPI
bool "Renesas RPC SPI driver"
spi: rpc: Add support for operation without clock framework Add ifdeffery to allow operation without the clock framework enabled. This is required on RZ/A1, as it does not have clock driver yet. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-04 16:52:33 +00:00
depends on RCAR_GEN3 || RZA1
configs: Don't use SPI_FLASH_BAR as default Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c, renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to not break functionality. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-05 05:59:28 +00:00
imply SPI_FLASH_BAR
mtd: spi: Add Renesas RPC SPI-flash driver Add driver for the RPC block in SPI-flash mode. This driver allows access to a SPI NOR flash attached to the RPC block and does not support RPC in Hyperflash mode. Note that this block is extremely selective when communicating with the SPI NOR. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-29 05:29:46 +00:00
help
Enable the Renesas RPC SPI driver, used to access SPI NOR flash
on Renesas RCar Gen3 SoCs. This uses driver model and requires a
device tree binding to operate.
spi: rockchip_sfc: add support for Rockchip SFC This patch adds support for the Rockchip serial flash controller found on the PX30 SoC. It should work for versions 3-5 of the SFC IP, however I am only able to test it on v3. This is adapted from the WIP SPI-MEM driver for the SFC on mainline Linux. Note that the main difference between this and earlier versions of the driver is that this one does not support DMA. In testing the performance difference (performing a dual mode read on a 128Mb chip) is negligible. DMA, if used, must also be disabled in SPL mode when using A-TF anyway. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-05 08:26:38 +00:00
config ROCKCHIP_SFC
bool "Rockchip SFC Driver"
help
Enable the Rockchip SFC Driver for SPI NOR flash. This device is
a limited purpose SPI controller for driving NOR flash on certain
Rockchip SoCs. This uses driver model and requires a device tree
binding to operate.
rockchip: Add SPI driver Add a SPI driver for the Rockchip RK3288, using driver model. It should work for other Rockchip SoCs also. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-02 01:19:37 +00:00
config ROCKCHIP_SPI
bool "Rockchip SPI driver"
help
Enable the Rockchip SPI driver, used to access SPI NOR flash and
other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs.
This uses driver model and requires a device tree binding to
operate.
sandbox: Move CONFIG_SANDBOX_SPI to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-03-06 20:19:05 +00:00
config SANDBOX_SPI
bool "Sandbox SPI driver"
depends on SANDBOX && DM
help
Enable SPI support for sandbox. This is an emulation of a real SPI
bus. Devices can be attached to the bus using the device tree
which specifies the driver to use. As an example, see this device
tree fragment from sandbox.dts. It shows that the SPI bus has a
single flash device on chip select 0 which is emulated by the driver
for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c.
spi@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
compatible = "sandbox,spi";
cs-gpios = <0>, <&gpio_a 0>;
flash@0 {
reg = <0>;
sandbox: Correct spi flash operation Since the SPI nor conversion, 'sf probe' does not work on sandbox. Fix this by using the expected compatible string in the flash node. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: cd35365762 (mtd: sf_probe: remove spi-flash compatible)
2019-05-18 17:59:49 +00:00
compatible = "spansion,m25p16", "jedec,spi-nor";
sandbox: Move CONFIG_SANDBOX_SPI to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-03-06 20:19:05 +00:00
spi-max-frequency = <40000000>;
sandbox,filename = "spi.bin";
};
spi: Kconfig: Show dm-spi drivers if DM_SPI set DM supported spi drivers are enbled only when DM_SPI enabled, so added DM_SPI if condition in Kconfig to show thoese only when it enabled. Also re-order the config items as incresing alphabetic order. Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-06-27 17:07:00 +00:00
};
spi: Kconfig: Add TI_QSPI entry Added TI_QSPI entry on Kconfig with help description. Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-26 23:11:11 +00:00
spi: aspeed: Add ASPEED SPI controller driver Add ASPEED BMC FMC/SPI memory controller driver with spi-mem interface for AST2500 and AST2600 platform. There are three SPI memory controllers embedded in an ASPEED SoC. - FMC: Named as Firmware Memory Controller. After AC on, MCU ROM fetches initial device boot image from FMC chip select(CS) 0. - SPI1: Play the role of a SPI Master controller. Or, there is a dedicated path for HOST(X86) to access its BIOS flash mounted under BMC. spi-aspeed-smc.c implements the control sequence when SPI1 is a SPI master. - SPI2: It is a pure SPI flash controller. For most scenarios, flashes mounted under it are for pure storage purpose. ASPEED SPI controller supports 1-1-1, 1-1-2 and 1-1-4 SPI flash mode. Three types of command mode are supported, normal mode, command read/write mode and user mode. - Normal mode: Default mode. After power on, normal read command 03h or 13h is used to fetch boot image from SPI flash. - AST2500: Only 03h command can be used after power on or reset. - AST2600: If FMC04[6:4] is set, 13h command is used, otherwise, 03h command. The address length is decided by FMC04[2:0]. - Command mode: SPI controller can send command and address automatically when CPU read/write the related remapped or decoded address area. The command used by this mode can be configured by FMC10/14/18[23:16]. Also, the address length is decided by FMC04[2:0]. This mode will be implemented in the following patch series. - User mode: It is a traditional and pure SPI operation, where SPI transmission is controlled by CPU. It is the main mode in this patch. Each SPI controller in ASPEED SoC has its own decoded address mapping. Within each SPI controller decoded address, driver can assign a specific address region for each CS of a SPI controller. The decoded address cannot overlap to each other. With normal mode and command mode, the decoded address accessed by the CPU determines which CS is active. When user mode is adopted, the CS decoded address is a FIFO, CPU can send/receive any SPI transmission by accessing the related decoded address for the target CS. This patch only implements user mode initially. Command read/write mode will be implemented in the following patches. Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
2022-08-19 09:01:04 +00:00
config SPI_ASPEED_SMC
bool "ASPEED SPI flash controller driver"
depends on DM_SPI && SPI_MEM
default n
help
Enable ASPEED SPI flash controller driver for AST2500
and AST2600 SoCs.
spi: Add SiFive SPI driver This patch adds SiFive SPI driver. The driver is 100% DM driver and it determines input clock using clk framework. The SiFive SPI block is found on SiFive FU540 SOC and is used to access flash and MMC devices on SiFive Unleashed board. This driver implementation is inspired from the Linux SiFive SPI driver available in Linux-5.2 or higher and SiFive FSBL sources. Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-17 04:23:43 +00:00
config SPI_SIFIVE
bool "SiFive SPI driver"
help
This driver supports the SiFive SPI IP. If unsure say N.
Enable the SiFive SPI controller driver.
The SiFive SPI controller driver is found on various SiFive SoCs.
spi: Zap SOFT_SPI (non-dm) - Deadline for DM migration already passed by months. - Sent couple of zap patches and - No response on dm conversation hence removed the driver. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-26 03:04:37 +00:00
config SOFT_SPI
bool "Soft SPI driver"
help
Enable Soft SPI driver. This driver is to use GPIO simulate
the SPI protocol.
spi: Rename sun4i_spi.c into spi-sunxi.c Now the same SPI controller driver is reusable in all Allwinner SoC variants, so rename the existing sun4i_spi.c into spi-sunxi.c which eventually look like a common sunxi driver. Also update the function, variable, structure names in driver from sun4i into sunxi. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-02-27 14:32:13 +00:00
config SPI_SUNXI
bool "Allwinner SoC SPI controllers"
spi: Kconfig: Enable SPI_SUNXI for SUNXI SPI_SUNXI driver is fully dm-aware and the Allwinner architecture kconfig would have logic to enable the DM_SPI. So, select default spi sunxi driver for sunxi architecture. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-16 12:35:56 +00:00
default ARCH_SUNXI
spi: Rename sun4i_spi.c into spi-sunxi.c Now the same SPI controller driver is reusable in all Allwinner SoC variants, so rename the existing sun4i_spi.c into spi-sunxi.c which eventually look like a common sunxi driver. Also update the function, variable, structure names in driver from sun4i into sunxi. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-02-27 14:32:13 +00:00
help
Enable the Allwinner SoC SPi controller driver.
Same controller driver can reuse in all Allwinner SoC variants.
ARM: SPI: stm32: add stm32f746 qspi driver This patch adds support for the QSPI IP found in stm32f7 devices. Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
2017-01-22 15:04:30 +00:00
config STM32_QSPI
bool "STM32F7 QSPI driver"
spi: Kconfig: Add STM32F4 support for STM32_QSPI driver Allow to select STM32_QSPI driver on STM32F4 SoCs. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-30 14:09:18 +00:00
depends on STM32F4 || STM32F7 || ARCH_STM32MP
ARM: SPI: stm32: add stm32f746 qspi driver This patch adds support for the QSPI IP found in stm32f7 devices. Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
2017-01-22 15:04:30 +00:00
help
Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be
used to access the SPI NOR flash chips on platforms embedding
this ST IP core.
spi: stm32: Add Serial Peripheral Interface driver for STM32MP Add SPI driver support for STM32MP SoCs family. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-30 16:08:28 +00:00
config STM32_SPI
bool "STM32 SPI driver"
depends on ARCH_STM32MP
help
Enable the STM32 Serial Peripheral Interface (SPI) driver for STM32MP
SoCs. This uses driver model and requires a device tree binding to
operate.
spi: Kconfig: Add TEGRA114_SPI entry Added TEGRA114_SPI entry on Kconfig with help description. Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com>
2015-06-27 10:27:53 +00:00
config TEGRA114_SPI
bool "nVidia Tegra114 SPI driver"
help
Enable the nVidia Tegra114 SPI driver. This driver can be used to
access the SPI NOR flash on platforms embedding this nVidia Tegra114
IP core.
This controller is different than the older SoCs SPI controller and
also register interface get changed with this controller.
spi: Kconfig: Add TEGRA20_SFLASH entry Added TEGRA20_SFLASH entry on Kconfig with help description. Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com>
2015-06-27 10:34:05 +00:00
config TEGRA20_SFLASH
bool "nVidia Tegra20 Serial Flash controller driver"
help
Enable the nVidia Tegra20 Serial Flash controller driver. This driver
can be used to access the SPI NOR flash on platforms embedding this
nVidia Tegra20 IP core.
spi: Kconfig: Add TEGRA20_SLINK entry Added TEGRA20_SLINK entry on Kconfig with help description. Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com>
2015-06-27 10:37:54 +00:00
config TEGRA20_SLINK
bool "nVidia Tegra20/Tegra30 SLINK driver"
help
Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can
be used to access the SPI NOR flash on platforms embedding this
nVidia Tegra20/Tegra30 IP cores.
Tegra: T210: Add QSPI driver This is the normal Tegra SPI driver modified to work with the QSPI controller in Tegra210. It does not do 2x/4x transfers or any other QSPI protocol. Signed-off-by: Yen Lin <yelin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-10-12 21:50:54 +00:00
config TEGRA210_QSPI
bool "nVidia Tegra210 QSPI driver"
help
Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver
be used to access SPI chips on platforms embedding this
NVIDIA Tegra210 IP core.
spi: ti_qspi: Drop non DM code Now that all boards using TI QSPI have moved to DM and DT, drop non DM code completely. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [jagan: update MIGRATION.txt, rebase config_whitelist.txt] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-16 16:01:59 +00:00
config TI_QSPI
bool "TI QSPI driver"
imply TI_EDMA3
help
Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
This driver support spi flash single, quad and memory reads.
spi: Add SPI controller driver for UniPhier SoCs Add SPI controller driver implemented in Socionext UniPhier SoCs. This controller has the SPI master mode only. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2019-07-05 01:03:18 +00:00
config UNIPHIER_SPI
bool "Socionext UniPhier SPI driver"
depends on ARCH_UNIPHIER
help
Enable the Socionext UniPhier SPI driver. This driver can
be used to access SPI chips on platforms embedding this
UniPhier IP core.
spi: Kconfig: Add XILINX_SPI entry Added XILINX_SPI entry on Kconfig with help description. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Michal Simek <michal.simek@xilinx.com>
2015-06-26 23:02:43 +00:00
config XILINX_SPI
bool "Xilinx SPI driver"
help
Enable the Xilinx SPI driver from the Xilinx EDK. This SPI
controller support 8 bit SPI transfers only, with or w/o FIFO.
For more info on Xilinx SPI Register Definitions and Overview
see driver file - drivers/spi/xilinx_spi.c
spi: Kconfig: Add Zynq SPI controller entry Add Zynq SPI controller Kconfig entry. Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2015-06-26 19:21:38 +00:00
config ZYNQ_SPI
bool "Zynq SPI driver"
help
Enable the Zynq SPI driver. This driver can be used to
access the SPI NOR flash on platforms embedding this Zynq
SPI IP core.
spi: Add Kconfig menu entry Added Kconfig menu ... endmenu enties for spi support. Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-06-27 17:05:14 +00:00
spi: Kconfig: Add Zynq QSPI controller entry Add Zynq QSPI controller Kconfig entry. Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2015-08-15 18:49:38 +00:00
config ZYNQ_QSPI
bool "Zynq QSPI driver"
configs: Don't use SPI_FLASH_BAR as default Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c, renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to not break functionality. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-05 05:59:28 +00:00
imply SPI_FLASH_BAR
spi: Kconfig: Add Zynq QSPI controller entry Add Zynq QSPI controller Kconfig entry. Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2015-08-15 18:49:38 +00:00
help
Enable the Zynq Quad-SPI (QSPI) driver. This driver can be
used to access the SPI NOR flash on platforms embedding this
Zynq QSPI IP core. This IP is used to connect the flash in
4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
spi: zynqmp_gqspi: Add support for ZynqMP qspi driver This patch adds qspi driver support for ZynqMP SoC. This driver is responsible for communicating with qspi flash devices. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> [jagan: removed GQSPI_MIO_NUM_ macros] Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-04 12:01:23 +00:00
config ZYNQMP_GQSPI
bool "Configure ZynqMP Generic QSPI"
help
This option is used to enable ZynqMP QSPI controller driver which
is used to communicate with qspi flash devices.
spi: Kconfig: Show dm-spi drivers if DM_SPI set DM supported spi drivers are enbled only when DM_SPI enabled, so added DM_SPI if condition in Kconfig to show thoese only when it enabled. Also re-order the config items as incresing alphabetic order. Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-06-27 17:07:00 +00:00
endif # if DM_SPI
spi: Kconfig: Add FSL_ESPI entry Added FSL_ESPI entry on Kconfig with help description. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Haikun Wang <haikun.wang@freescale.com>
2015-06-27 09:51:36 +00:00
config FSL_ESPI
bool "Freescale eSPI driver"
configs: spi: Add the SPI_FLASH_BAR for ESPI Add the SPI_FLASH_BAR for the ESPI controller of FSL, this entry is missed by commit 6d8251783641 ("configs: Don't use SPI_FLASH_BAR as default") Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-10-31 06:34:40 +00:00
imply SPI_FLASH_BAR
spi: Kconfig: Add FSL_ESPI entry Added FSL_ESPI entry on Kconfig with help description. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Haikun Wang <haikun.wang@freescale.com>
2015-06-27 09:51:36 +00:00
help
Enable the Freescale eSPI driver. This driver can be used to
access the SPI interface and SPI NOR flash on platforms embedding
this Freescale eSPI IP core.
spi: Migrate CONFIG_SH_QSPI to Kconfig Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-07 00:42:17 +00:00
config SH_QSPI
bool "Renesas Quad SPI driver"
help
Enable the Renesas Quad SPI controller driver. This driver can be
used on Renesas SoCs.
spi: Migrate CONFIG_MXC_SPI to Kconfig Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-07 00:42:19 +00:00
config MXC_SPI
bool "MXC SPI Driver"
help
Enable the MXC SPI controller driver. This driver can be used
on various i.MX SoCs such as i.MX31/35/51/6/7.
spi: synquacer: Add HSSPI SPI controller driver for SynQuacer This is a driver for the HSSPI SPI controller on SynQuacer SoC. The HSSPI has command sequence mode (memory mapped) and direct mode (FIFO access). The driver will operate it under the direct mode. And before booting OS, it switch back to the command sequence mode since that is compatible with default EDK2 behavior. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-06-04 09:44:27 +00:00
config SYNQUACER_SPI
bool "Socionext SynQuacer HS-SPI driver"
depends on ARCH_SYNQUACER
help
Enable the Socionext HS-SPI driver for SynQuacer. This driver can
be used to access the SPI interface and SPI NOR flash on platforms
embedding this HS-SPI IP core.
Convert CONFIG_SPI to Kconfig This converts the following to Kconfig: CONFIG_SPI This partly involves updating code that assumes that CONFIG_SPI implies things that are specific to the MPC8xx SPI driver. For now, just update the CONFIG tests. This also involves reworking the default for CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a reasonable default, as it does not cause any compile failures. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-15 17:51:26 +00:00
endif # menu "SPI Support"
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