2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2014-12-10 15:55:47 +00:00
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/*
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* Copyright (c) 2014 Google, Inc
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*/
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2021-04-27 09:02:19 +00:00
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#define LOG_CATEGORY UCLASS_I2C
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2014-12-10 15:55:47 +00:00
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <i2c.h>
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2020-05-10 17:40:05 +00:00
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#include <log.h>
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2014-12-10 15:55:47 +00:00
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#include <malloc.h>
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2020-09-22 18:45:01 +00:00
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#include <acpi/acpi_device.h>
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#include <dm/acpi.h>
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2014-12-10 15:55:47 +00:00
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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2018-03-27 14:52:27 +00:00
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#include <dm/pinctrl.h>
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2019-12-07 04:41:35 +00:00
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#if CONFIG_IS_ENABLED(DM_GPIO)
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2018-03-27 14:52:27 +00:00
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#include <asm/gpio.h>
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#endif
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2020-05-10 17:40:11 +00:00
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#include <linux/delay.h>
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2020-09-22 18:45:01 +00:00
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#include "acpi_i2c.h"
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2014-12-10 15:55:47 +00:00
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#define I2C_MAX_OFFSET_LEN 4
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2018-03-27 14:52:27 +00:00
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enum {
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PIN_SDA = 0,
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PIN_SCL,
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PIN_COUNT,
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};
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2015-07-03 00:15:39 +00:00
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/* Useful debugging function */
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void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)
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{
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int i;
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for (i = 0; i < nmsgs; i++) {
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struct i2c_msg *m = &msg[i];
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printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W",
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msg->addr, msg->len);
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if (!(m->flags & I2C_M_RD))
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printf(": %x", m->buf[0]);
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printf("\n");
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}
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}
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2014-12-10 15:55:47 +00:00
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/**
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* i2c_setup_offset() - Set up a new message with a chip offset
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*
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* @chip: Chip to use
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* @offset: Byte offset within chip
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* @offset_buf: Place to put byte offset
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* @msg: Message buffer
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* @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the
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* message is still set up but will not contain an offset.
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*/
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static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
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uint8_t offset_buf[], struct i2c_msg *msg)
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{
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2019-10-28 17:44:57 +00:00
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int offset_len = chip->offset_len;
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2014-12-10 15:55:47 +00:00
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msg->addr = chip->chip_addr;
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2019-10-28 17:44:57 +00:00
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if (chip->chip_addr_offset_mask)
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msg->addr |= (offset >> (8 * offset_len)) &
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chip->chip_addr_offset_mask;
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2014-12-10 15:55:47 +00:00
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msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
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msg->len = chip->offset_len;
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msg->buf = offset_buf;
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2019-10-28 17:44:57 +00:00
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if (!offset_len)
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2014-12-10 15:55:47 +00:00
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return -EADDRNOTAVAIL;
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2019-10-28 17:44:57 +00:00
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assert(offset_len <= I2C_MAX_OFFSET_LEN);
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2014-12-10 15:55:47 +00:00
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while (offset_len--)
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*offset_buf++ = offset >> (8 * offset_len);
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return 0;
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}
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static int i2c_read_bytewise(struct udevice *dev, uint offset,
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uint8_t *buffer, int len)
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{
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2020-12-03 23:55:18 +00:00
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struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
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2014-12-10 15:55:47 +00:00
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struct udevice *bus = dev_get_parent(dev);
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct i2c_msg msg[2], *ptr;
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uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
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int ret;
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int i;
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for (i = 0; i < len; i++) {
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if (i2c_setup_offset(chip, offset + i, offset_buf, msg))
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return -EINVAL;
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ptr = msg + 1;
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2019-10-28 17:44:57 +00:00
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ptr->addr = msg->addr;
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2014-12-10 15:55:47 +00:00
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ptr->flags = msg->flags | I2C_M_RD;
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ptr->len = 1;
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ptr->buf = &buffer[i];
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ptr++;
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ret = ops->xfer(bus, msg, ptr - msg);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int i2c_write_bytewise(struct udevice *dev, uint offset,
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const uint8_t *buffer, int len)
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{
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2020-12-03 23:55:18 +00:00
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struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
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2014-12-10 15:55:47 +00:00
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struct udevice *bus = dev_get_parent(dev);
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct i2c_msg msg[1];
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uint8_t buf[I2C_MAX_OFFSET_LEN + 1];
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int ret;
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int i;
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for (i = 0; i < len; i++) {
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if (i2c_setup_offset(chip, offset + i, buf, msg))
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return -EINVAL;
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buf[msg->len++] = buffer[i];
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ret = ops->xfer(bus, msg, 1);
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if (ret)
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return ret;
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}
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return 0;
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}
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2015-01-13 01:02:07 +00:00
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int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len)
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2014-12-10 15:55:47 +00:00
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{
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2020-12-03 23:55:18 +00:00
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struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
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2014-12-10 15:55:47 +00:00
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struct udevice *bus = dev_get_parent(dev);
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct i2c_msg msg[2], *ptr;
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uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
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int msg_count;
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if (!ops->xfer)
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return -ENOSYS;
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if (chip->flags & DM_I2C_CHIP_RD_ADDRESS)
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return i2c_read_bytewise(dev, offset, buffer, len);
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ptr = msg;
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if (!i2c_setup_offset(chip, offset, offset_buf, ptr))
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ptr++;
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if (len) {
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2019-10-28 17:44:57 +00:00
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ptr->addr = msg->addr;
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2014-12-10 15:55:47 +00:00
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ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
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ptr->flags |= I2C_M_RD;
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ptr->len = len;
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ptr->buf = buffer;
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ptr++;
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}
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msg_count = ptr - msg;
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return ops->xfer(bus, msg, msg_count);
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}
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2015-01-13 01:02:07 +00:00
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int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
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int len)
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2014-12-10 15:55:47 +00:00
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{
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2020-12-03 23:55:18 +00:00
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struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
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2014-12-10 15:55:47 +00:00
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struct udevice *bus = dev_get_parent(dev);
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct i2c_msg msg[1];
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if (!ops->xfer)
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return -ENOSYS;
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if (chip->flags & DM_I2C_CHIP_WR_ADDRESS)
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return i2c_write_bytewise(dev, offset, buffer, len);
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/*
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* The simple approach would be to send two messages here: one to
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* set the offset and one to write the bytes. However some drivers
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* will not be expecting this, and some chips won't like how the
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* driver presents this on the I2C bus.
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*
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* The API does not support separate offset and data. We could extend
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* it with a flag indicating that there is data in the next message
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* that needs to be processed in the same transaction. We could
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* instead add an additional buffer to each message. For now, handle
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* this in the uclass since it isn't clear what the impact on drivers
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* would be with this extra complication. Unfortunately this means
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* copying the message.
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*
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* Use the stack for small messages, malloc() for larger ones. We
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* need to allow space for the offset (up to 4 bytes) and the message
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* itself.
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*/
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if (len < 64) {
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uint8_t buf[I2C_MAX_OFFSET_LEN + len];
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i2c_setup_offset(chip, offset, buf, msg);
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msg->len += len;
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memcpy(buf + chip->offset_len, buffer, len);
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return ops->xfer(bus, msg, 1);
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} else {
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uint8_t *buf;
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int ret;
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buf = malloc(I2C_MAX_OFFSET_LEN + len);
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if (!buf)
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return -ENOMEM;
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i2c_setup_offset(chip, offset, buf, msg);
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msg->len += len;
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memcpy(buf + chip->offset_len, buffer, len);
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ret = ops->xfer(bus, msg, 1);
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free(buf);
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return ret;
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}
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}
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2015-07-03 00:15:42 +00:00
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int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
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{
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struct udevice *bus = dev_get_parent(dev);
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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if (!ops->xfer)
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return -ENOSYS;
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return ops->xfer(bus, msg, nmsgs);
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}
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2015-04-20 18:37:14 +00:00
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int dm_i2c_reg_read(struct udevice *dev, uint offset)
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{
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uint8_t val;
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int ret;
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ret = dm_i2c_read(dev, offset, &val, 1);
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if (ret < 0)
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return ret;
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return val;
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}
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int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)
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{
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uint8_t val = value;
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return dm_i2c_write(dev, offset, &val, 1);
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}
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2021-07-15 15:39:59 +00:00
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int dm_i2c_reg_clrset(struct udevice *dev, uint offset, u32 clr, u32 set)
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{
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uint8_t val;
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int ret;
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ret = dm_i2c_read(dev, offset, &val, 1);
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if (ret < 0)
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return ret;
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val &= ~clr;
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val |= set;
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return dm_i2c_write(dev, offset, &val, 1);
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}
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2014-12-10 15:55:47 +00:00
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/**
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* i2c_probe_chip() - probe for a chip on a bus
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*
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* @bus: Bus to probe
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* @chip_addr: Chip address to probe
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* @flags: Flags for the chip
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* @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip
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* does not respond to probe
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*/
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static int i2c_probe_chip(struct udevice *bus, uint chip_addr,
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enum dm_i2c_chip_flags chip_flags)
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{
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struct dm_i2c_ops *ops = i2c_get_ops(bus);
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struct i2c_msg msg[1];
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int ret;
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if (ops->probe_chip) {
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ret = ops->probe_chip(bus, chip_addr, chip_flags);
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if (!ret || ret != -ENOSYS)
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return ret;
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}
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if (!ops->xfer)
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return -ENOSYS;
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/* Probe with a zero-length message */
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msg->addr = chip_addr;
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msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
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msg->len = 0;
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msg->buf = NULL;
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return ops->xfer(bus, msg, 1);
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}
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2015-01-25 15:26:55 +00:00
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static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len,
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2014-12-10 15:55:47 +00:00
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struct udevice **devp)
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{
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2015-01-25 15:27:13 +00:00
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struct dm_i2c_chip *chip;
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2014-12-10 15:55:47 +00:00
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char name[30], *str;
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struct udevice *dev;
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int ret;
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snprintf(name, sizeof(name), "generic_%x", chip_addr);
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str = strdup(name);
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2015-02-18 21:10:28 +00:00
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if (!str)
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return -ENOMEM;
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2014-12-10 15:55:47 +00:00
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ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev);
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debug("%s: device_bind_driver: ret=%d\n", __func__, ret);
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if (ret)
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goto err_bind;
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/* Tell the device what we know about it */
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2020-12-03 23:55:18 +00:00
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chip = dev_get_parent_plat(dev);
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2015-01-25 15:27:13 +00:00
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chip->chip_addr = chip_addr;
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chip->offset_len = offset_len;
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ret = device_probe(dev);
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debug("%s: device_probe: ret=%d\n", __func__, ret);
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2014-12-10 15:55:47 +00:00
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if (ret)
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goto err_probe;
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*devp = dev;
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return 0;
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err_probe:
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2015-01-25 15:27:13 +00:00
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/*
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* If the device failed to probe, unbind it. There is nothing there
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* on the bus so we don't want to leave it lying around
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*/
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2014-12-10 15:55:47 +00:00
|
|
|
device_unbind(dev);
|
|
|
|
err_bind:
|
|
|
|
free(str);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-01-25 15:26:55 +00:00
|
|
|
int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
|
|
|
|
struct udevice **devp)
|
2014-12-10 15:55:47 +00:00
|
|
|
{
|
|
|
|
struct udevice *dev;
|
|
|
|
|
|
|
|
debug("%s: Searching bus '%s' for address %02x: ", __func__,
|
|
|
|
bus->name, chip_addr);
|
|
|
|
for (device_find_first_child(bus, &dev); dev;
|
|
|
|
device_find_next_child(&dev)) {
|
2020-12-03 23:55:18 +00:00
|
|
|
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
|
2014-12-10 15:55:47 +00:00
|
|
|
int ret;
|
|
|
|
|
2019-10-28 17:44:57 +00:00
|
|
|
if (chip->chip_addr == (chip_addr &
|
|
|
|
~chip->chip_addr_offset_mask)) {
|
2014-12-10 15:55:47 +00:00
|
|
|
ret = device_probe(dev);
|
|
|
|
debug("found, ret=%d\n", ret);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
*devp = dev;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
debug("not found\n");
|
2015-01-25 15:26:55 +00:00
|
|
|
return i2c_bind_driver(bus, chip_addr, offset_len, devp);
|
2014-12-10 15:55:47 +00:00
|
|
|
}
|
|
|
|
|
2015-01-25 15:26:55 +00:00
|
|
|
int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
|
|
|
|
struct udevice **devp)
|
2014-12-10 15:55:47 +00:00
|
|
|
{
|
|
|
|
struct udevice *bus;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
|
|
|
|
if (ret) {
|
|
|
|
debug("Cannot find I2C bus %d\n", busnum);
|
|
|
|
return ret;
|
|
|
|
}
|
2018-12-07 13:50:38 +00:00
|
|
|
|
|
|
|
/* detect the presence of the chip on the bus */
|
|
|
|
ret = i2c_probe_chip(bus, chip_addr, 0);
|
|
|
|
debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
|
|
|
|
chip_addr, ret);
|
|
|
|
if (ret) {
|
|
|
|
debug("Cannot detect I2C chip %02x on bus %d\n", chip_addr,
|
|
|
|
busnum);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-01-25 15:26:55 +00:00
|
|
|
ret = i2c_get_chip(bus, chip_addr, offset_len, devp);
|
2014-12-10 15:55:47 +00:00
|
|
|
if (ret) {
|
|
|
|
debug("Cannot find I2C chip %02x on bus %d\n", chip_addr,
|
|
|
|
busnum);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-01-13 01:02:07 +00:00
|
|
|
int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
|
|
|
|
struct udevice **devp)
|
2014-12-10 15:55:47 +00:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
*devp = NULL;
|
|
|
|
|
|
|
|
/* First probe that chip */
|
|
|
|
ret = i2c_probe_chip(bus, chip_addr, chip_flags);
|
|
|
|
debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
|
|
|
|
chip_addr, ret);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* The chip was found, see if we have a driver, and probe it */
|
2015-01-25 15:26:55 +00:00
|
|
|
ret = i2c_get_chip(bus, chip_addr, 1, devp);
|
2014-12-10 15:55:47 +00:00
|
|
|
debug("%s: i2c_get_chip: ret=%d\n", __func__, ret);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-02-06 04:41:32 +00:00
|
|
|
int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
|
2014-12-10 15:55:47 +00:00
|
|
|
{
|
|
|
|
struct dm_i2c_ops *ops = i2c_get_ops(bus);
|
2015-03-05 19:25:20 +00:00
|
|
|
struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
|
2014-12-10 15:55:47 +00:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If we have a method, call it. If not then the driver probably wants
|
|
|
|
* to deal with speed changes on the next transfer. It can easily read
|
|
|
|
* the current speed from this uclass
|
|
|
|
*/
|
|
|
|
if (ops->set_bus_speed) {
|
|
|
|
ret = ops->set_bus_speed(bus, speed);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
i2c->speed_hz = speed;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-02-06 04:41:32 +00:00
|
|
|
int dm_i2c_get_bus_speed(struct udevice *bus)
|
2014-12-10 15:55:47 +00:00
|
|
|
{
|
|
|
|
struct dm_i2c_ops *ops = i2c_get_ops(bus);
|
2015-03-05 19:25:20 +00:00
|
|
|
struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
|
2014-12-10 15:55:47 +00:00
|
|
|
|
|
|
|
if (!ops->get_bus_speed)
|
|
|
|
return i2c->speed_hz;
|
|
|
|
|
|
|
|
return ops->get_bus_speed(bus);
|
|
|
|
}
|
|
|
|
|
|
|
|
int i2c_set_chip_flags(struct udevice *dev, uint flags)
|
|
|
|
{
|
|
|
|
struct udevice *bus = dev->parent;
|
2020-12-03 23:55:18 +00:00
|
|
|
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
|
2014-12-10 15:55:47 +00:00
|
|
|
struct dm_i2c_ops *ops = i2c_get_ops(bus);
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (ops->set_flags) {
|
|
|
|
ret = ops->set_flags(dev, flags);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
chip->flags = flags;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int i2c_get_chip_flags(struct udevice *dev, uint *flagsp)
|
|
|
|
{
|
2020-12-03 23:55:18 +00:00
|
|
|
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
|
2014-12-10 15:55:47 +00:00
|
|
|
|
|
|
|
*flagsp = chip->flags;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len)
|
|
|
|
{
|
2020-12-03 23:55:18 +00:00
|
|
|
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
|
2014-12-10 15:55:47 +00:00
|
|
|
|
|
|
|
if (offset_len > I2C_MAX_OFFSET_LEN)
|
2020-07-08 03:32:28 +00:00
|
|
|
return log_ret(-EINVAL);
|
2014-12-10 15:55:47 +00:00
|
|
|
chip->offset_len = offset_len;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-05-04 17:30:58 +00:00
|
|
|
int i2c_get_chip_offset_len(struct udevice *dev)
|
|
|
|
{
|
2020-12-03 23:55:18 +00:00
|
|
|
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
|
2015-05-04 17:30:58 +00:00
|
|
|
|
|
|
|
return chip->offset_len;
|
|
|
|
}
|
|
|
|
|
2019-10-28 17:44:57 +00:00
|
|
|
int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask)
|
|
|
|
{
|
2020-12-03 23:55:18 +00:00
|
|
|
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
|
2019-10-28 17:44:57 +00:00
|
|
|
|
|
|
|
chip->chip_addr_offset_mask = mask;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint i2c_get_chip_addr_offset_mask(struct udevice *dev)
|
|
|
|
{
|
2020-12-03 23:55:18 +00:00
|
|
|
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
|
2019-10-28 17:44:57 +00:00
|
|
|
|
|
|
|
return chip->chip_addr_offset_mask;
|
|
|
|
}
|
|
|
|
|
2019-12-07 04:41:35 +00:00
|
|
|
#if CONFIG_IS_ENABLED(DM_GPIO)
|
2018-03-27 14:52:27 +00:00
|
|
|
static void i2c_gpio_set_pin(struct gpio_desc *pin, int bit)
|
|
|
|
{
|
|
|
|
if (bit)
|
|
|
|
dm_gpio_set_dir_flags(pin, GPIOD_IS_IN);
|
|
|
|
else
|
|
|
|
dm_gpio_set_dir_flags(pin, GPIOD_IS_OUT |
|
|
|
|
GPIOD_ACTIVE_LOW |
|
|
|
|
GPIOD_IS_OUT_ACTIVE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int i2c_gpio_get_pin(struct gpio_desc *pin)
|
|
|
|
{
|
|
|
|
return dm_gpio_get_value(pin);
|
|
|
|
}
|
|
|
|
|
2020-02-07 15:57:50 +00:00
|
|
|
int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin,
|
|
|
|
struct gpio_desc *scl_pin,
|
|
|
|
unsigned int scl_count,
|
2020-02-07 15:57:51 +00:00
|
|
|
unsigned int start_count,
|
2020-02-07 15:57:50 +00:00
|
|
|
unsigned int delay)
|
2018-03-27 14:52:27 +00:00
|
|
|
{
|
2020-02-07 15:57:51 +00:00
|
|
|
int i, ret = -EREMOTEIO;
|
2018-03-27 14:52:27 +00:00
|
|
|
|
|
|
|
i2c_gpio_set_pin(sda_pin, 1);
|
|
|
|
i2c_gpio_set_pin(scl_pin, 1);
|
2020-02-07 15:57:49 +00:00
|
|
|
udelay(delay);
|
2018-03-27 14:52:27 +00:00
|
|
|
|
|
|
|
/* Toggle SCL until slave release SDA */
|
2020-05-09 16:20:18 +00:00
|
|
|
for (; scl_count; --scl_count) {
|
2018-03-27 14:52:27 +00:00
|
|
|
i2c_gpio_set_pin(scl_pin, 1);
|
2020-02-07 15:57:49 +00:00
|
|
|
udelay(delay);
|
2018-03-27 14:52:27 +00:00
|
|
|
i2c_gpio_set_pin(scl_pin, 0);
|
2020-02-07 15:57:49 +00:00
|
|
|
udelay(delay);
|
2020-02-07 15:57:51 +00:00
|
|
|
if (i2c_gpio_get_pin(sda_pin)) {
|
|
|
|
ret = 0;
|
2018-03-27 14:52:27 +00:00
|
|
|
break;
|
2020-02-07 15:57:51 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!ret && start_count) {
|
|
|
|
for (i = 0; i < start_count; i++) {
|
|
|
|
/* Send start condition */
|
|
|
|
udelay(delay);
|
|
|
|
i2c_gpio_set_pin(sda_pin, 1);
|
|
|
|
udelay(delay);
|
|
|
|
i2c_gpio_set_pin(scl_pin, 1);
|
|
|
|
udelay(delay);
|
|
|
|
i2c_gpio_set_pin(sda_pin, 0);
|
|
|
|
udelay(delay);
|
|
|
|
i2c_gpio_set_pin(scl_pin, 0);
|
|
|
|
}
|
2018-03-27 14:52:27 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Then, send I2C stop */
|
|
|
|
i2c_gpio_set_pin(sda_pin, 0);
|
2020-02-07 15:57:49 +00:00
|
|
|
udelay(delay);
|
2018-03-27 14:52:27 +00:00
|
|
|
|
|
|
|
i2c_gpio_set_pin(scl_pin, 1);
|
2020-02-07 15:57:49 +00:00
|
|
|
udelay(delay);
|
2018-03-27 14:52:27 +00:00
|
|
|
|
|
|
|
i2c_gpio_set_pin(sda_pin, 1);
|
2020-02-07 15:57:49 +00:00
|
|
|
udelay(delay);
|
2018-03-27 14:52:27 +00:00
|
|
|
|
|
|
|
if (!i2c_gpio_get_pin(sda_pin) || !i2c_gpio_get_pin(scl_pin))
|
|
|
|
ret = -EREMOTEIO;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int i2c_deblock_gpio(struct udevice *bus)
|
|
|
|
{
|
|
|
|
struct gpio_desc gpios[PIN_COUNT];
|
|
|
|
int ret, ret0;
|
|
|
|
|
|
|
|
ret = gpio_request_list_by_name(bus, "gpios", gpios,
|
|
|
|
ARRAY_SIZE(gpios), GPIOD_IS_IN);
|
|
|
|
if (ret != ARRAY_SIZE(gpios)) {
|
|
|
|
debug("%s: I2C Node '%s' has no 'gpios' property %s\n",
|
|
|
|
__func__, dev_read_name(bus), bus->name);
|
|
|
|
if (ret >= 0) {
|
|
|
|
gpio_free_list(bus, gpios, ret);
|
|
|
|
ret = -ENOENT;
|
|
|
|
}
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = pinctrl_select_state(bus, "gpio");
|
|
|
|
if (ret) {
|
|
|
|
debug("%s: I2C Node '%s' has no 'gpio' pinctrl state. %s\n",
|
|
|
|
__func__, dev_read_name(bus), bus->name);
|
|
|
|
goto out_no_pinctrl;
|
|
|
|
}
|
|
|
|
|
2020-02-07 15:57:51 +00:00
|
|
|
ret0 = i2c_deblock_gpio_loop(&gpios[PIN_SDA], &gpios[PIN_SCL], 9, 0, 5);
|
2018-03-27 14:52:27 +00:00
|
|
|
|
|
|
|
ret = pinctrl_select_state(bus, "default");
|
|
|
|
if (ret) {
|
|
|
|
debug("%s: I2C Node '%s' has no 'default' pinctrl state. %s\n",
|
|
|
|
__func__, dev_read_name(bus), bus->name);
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = !ret ? ret0 : ret;
|
|
|
|
|
|
|
|
out_no_pinctrl:
|
|
|
|
gpio_free_list(bus, gpios, ARRAY_SIZE(gpios));
|
|
|
|
out:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static int i2c_deblock_gpio(struct udevice *bus)
|
|
|
|
{
|
|
|
|
return -ENOSYS;
|
|
|
|
}
|
2019-12-07 04:41:35 +00:00
|
|
|
#endif /* DM_GPIO */
|
2018-03-27 14:52:27 +00:00
|
|
|
|
2014-12-10 15:55:47 +00:00
|
|
|
int i2c_deblock(struct udevice *bus)
|
|
|
|
{
|
|
|
|
struct dm_i2c_ops *ops = i2c_get_ops(bus);
|
|
|
|
|
|
|
|
if (!ops->deblock)
|
2018-03-27 14:52:27 +00:00
|
|
|
return i2c_deblock_gpio(bus);
|
2014-12-10 15:55:47 +00:00
|
|
|
|
|
|
|
return ops->deblock(bus);
|
|
|
|
}
|
|
|
|
|
2018-08-21 01:24:34 +00:00
|
|
|
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
|
2020-12-03 23:55:21 +00:00
|
|
|
int i2c_chip_of_to_plat(struct udevice *dev, struct dm_i2c_chip *chip)
|
2014-12-10 15:55:47 +00:00
|
|
|
{
|
2017-05-19 02:09:30 +00:00
|
|
|
int addr;
|
|
|
|
|
|
|
|
chip->offset_len = dev_read_u32_default(dev, "u-boot,i2c-offset-len",
|
|
|
|
1);
|
2014-12-10 15:55:47 +00:00
|
|
|
chip->flags = 0;
|
2017-05-19 02:09:30 +00:00
|
|
|
addr = dev_read_u32_default(dev, "reg", -1);
|
|
|
|
if (addr == -1) {
|
|
|
|
debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__,
|
|
|
|
dev_read_name(dev), dev->name);
|
2020-07-08 03:32:28 +00:00
|
|
|
return log_ret(-EINVAL);
|
2014-12-10 15:55:47 +00:00
|
|
|
}
|
2017-05-19 02:09:30 +00:00
|
|
|
chip->chip_addr = addr;
|
2014-12-10 15:55:47 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2016-07-18 09:40:58 +00:00
|
|
|
#endif
|
2014-12-10 15:55:47 +00:00
|
|
|
|
2019-04-04 10:35:34 +00:00
|
|
|
static int i2c_pre_probe(struct udevice *dev)
|
|
|
|
{
|
|
|
|
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
|
|
|
|
struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
|
|
|
|
unsigned int max = 0;
|
|
|
|
ofnode node;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
i2c->max_transaction_bytes = 0;
|
|
|
|
dev_for_each_subnode(node, dev) {
|
|
|
|
ret = ofnode_read_u32(node,
|
|
|
|
"u-boot,i2c-transaction-bytes",
|
|
|
|
&max);
|
|
|
|
if (!ret && max > i2c->max_transaction_bytes)
|
|
|
|
i2c->max_transaction_bytes = max;
|
|
|
|
}
|
|
|
|
|
|
|
|
debug("%s: I2C bus: %s max transaction bytes: %d\n", __func__,
|
|
|
|
dev->name, i2c->max_transaction_bytes);
|
|
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-12-10 15:55:47 +00:00
|
|
|
static int i2c_post_probe(struct udevice *dev)
|
|
|
|
{
|
2018-08-21 01:24:34 +00:00
|
|
|
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
|
2015-03-05 19:25:20 +00:00
|
|
|
struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
|
2014-12-10 15:55:47 +00:00
|
|
|
|
2020-01-23 18:48:22 +00:00
|
|
|
i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency",
|
|
|
|
I2C_SPEED_STANDARD_RATE);
|
2014-12-10 15:55:47 +00:00
|
|
|
|
2015-02-06 04:41:32 +00:00
|
|
|
return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
|
2016-07-18 09:40:58 +00:00
|
|
|
#else
|
|
|
|
return 0;
|
|
|
|
#endif
|
2014-12-10 15:55:47 +00:00
|
|
|
}
|
|
|
|
|
2015-01-25 15:27:13 +00:00
|
|
|
static int i2c_child_post_bind(struct udevice *dev)
|
|
|
|
{
|
2018-08-21 01:24:34 +00:00
|
|
|
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
|
2020-12-03 23:55:18 +00:00
|
|
|
struct dm_i2c_chip *plat = dev_get_parent_plat(dev);
|
2015-01-25 15:27:13 +00:00
|
|
|
|
2020-12-19 17:40:13 +00:00
|
|
|
if (!dev_has_ofnode(dev))
|
2015-01-25 15:27:13 +00:00
|
|
|
return 0;
|
2020-12-03 23:55:21 +00:00
|
|
|
return i2c_chip_of_to_plat(dev, plat);
|
2016-07-18 09:40:58 +00:00
|
|
|
#else
|
|
|
|
return 0;
|
|
|
|
#endif
|
2015-01-25 15:27:13 +00:00
|
|
|
}
|
|
|
|
|
i2c: Fill req_seq in i2c_post_bind()
For i2c controllers which are missing alias in DT there is no req_seq
setup. This function is setting up proper ID based on highest found
alias ID.
On zcu102 this is the behavior when patch is applied.
ZynqMP> i2c bus
Bus 0: i2c@ff020000
20: gpio@20, offset len 1, flags 0
21: gpio@21, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 2: i2c@0
Bus 3: i2c@1
Bus 4: i2c@2
Bus 1: i2c@ff030000 (active 1)
74: i2c-mux@74, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 5: i2c@0 (active 5)
54: eeprom@54, offset len 1, flags 0
Bus 6: i2c@1
Bus 7: i2c@2
Bus 8: i2c@3
Bus 9: i2c@4
Bus 10: i2c@0
Bus 11: i2c@1
Bus 12: i2c@2
Bus 13: i2c@3
Bus 14: i2c@4
Bus 15: i2c@5
Bus 16: i2c@6
Bus 17: i2c@7
Before this patch applied (controllers have -1 ID)
ZynqMP> i2c bus
Bus 0: i2c@ff020000
20: gpio@20, offset len 1, flags 0
21: gpio@21, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus -1: i2c@0
Bus -1: i2c@1
Bus -1: i2c@2
Bus 1: i2c@ff030000 (active 1)
74: i2c-mux@74, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus -1: i2c@0 (active 0)
54: eeprom@54, offset len 1, flags 0
Bus -1: i2c@1
Bus -1: i2c@2
Bus -1: i2c@3
Bus -1: i2c@4
Bus -1: i2c@0
Bus -1: i2c@1
Bus -1: i2c@2
Bus -1: i2c@3
Bus -1: i2c@4
Bus -1: i2c@5
Bus -1: i2c@6
Bus -1: i2c@7
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-01-31 15:31:02 +00:00
|
|
|
static int i2c_post_bind(struct udevice *dev)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
2020-12-17 04:20:15 +00:00
|
|
|
debug("%s: %s, seq=%d\n", __func__, dev->name, dev_seq(dev));
|
i2c: Fill req_seq in i2c_post_bind()
For i2c controllers which are missing alias in DT there is no req_seq
setup. This function is setting up proper ID based on highest found
alias ID.
On zcu102 this is the behavior when patch is applied.
ZynqMP> i2c bus
Bus 0: i2c@ff020000
20: gpio@20, offset len 1, flags 0
21: gpio@21, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 2: i2c@0
Bus 3: i2c@1
Bus 4: i2c@2
Bus 1: i2c@ff030000 (active 1)
74: i2c-mux@74, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 5: i2c@0 (active 5)
54: eeprom@54, offset len 1, flags 0
Bus 6: i2c@1
Bus 7: i2c@2
Bus 8: i2c@3
Bus 9: i2c@4
Bus 10: i2c@0
Bus 11: i2c@1
Bus 12: i2c@2
Bus 13: i2c@3
Bus 14: i2c@4
Bus 15: i2c@5
Bus 16: i2c@6
Bus 17: i2c@7
Before this patch applied (controllers have -1 ID)
ZynqMP> i2c bus
Bus 0: i2c@ff020000
20: gpio@20, offset len 1, flags 0
21: gpio@21, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus -1: i2c@0
Bus -1: i2c@1
Bus -1: i2c@2
Bus 1: i2c@ff030000 (active 1)
74: i2c-mux@74, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus -1: i2c@0 (active 0)
54: eeprom@54, offset len 1, flags 0
Bus -1: i2c@1
Bus -1: i2c@2
Bus -1: i2c@3
Bus -1: i2c@4
Bus -1: i2c@0
Bus -1: i2c@1
Bus -1: i2c@2
Bus -1: i2c@3
Bus -1: i2c@4
Bus -1: i2c@5
Bus -1: i2c@6
Bus -1: i2c@7
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-01-31 15:31:02 +00:00
|
|
|
|
|
|
|
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
|
|
|
|
ret = dm_scan_fdt_dev(dev);
|
|
|
|
#endif
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-12-10 15:55:47 +00:00
|
|
|
UCLASS_DRIVER(i2c) = {
|
|
|
|
.id = UCLASS_I2C,
|
|
|
|
.name = "i2c",
|
2015-01-25 15:27:05 +00:00
|
|
|
.flags = DM_UC_FLAG_SEQ_ALIAS,
|
i2c: Fill req_seq in i2c_post_bind()
For i2c controllers which are missing alias in DT there is no req_seq
setup. This function is setting up proper ID based on highest found
alias ID.
On zcu102 this is the behavior when patch is applied.
ZynqMP> i2c bus
Bus 0: i2c@ff020000
20: gpio@20, offset len 1, flags 0
21: gpio@21, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 2: i2c@0
Bus 3: i2c@1
Bus 4: i2c@2
Bus 1: i2c@ff030000 (active 1)
74: i2c-mux@74, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 5: i2c@0 (active 5)
54: eeprom@54, offset len 1, flags 0
Bus 6: i2c@1
Bus 7: i2c@2
Bus 8: i2c@3
Bus 9: i2c@4
Bus 10: i2c@0
Bus 11: i2c@1
Bus 12: i2c@2
Bus 13: i2c@3
Bus 14: i2c@4
Bus 15: i2c@5
Bus 16: i2c@6
Bus 17: i2c@7
Before this patch applied (controllers have -1 ID)
ZynqMP> i2c bus
Bus 0: i2c@ff020000
20: gpio@20, offset len 1, flags 0
21: gpio@21, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus -1: i2c@0
Bus -1: i2c@1
Bus -1: i2c@2
Bus 1: i2c@ff030000 (active 1)
74: i2c-mux@74, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus -1: i2c@0 (active 0)
54: eeprom@54, offset len 1, flags 0
Bus -1: i2c@1
Bus -1: i2c@2
Bus -1: i2c@3
Bus -1: i2c@4
Bus -1: i2c@0
Bus -1: i2c@1
Bus -1: i2c@2
Bus -1: i2c@3
Bus -1: i2c@4
Bus -1: i2c@5
Bus -1: i2c@6
Bus -1: i2c@7
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-01-31 15:31:02 +00:00
|
|
|
.post_bind = i2c_post_bind,
|
2019-04-04 10:35:34 +00:00
|
|
|
.pre_probe = i2c_pre_probe,
|
2014-12-10 15:55:47 +00:00
|
|
|
.post_probe = i2c_post_probe,
|
2020-12-03 23:55:17 +00:00
|
|
|
.per_device_auto = sizeof(struct dm_i2c_bus),
|
2020-12-03 23:55:18 +00:00
|
|
|
.per_child_plat_auto = sizeof(struct dm_i2c_chip),
|
2015-01-25 15:27:13 +00:00
|
|
|
.child_post_bind = i2c_child_post_bind,
|
2014-12-10 15:55:47 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
UCLASS_DRIVER(i2c_generic) = {
|
|
|
|
.id = UCLASS_I2C_GENERIC,
|
|
|
|
.name = "i2c_generic",
|
|
|
|
};
|
|
|
|
|
2020-09-22 18:45:01 +00:00
|
|
|
static const struct udevice_id generic_chip_i2c_ids[] = {
|
|
|
|
{ .compatible = "i2c-chip", .data = I2C_DEVICE_GENERIC },
|
|
|
|
#if CONFIG_IS_ENABLED(ACPIGEN)
|
|
|
|
{ .compatible = "hid-over-i2c", .data = I2C_DEVICE_HID_OVER_I2C },
|
|
|
|
#endif
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
2014-12-10 15:55:47 +00:00
|
|
|
U_BOOT_DRIVER(i2c_generic_chip_drv) = {
|
|
|
|
.name = "i2c_generic_chip_drv",
|
|
|
|
.id = UCLASS_I2C_GENERIC,
|
2020-09-22 18:45:01 +00:00
|
|
|
.of_match = generic_chip_i2c_ids,
|
|
|
|
#if CONFIG_IS_ENABLED(ACPIGEN)
|
2020-12-03 23:55:21 +00:00
|
|
|
.of_to_plat = acpi_i2c_of_to_plat,
|
2020-12-03 23:55:17 +00:00
|
|
|
.priv_auto = sizeof(struct acpi_i2c_priv),
|
2020-09-22 18:45:01 +00:00
|
|
|
#endif
|
|
|
|
ACPI_OPS_PTR(&acpi_i2c_ops)
|
2014-12-10 15:55:47 +00:00
|
|
|
};
|