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i2c: add dm_i2c_reg_clrset

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Add function to apply a bitmask to an i2c register, so
that specific bits can be cleared and/or set.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Sebastian Reichel 2021-07-15 17:39:59 +02:00 committed by Heiko Schocher
parent 79d389a548
commit 2aefa6e3f2
3 changed files with 58 additions and 0 deletions
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15
drivers/i2c/i2c-uclass.c
View File

@ -247,6 +247,21 @@ int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)
return dm_i2c_write(dev, offset, &val, 1);
}
int dm_i2c_reg_clrset(struct udevice *dev, uint offset, u32 clr, u32 set)
{
uint8_t val;
int ret;
ret = dm_i2c_read(dev, offset, &val, 1);
if (ret < 0)
return ret;
val &= ~clr;
val |= set;
return dm_i2c_write(dev, offset, &val, 1);
}
/**
* i2c_probe_chip() - probe for a chip on a bus
*

14
include/i2c.h
View File

@ -242,6 +242,20 @@ int dm_i2c_reg_read(struct udevice *dev, uint offset);
*/
int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
/**
* dm_i2c_reg_clrset() - Apply bitmask to an I2C register
*
* Read value, apply bitmask and write modified value back to the
* given address in an I2C chip
*
* @dev: Device to use for transfer
* @offset: Address for the R/W operation
* @clr: Bitmask of bits that should be cleared
* @set: Bitmask of bits that should be set
* @return 0 on success, -ve on error
*/
int dm_i2c_reg_clrset(struct udevice *dev, uint offset, u32 clr, u32 set);
/**
* dm_i2c_xfer() - Transfer messages over I2C
*

29
test/dm/i2c.c
View File

@ -304,3 +304,32 @@ static int dm_test_i2c_addr_offset(struct unit_test_state *uts)
}
DM_TEST(dm_test_i2c_addr_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
static int dm_test_i2c_reg_clrset(struct unit_test_state *uts)
{
struct udevice *eeprom;
struct udevice *dev;
u8 buf[5];
ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
/* Do a transfer so we can find the emulator */
ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
/* Dummy data for the test */
ut_assertok(dm_i2c_write(dev, 0, "\xff\x00\xff\x00\x10", 5));
/* Do some clrset tests */
ut_assertok(dm_i2c_reg_clrset(dev, 0, 0xff, 0x10));
ut_assertok(dm_i2c_reg_clrset(dev, 1, 0x00, 0x11));
ut_assertok(dm_i2c_reg_clrset(dev, 2, 0xed, 0x00));
ut_assertok(dm_i2c_reg_clrset(dev, 3, 0xff, 0x13));
ut_assertok(dm_i2c_reg_clrset(dev, 4, 0x00, 0x14));
ut_assertok(dm_i2c_read(dev, 0, buf, 5));
ut_asserteq_mem("\x10\x11\x12\x13\x14", buf, sizeof(buf));
return 0;
}
DM_TEST(dm_test_i2c_reg_clrset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);