linux/drivers/gpu/drm/amd/display/dc
Wenjing Liu ef9d5a54da drm/amd/display: set MSA vsp/hsp to 0 for positive polarity for DP 128b/132b
[why]
There is a bug in MSA programming sequence that mistakenly set
MSA vsp/hsp to 1 for positive polarity. This is incorrect.

Reviewed-by: Ariel Bernstein <Eric.Bernstein@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-22 14:45:01 -05:00
..
basics
bios drm/amd/display: Implement fixed DP drive settings 2021-10-28 14:26:15 -04:00
calcs drm/amd/display: Allocate structs needed by dcn_bw_calc_rq_dlg_ttu in pipe_ctx 2021-09-23 15:17:30 -04:00
clk_mgr drm/amd/display: bring dcn31 clk mgr in line with other version style 2021-11-17 16:58:07 -05:00
core drm/amd/display: Secondary display goes blank on Non DCN31 2021-11-22 14:45:01 -05:00
dce drm/amd/display: Wait for ACK for INBOX0 HW Lock 2021-11-17 16:58:11 -05:00
dce60
dce80
dce100
dce110 drm/amd/display: Add helper for blanking all dp displays 2021-11-17 16:58:05 -05:00
dce112
dce120
dcn10 drm/amd/display: Add helper for blanking all dp displays 2021-11-17 16:58:05 -05:00
dcn20 drm/amd/display: Revert changes for MPO underflow 2021-11-22 14:45:01 -05:00
dcn21 drm/amd/display: Re-arrange FPU code structure for dcn2x 2021-10-06 15:49:24 -04:00
dcn30 drm/amd/display: Revert changes for MPO underflow 2021-11-22 14:45:01 -05:00
dcn31 drm/amd/display: set MSA vsp/hsp to 0 for positive polarity for DP 128b/132b 2021-11-22 14:45:01 -05:00
dcn201 drm/amd/display: Re-arrange FPU code structure for dcn2x 2021-10-06 15:49:24 -04:00
dcn301 drm/amd/display: remove dmcub_support cap dependency 2021-11-17 16:58:05 -05:00
dcn302 drm/amd/display: Revert changes for MPO underflow 2021-11-22 14:45:01 -05:00
dcn303 drm/amd/display: Revert changes for MPO underflow 2021-11-22 14:45:01 -05:00
dml drm/amd/display: Fix bpc calculation for specific encodings 2021-11-03 12:32:34 -04:00
dsc drm/amd/display: Fix Coverity Issues 2021-11-17 16:58:08 -05:00
gpio drm/amd/display: add cyan_skillfish display support 2021-10-04 15:22:57 -04:00
hdcp
inc drm/amd/display: Initialise encoder assignment when initialising dc_state 2021-11-17 16:58:10 -05:00
irq drm/amdgpu/display: fold DRM_AMD_DC_DCN201 into DRM_AMD_DC_DCN 2021-10-04 15:23:02 -04:00
virtual drm/amd/display: Fix issue with dynamic bpp change for DCN3x 2021-09-23 15:17:30 -04:00
dc_bios_types.h
dc_ddc_types.h
dc_dmub_srv.c drm/amd/display: Wait for ACK for INBOX0 HW Lock 2021-11-17 16:58:11 -05:00
dc_dmub_srv.h drm/amd/display: Wait for ACK for INBOX0 HW Lock 2021-11-17 16:58:11 -05:00
dc_dp_types.h drm/amd/display: fix register write sequence for LINK_SQUARE_PATTERN 2021-11-03 12:32:34 -04:00
dc_dsc.h drm/amd/display: move bpp range decision in decide dsc bw range function 2021-09-14 15:57:09 -04:00
dc_edid_parser.c
dc_edid_parser.h
dc_helper.c isystem: ship and use stdarg.h 2021-08-19 09:02:55 +09:00
dc_hw_types.h
dc_link.h drm/amd/display: Add hpd pending flag to indicate detection of new hpd 2021-11-17 16:58:09 -05:00
dc_stat.h drm/amd/display: DMUB Outbound Interrupt Process-X86 2021-07-08 15:14:36 -04:00
dc_stream.h drm/amd/display: Add DP 2.0 MST DC Support 2021-10-25 21:21:08 -04:00
dc_trace.h drm/amd/display: Add control mechanism for FPU utilization 2021-08-05 21:17:59 -04:00
dc_types.h drm/amd/display: Add missing PSR state 2021-10-19 17:19:16 -04:00
dc.h drm/amd/display: 3.2.161 2021-11-17 16:58:09 -05:00
dm_cp_psp.h drm/amd/display: Add support for USB4 on C20 PHY for DCN3.1 2021-10-28 14:26:14 -04:00
dm_event_log.h
dm_helpers.h drm/amd/display: Support for SET_CONFIG processing with DMUB 2021-10-06 15:52:11 -04:00
dm_pp_smu.h
dm_services_types.h
dm_services.h
irq_types.h drm/amd/display: Fix for access for ddc pin and aux engine. 2021-10-06 15:52:48 -04:00
Makefile drm/amd/display: Add stub to get DPIA tunneling device data 2021-10-06 15:51:22 -04:00
os_types.h drm/amd/display: Implement DPIA training loop 2021-10-06 15:51:39 -04:00