Ken Chalmers ece4147fea drm/amd/display: Fix new stream count check in dc_add_stream_to_ctx ... [Why] The previous code could allow through attempts to enable more streams than there are timing generators, in designs where the number of pipes is greater than the number of timing generators. [How] Compare the new stream count to the resource pool's timing generator count, instead of its pipe count. Also correct a typo in the error message. Signed-off-by: Ken Chalmers <ken.chalmers@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-07-13 14:52:00 -05:00
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amdgpu_dm	drm/amd/display: dp debugfs allow link rate lane count greater than dp rx reported caps	2018-07-13 14:51:53 -05:00
dc	drm/amd/display: Fix new stream count check in dc_add_stream_to_ctx	2018-07-13 14:52:00 -05:00
include	drm/amd/display: read DP sink and DP branch hardware and firmware revision from DPCD	2018-07-13 14:48:49 -05:00
modules	drm/amd/display: Use 2-factor allocator calls	2018-07-05 16:40:03 -05:00
Kconfig	drm/amdgpu/display: enable CONFIG_DRM_AMD_DC_DCN1_0 by default	2018-06-15 12:20:30 -05:00
Makefile	drm/amd: Remove inclusion of non-existing include directories	2018-02-26 23:09:38 -05:00
TODO	drm/amd/display: Convert remaining loggers off dc_logger	2018-07-13 14:48:42 -05:00