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drm/amd/display: read DP sink and DP branch hardware and firmware revision from DPCD

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- define new dpcd address in drm
- implement new members in dpcd_caps to store values read from new dpcd address

Signed-off-by: Alvin lee <alvin.lee3@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alvin lee 2018-06-19 15:40:09 -04:00 committed by Alex Deucher
parent e1cb3e4801
commit 4b99affbb3
3 changed files with 33 additions and 0 deletions
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25
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
View File

@ -2262,6 +2262,11 @@ static void get_active_converter_info(
link->dpcd_caps.branch_hw_revision =
dp_hw_fw_revision.ieee_hw_rev;
memmove(
link->dpcd_caps.branch_fw_revision,
dp_hw_fw_revision.ieee_fw_rev,
sizeof(dp_hw_fw_revision.ieee_fw_rev));
}
}
@ -2317,6 +2322,7 @@ static bool retrieve_link_cap(struct dc_link *link)
enum dc_status status = DC_ERROR_UNEXPECTED;
uint32_t read_dpcd_retry_cnt = 3;
int i;
struct dp_sink_hw_fw_revision dp_hw_fw_revision;
memset(dpcd_data, '\0', sizeof(dpcd_data));
memset(&down_strm_port_count,
@ -2408,6 +2414,25 @@ static bool retrieve_link_cap(struct dc_link *link)
(sink_id.ieee_oui[1] << 8) +
(sink_id.ieee_oui[2]);
memmove(
link->dpcd_caps.sink_dev_id_str,
sink_id.ieee_device_id,
sizeof(sink_id.ieee_device_id));
core_link_read_dpcd(
link,
DP_SINK_HW_REVISION_START,
(uint8_t *)&dp_hw_fw_revision,
sizeof(dp_hw_fw_revision));
link->dpcd_caps.sink_hw_revision =
dp_hw_fw_revision.ieee_hw_rev;
memmove(
link->dpcd_caps.sink_fw_revision,
dp_hw_fw_revision.ieee_fw_rev,
sizeof(dp_hw_fw_revision.ieee_fw_rev));
/* Connectivity log: detection */
CONN_DATA_DETECT(link, dpcd_data, sizeof(dpcd_data), "Rx Caps: ");

5
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -628,9 +628,14 @@ struct dpcd_caps {
struct dc_dongle_caps dongle_caps;
uint32_t sink_dev_id;
int8_t sink_dev_id_str[6];
int8_t sink_hw_revision;
int8_t sink_fw_revision[2];
uint32_t branch_dev_id;
int8_t branch_dev_name[6];
int8_t branch_hw_revision;
int8_t branch_fw_revision[2];
bool allow_invalid_MSA_timing_param;
bool panel_mode_edp;

3
drivers/gpu/drm/amd/display/include/dpcd_defs.h
View File

@ -27,6 +27,9 @@
#define __DAL_DPCD_DEFS_H__
#include <drm/drm_dp_helper.h>
#ifndef DP_SINK_HW_REVISION_START // can remove this once the define gets into linux drm_dp_helper.h
#define DP_SINK_HW_REVISION_START 0x409
#endif
enum dpcd_revision {
DPCD_REV_10 = 0x10,