Jiapeng Chong 17c900cb5d drm/amd/display: Simplify bool comparison ...

Fix the following coccicheck warning:

./drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h:319:11-23:
WARNING: Comparison to bool.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2021-02-09 15:49:42 -05:00

..

hw

drm/amd/display: Simplify bool comparison

2021-02-09 15:49:42 -05:00

bw_fixed.h

drm/amd/display: explicit uint64_t casting

2018-11-05 14:20:50 -05:00

clock_source.h

drm/amd/display: Keep clocks high before seamless boot done

2019-03-19 15:04:03 -05:00

compressor.h

drm/amd/display: fbc state could not reach while enable fbc

2018-11-30 12:02:35 -05:00

core_status.h

drm/amd/display: fail instead of div by zero/bugcheck

2020-11-02 15:30:47 -05:00

core_types.h

drm/amd/display: enable HUBP blank behaviour

2021-01-13 23:44:28 -05:00

custom_float.h

…

dc_link_ddc.h

drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update

2020-07-01 01:59:26 -04:00

dc_link_dp.h

drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update

2020-07-01 01:59:26 -04:00

dce_calcs.h

…

dcn_calc_math.h

drm/amd/display: fixup DML dependencies

2020-01-16 14:16:48 -05:00

dcn_calcs.h

drm/amd/display: make clk mgr soc specific

2019-05-31 10:39:29 -05:00

hw_sequencer_private.h

drm/amd/display: move panel power seq to new panel struct

2020-04-22 18:11:48 -04:00

hw_sequencer.h

drm/amd/display: Dynamic cursor cache size for MALL eligibility check

2021-01-21 09:54:26 -05:00

link_hwss.h

drm/amd/display: correct eDP T9 delay

2020-11-02 15:31:10 -05:00

reg_helper.h

drm/amd/display: Indirect reg read macro with shift and mask

2020-01-16 14:13:53 -05:00

resource.h

drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)

2020-11-04 17:11:37 -05:00

vm_helper.h

drm/amd/display: move vmid determination logic to a module

2019-06-22 09:34:14 -05:00