Rex Zhu ad8cec7df5 drm/amd/pp: Implement get_max_high_clocks for CI/VI ... v2: add table length check. DC component expect PP to give max engine clock and memory clock through pp_get_display_mode_validation_clocks on DGPU as well. This patch can fix MultiGPU-Display blank out with 1 IGPU-4k display and 2 DGPU-two 4K displays. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-01-10 15:44:55 -05:00
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hwmgr	drm/amd/pp: Implement get_max_high_clocks for CI/VI	2018-01-10 15:44:55 -05:00
inc	drm/amd/pp: Move smu_version to common code	2017-12-20 11:56:48 -05:00
smumgr	drm/amd/powerplay: fix memory leakage when reload (v2)	2018-01-10 15:44:50 -05:00
amd_powerplay.c	drm/amd/powerplay: set pp_num_states as 0 on error situation	2018-01-10 15:44:52 -05:00
Makefile	drm/amdgpu: add license to Makefiles	2017-12-07 11:51:10 -05:00