Rex Zhu ad8cec7df5 drm/amd/pp: Implement get_max_high_clocks for CI/VI ... v2: add table length check. DC component expect PP to give max engine clock and memory clock through pp_get_display_mode_validation_clocks on DGPU as well. This patch can fix MultiGPU-Display blank out with 1 IGPU-4k display and 2 DGPU-two 4K displays. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-01-10 15:44:55 -05:00
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drm	drm/amd/pp: Implement get_max_high_clocks for CI/VI	2018-01-10 15:44:55 -05:00
host1x	main drm pull request for v4.15	2017-11-15 20:42:10 -08:00
ipu-v3	gpu: ipu-v3: allow to build with COMPILE_TEST	2017-12-19 12:49:11 +01:00
vga	vgaarb: Factor out EFI and fallback default device selection	2017-10-18 10:04:56 +02:00
Makefile