Stafford Horne a4d4426635 openrisc: head: Init r0 to 0 on start ... Originally openrisc spec 0 specified that r0 would be wired to ground. This is no longer the case. r0 is not guaranteed to be 0 at init, so we need to initialize it to 0 before using it. Also, if we are clearing r0 we cant use r0 to clear itself. Change the the CLEAR_GPR macro to use movhi for clearing. Reported-by: Jakob Viketoft <jakob.viketoft@aacmicrotec.com> Signed-off-by: Stafford Horne <shorne@gmail.com>		2017-02-25 05:08:47 +09:00
..
.gitignore	openrisc: Add .gitignore	2017-02-25 04:14:36 +09:00
asm-offsets.c
dma.c	arch/openrisc: add option to skip DMA sync as a part of mapping	2016-12-14 16:04:07 -08:00
entry.S	openrisc: entry: Fix delay slot detection	2017-02-25 04:31:06 +09:00
head.S	openrisc: head: Init r0 to 0 on start	2017-02-25 05:08:47 +09:00
irq.c	openrisc: Get rid of handle_IRQ	2014-09-03 13:11:02 +00:00
Makefile	openrisc: Use generic idle loop	2013-04-08 17:39:27 +02:00
module.c	openrisc: Refactor 16-bit constant relocation	2013-11-05 16:27:55 +01:00
or32_ksyms.c	openrisc: Add optimized memset	2017-02-25 04:14:35 +09:00
process.c	openrisc: Initial support for the idle state	2017-02-25 04:14:35 +09:00
prom.c	openrisc: remove unnecessary prom.c includes	2013-10-09 11:39:01 -05:00
ptrace.c	openrisc: remove unnecessary stddef.h include	2017-02-25 04:14:34 +09:00
setup.c	openrisc: add cache way information to cpuinfo	2017-02-06 21:50:41 +09:00
signal.c	Replace <asm/uaccess.h> with <linux/uaccess.h> globally	2016-12-24 11:46:01 -08:00
sys_call_table.c
time.c	clocksource: Use a plain u64 instead of cycle_t	2016-12-25 11:04:12 +01:00
traps.c	openrisc: add l.lwa/l.swa emulation	2017-02-06 21:50:43 +09:00
vmlinux.h	of/fdt: consolidate built-in dtb section variables	2014-04-30 00:59:13 -05:00
vmlinux.lds.S	openrisc: Add _text symbol to fix ksym build error	2017-01-02 10:35:11 +09:00