linux/arch/arm64
Ard Biesheuvel a257e02579 arm64/kernel: don't ban ADRP to work around Cortex-A53 erratum #843419
Working around Cortex-A53 erratum #843419 involves special handling of
ADRP instructions that end up in the last two instruction slots of a
4k page, or whose output register gets overwritten without having been
read. (Note that the latter instruction sequence is never emitted by
a properly functioning compiler, which is why it is disregarded by the
handling of the same erratum in the bfd.ld linker which we rely on for
the core kernel)

Normally, this gets taken care of by the linker, which can spot such
sequences at final link time, and insert a veneer if the ADRP ends up
at a vulnerable offset. However, linux kernel modules are partially
linked ELF objects, and so there is no 'final link time' other than the
runtime loading of the module, at which time all the static relocations
are resolved.

For this reason, we have implemented the #843419 workaround for modules
by avoiding ADRP instructions altogether, by using the large C model,
and by passing -mpc-relative-literal-loads to recent versions of GCC
that may emit adrp/ldr pairs to perform literal loads. However, this
workaround forces us to keep literal data mixed with the instructions
in the executable .text segment, and literal data may inadvertently
turn into an exploitable speculative gadget depending on the relative
offsets of arbitrary symbols.

So let's reimplement this workaround in a way that allows us to switch
back to the small C model, and to drop the -mpc-relative-literal-loads
GCC switch, by patching affected ADRP instructions at runtime:
- ADRP instructions that do not appear at 4k relative offset 0xff8 or
  0xffc are ignored
- ADRP instructions that are within 1 MB of their target symbol are
  converted into ADR instructions
- remaining ADRP instructions are redirected via a veneer that performs
  the load using an unaffected movn/movk sequence.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
[will: tidied up ADRP -> ADR instruction patching.]
[will: use ULL suffix for 64-bit immediate]
Signed-off-by: Will Deacon <will.deacon@arm.com>
2018-03-09 13:21:53 +00:00
..
boot ARM: SoC device tree updates for 4.16 2018-02-01 16:07:54 -08:00
configs ARM: SoC platform updates for 4.16 2018-02-01 16:17:40 -08:00
crypto crypto: arm64/sha512 - fix/improve new v8.2 Crypto Extensions code 2018-01-26 01:10:36 +11:00
include arm64/kernel: don't ban ADRP to work around Cortex-A53 erratum #843419 2018-03-09 13:21:53 +00:00
kernel arm64/kernel: don't ban ADRP to work around Cortex-A53 erratum #843419 2018-03-09 13:21:53 +00:00
kvm arm64: Add missing Falkor part number for branch predictor hardening 2018-02-12 11:28:45 +00:00
lib arm64: lse: Pass -fomit-frame-pointer to out-of-line ll/sc atomics 2018-03-06 18:52:32 +00:00
mm arm64: kaslr: Set TCR_EL1.NFD1 when CONFIG_RANDOMIZE_BASE=y 2018-03-06 18:52:34 +00:00
net bpf, arm64: fix out of bounds access in tail call 2018-02-22 16:06:28 -08:00
xen arm64: mm: Add additional parameter to uaccess_ttbr0_disable 2018-01-17 13:57:49 +01:00
Kconfig arm64/kernel: don't ban ADRP to work around Cortex-A53 erratum #843419 2018-03-09 13:21:53 +00:00
Kconfig.debug arm64: relocation testing module 2017-04-04 17:03:32 +01:00
Kconfig.platforms clk: meson-axg: add clock controller drivers 2017-12-14 10:19:37 +01:00
Makefile arm64/kernel: don't ban ADRP to work around Cortex-A53 erratum #843419 2018-03-09 13:21:53 +00:00