d6001aed26
[Why] Current periodic interrupt start point calc in optc is not clear. [How] 1. DM convert delta time to lines number and dc will calculate the start position as per lines number and interrupt type. 2. hwss calculates the start point as per line offset. 3. optc programs vertical interrupts register as per start point and interrupt source. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
250 lines
6.6 KiB
C
250 lines
6.6 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __DC_HW_SEQUENCER_H__
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#define __DC_HW_SEQUENCER_H__
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#include "dc_types.h"
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#include "clock_source.h"
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#include "inc/hw/timing_generator.h"
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#include "inc/hw/opp.h"
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#include "inc/hw/link_encoder.h"
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#include "core_status.h"
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enum pipe_gating_control {
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PIPE_GATING_CONTROL_DISABLE = 0,
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PIPE_GATING_CONTROL_ENABLE,
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PIPE_GATING_CONTROL_INIT
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};
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enum vline_select {
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VLINE0,
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VLINE1
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};
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struct dce_hwseq_wa {
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bool blnd_crtc_trigger;
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bool DEGVIDCN10_253;
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bool false_optc_underflow;
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bool DEGVIDCN10_254;
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};
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struct hwseq_wa_state {
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bool DEGVIDCN10_253_applied;
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};
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struct dce_hwseq {
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struct dc_context *ctx;
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const struct dce_hwseq_registers *regs;
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const struct dce_hwseq_shift *shifts;
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const struct dce_hwseq_mask *masks;
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struct dce_hwseq_wa wa;
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struct hwseq_wa_state wa_state;
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};
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struct pipe_ctx;
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struct dc_state;
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struct dchub_init_data;
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struct dc_static_screen_events;
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struct resource_pool;
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struct resource_context;
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struct stream_resource;
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struct hw_sequencer_funcs {
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void (*disable_stream_gating)(struct dc *dc, struct pipe_ctx *pipe_ctx);
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void (*enable_stream_gating)(struct dc *dc, struct pipe_ctx *pipe_ctx);
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void (*init_hw)(struct dc *dc);
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void (*init_pipes)(struct dc *dc, struct dc_state *context);
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enum dc_status (*apply_ctx_to_hw)(
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struct dc *dc, struct dc_state *context);
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void (*reset_hw_ctx_wrap)(
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struct dc *dc, struct dc_state *context);
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void (*apply_ctx_for_surface)(
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struct dc *dc,
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const struct dc_stream_state *stream,
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int num_planes,
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struct dc_state *context);
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void (*program_gamut_remap)(
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struct pipe_ctx *pipe_ctx);
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void (*program_output_csc)(struct dc *dc,
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struct pipe_ctx *pipe_ctx,
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enum dc_color_space colorspace,
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uint16_t *matrix,
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int opp_id);
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void (*update_plane_addr)(
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const struct dc *dc,
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struct pipe_ctx *pipe_ctx);
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void (*plane_atomic_disconnect)(
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struct dc *dc,
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struct pipe_ctx *pipe_ctx);
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void (*update_dchub)(
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struct dce_hwseq *hws,
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struct dchub_init_data *dh_data);
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void (*update_mpcc)(
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struct dc *dc,
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struct pipe_ctx *pipe_ctx);
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void (*update_pending_status)(
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struct pipe_ctx *pipe_ctx);
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bool (*set_input_transfer_func)(
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struct pipe_ctx *pipe_ctx,
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const struct dc_plane_state *plane_state);
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bool (*set_output_transfer_func)(
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struct pipe_ctx *pipe_ctx,
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const struct dc_stream_state *stream);
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void (*power_down)(struct dc *dc);
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void (*enable_accelerated_mode)(struct dc *dc, struct dc_state *context);
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void (*enable_timing_synchronization)(
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struct dc *dc,
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int group_index,
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int group_size,
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struct pipe_ctx *grouped_pipes[]);
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void (*enable_per_frame_crtc_position_reset)(
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struct dc *dc,
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int group_size,
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struct pipe_ctx *grouped_pipes[]);
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void (*enable_display_pipe_clock_gating)(
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struct dc_context *ctx,
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bool clock_gating);
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bool (*enable_display_power_gating)(
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struct dc *dc,
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uint8_t controller_id,
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struct dc_bios *dcb,
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enum pipe_gating_control power_gating);
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void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
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void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
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void (*enable_stream)(struct pipe_ctx *pipe_ctx);
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void (*disable_stream)(struct pipe_ctx *pipe_ctx,
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int option);
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void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
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struct dc_link_settings *link_settings);
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void (*blank_stream)(struct pipe_ctx *pipe_ctx);
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void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
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void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx, int option);
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void (*pipe_control_lock)(
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struct dc *dc,
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struct pipe_ctx *pipe,
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bool lock);
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void (*blank_pixel_data)(
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struct dc *dc,
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struct pipe_ctx *pipe_ctx,
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bool blank);
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void (*prepare_bandwidth)(
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struct dc *dc,
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struct dc_state *context);
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void (*optimize_bandwidth)(
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struct dc *dc,
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struct dc_state *context);
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void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
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int vmin, int vmax);
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void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
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struct crtc_position *position);
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void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
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int num_pipes, const struct dc_static_screen_events *events);
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enum dc_status (*enable_stream_timing)(
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struct pipe_ctx *pipe_ctx,
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struct dc_state *context,
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struct dc *dc);
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void (*setup_stereo)(
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struct pipe_ctx *pipe_ctx,
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struct dc *dc);
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void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
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void (*log_hw_state)(struct dc *dc,
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struct dc_log_buffer_ctx *log_ctx);
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void (*get_hw_state)(struct dc *dc, char *pBuf, unsigned int bufSize, unsigned int mask);
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void (*clear_status_bits)(struct dc *dc, unsigned int mask);
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void (*wait_for_mpcc_disconnect)(struct dc *dc,
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struct resource_pool *res_pool,
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struct pipe_ctx *pipe_ctx);
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void (*edp_power_control)(
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struct dc_link *link,
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bool enable);
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void (*edp_backlight_control)(
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struct dc_link *link,
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bool enable);
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void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
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void (*set_cursor_position)(struct pipe_ctx *pipe);
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void (*set_cursor_attribute)(struct pipe_ctx *pipe);
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void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
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void (*setup_periodic_interrupt)(struct pipe_ctx *pipe_ctx, enum vline_select vline);
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void (*setup_vupdate_interrupt)(struct pipe_ctx *pipe_ctx);
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};
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void color_space_to_black_color(
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const struct dc *dc,
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enum dc_color_space colorspace,
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struct tg_color *black_color);
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bool hwss_wait_for_blank_complete(
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struct timing_generator *tg);
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const uint16_t *find_color_matrix(
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enum dc_color_space color_space,
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uint32_t *array_size);
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#endif /* __DC_HW_SEQUENCER_H__ */
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