forked from Minki/linux
14d1d19086
Since our seqno value comes from a counter associated with the GPU ring, not the entity (aka client), they'll be completed out of order. There's actually no need for this code at all, since we don't have enable_signaling() and thus DMA_FENCE_SIGNALED_BIT will be set before we could be called. Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20180605190302.18279-2-eric@anholt.net Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
54 lines
1.3 KiB
C
54 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/* Copyright (C) 2017-2018 Broadcom */
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#include "v3d_drv.h"
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struct dma_fence *v3d_fence_create(struct v3d_dev *v3d, enum v3d_queue queue)
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{
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struct v3d_fence *fence;
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fence = kzalloc(sizeof(*fence), GFP_KERNEL);
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if (!fence)
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return ERR_PTR(-ENOMEM);
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fence->dev = &v3d->drm;
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fence->queue = queue;
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fence->seqno = ++v3d->queue[queue].emit_seqno;
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dma_fence_init(&fence->base, &v3d_fence_ops, &v3d->job_lock,
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v3d->queue[queue].fence_context, fence->seqno);
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return &fence->base;
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}
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static const char *v3d_fence_get_driver_name(struct dma_fence *fence)
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{
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return "v3d";
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}
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static const char *v3d_fence_get_timeline_name(struct dma_fence *fence)
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{
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struct v3d_fence *f = to_v3d_fence(fence);
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if (f->queue == V3D_BIN)
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return "v3d-bin";
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else
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return "v3d-render";
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}
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static bool v3d_fence_enable_signaling(struct dma_fence *fence)
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{
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return true;
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}
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const struct dma_fence_ops v3d_fence_ops = {
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.get_driver_name = v3d_fence_get_driver_name,
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.get_timeline_name = v3d_fence_get_timeline_name,
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.enable_signaling = v3d_fence_enable_signaling,
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/* Each of our fences gets signaled as complete by the IRQ
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* handler, so we rely on the core's tracking of signaling.
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*/
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.signaled = NULL,
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.wait = dma_fence_default_wait,
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.release = dma_fence_free,
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};
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