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linux/drivers/gpu/drm/amd/display/dc/inc
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Alex Deucher 20f2ffe504 drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 
Avoids confusion in configurations.

v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled
v3: rebase on latest code

Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 17:11:37 -05:00
..
hw drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
bw_fixed.h
clock_source.h
compressor.h
core_status.h drm/amd/display: fail instead of div by zero/bugcheck 2020-11-02 15:30:47 -05:00
core_types.h drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
custom_float.h
dc_link_ddc.h drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update 2020-07-01 01:59:26 -04:00
dc_link_dp.h drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update 2020-07-01 01:59:26 -04:00
dce_calcs.h
dcn_calc_math.h drm/amd/display: fixup DML dependencies 2020-01-16 14:16:48 -05:00
dcn_calcs.h drm/amd/display: make clk mgr soc specific 2019-05-31 10:39:29 -05:00
hw_sequencer_private.h drm/amd/display: move panel power seq to new panel struct 2020-04-22 18:11:48 -04:00
hw_sequencer.h drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
link_hwss.h drm/amd/display: correct eDP T9 delay 2020-11-02 15:31:10 -05:00
reg_helper.h drm/amd/display: Indirect reg read macro with shift and mask 2020-01-16 14:13:53 -05:00
resource.h drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) 2020-11-04 17:11:37 -05:00
vm_helper.h drm/amd/display: move vmid determination logic to a module 2019-06-22 09:34:14 -05:00