793c82eebb
[Why] To support a new visual confirm mode: swizzle to show the specific color at the screen border according to different surface swizzle mode. Currently we only support the Linear mode with red color. Signed-off-by: Po-Ting Chen <robin.chen@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
275 lines
9.3 KiB
C
275 lines
9.3 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __DC_HW_SEQUENCER_H__
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#define __DC_HW_SEQUENCER_H__
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#include "dc_types.h"
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#include "clock_source.h"
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#include "inc/hw/timing_generator.h"
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#include "inc/hw/opp.h"
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#include "inc/hw/link_encoder.h"
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#include "core_status.h"
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enum vline_select {
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VLINE0,
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VLINE1
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};
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struct pipe_ctx;
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struct dc_state;
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struct dc_stream_status;
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struct dc_writeback_info;
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struct dchub_init_data;
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struct dc_static_screen_params;
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struct resource_pool;
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struct dc_phy_addr_space_config;
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struct dc_virtual_addr_space_config;
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struct dpp;
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struct dce_hwseq;
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struct hw_sequencer_funcs {
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void (*hardware_release)(struct dc *dc);
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/* Embedded Display Related */
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void (*edp_power_control)(struct dc_link *link, bool enable);
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void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
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void (*edp_wait_for_T12)(struct dc_link *link);
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/* Pipe Programming Related */
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void (*init_hw)(struct dc *dc);
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void (*power_down_on_boot)(struct dc *dc);
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void (*enable_accelerated_mode)(struct dc *dc,
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struct dc_state *context);
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enum dc_status (*apply_ctx_to_hw)(struct dc *dc,
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struct dc_state *context);
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void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
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void (*apply_ctx_for_surface)(struct dc *dc,
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const struct dc_stream_state *stream,
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int num_planes, struct dc_state *context);
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void (*program_front_end_for_ctx)(struct dc *dc,
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struct dc_state *context);
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void (*wait_for_pending_cleared)(struct dc *dc,
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struct dc_state *context);
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void (*post_unlock_program_front_end)(struct dc *dc,
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struct dc_state *context);
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void (*update_plane_addr)(const struct dc *dc,
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struct pipe_ctx *pipe_ctx);
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void (*update_dchub)(struct dce_hwseq *hws,
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struct dchub_init_data *dh_data);
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void (*wait_for_mpcc_disconnect)(struct dc *dc,
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struct resource_pool *res_pool,
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struct pipe_ctx *pipe_ctx);
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void (*edp_backlight_control)(
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struct dc_link *link,
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bool enable);
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void (*program_triplebuffer)(const struct dc *dc,
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struct pipe_ctx *pipe_ctx, bool enableTripleBuffer);
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void (*update_pending_status)(struct pipe_ctx *pipe_ctx);
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void (*power_down)(struct dc *dc);
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/* Pipe Lock Related */
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void (*pipe_control_lock)(struct dc *dc,
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struct pipe_ctx *pipe, bool lock);
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void (*interdependent_update_lock)(struct dc *dc,
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struct dc_state *context, bool lock);
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void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx,
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bool flip_immediate);
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void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock);
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/* Timing Related */
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void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
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struct crtc_position *position);
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int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx);
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void (*calc_vupdate_position)(
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struct dc *dc,
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struct pipe_ctx *pipe_ctx,
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uint32_t *start_line,
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uint32_t *end_line);
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void (*enable_per_frame_crtc_position_reset)(struct dc *dc,
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int group_size, struct pipe_ctx *grouped_pipes[]);
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void (*enable_timing_synchronization)(struct dc *dc,
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int group_index, int group_size,
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struct pipe_ctx *grouped_pipes[]);
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void (*enable_vblanks_synchronization)(struct dc *dc,
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int group_index, int group_size,
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struct pipe_ctx *grouped_pipes[]);
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void (*setup_periodic_interrupt)(struct dc *dc,
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struct pipe_ctx *pipe_ctx,
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enum vline_select vline);
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void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
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struct dc_crtc_timing_adjust adjust);
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void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
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int num_pipes,
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const struct dc_static_screen_params *events);
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#ifndef TRIM_FSFT
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bool (*optimize_timing_for_fsft)(struct dc *dc,
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struct dc_crtc_timing *timing,
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unsigned int max_input_rate_in_khz);
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#endif
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/* Stream Related */
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void (*enable_stream)(struct pipe_ctx *pipe_ctx);
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void (*disable_stream)(struct pipe_ctx *pipe_ctx);
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void (*blank_stream)(struct pipe_ctx *pipe_ctx);
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void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
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struct dc_link_settings *link_settings);
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/* Bandwidth Related */
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void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context);
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bool (*update_bandwidth)(struct dc *dc, struct dc_state *context);
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void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context);
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/* Infopacket Related */
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void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
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void (*send_immediate_sdp_message)(
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struct pipe_ctx *pipe_ctx,
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const uint8_t *custom_sdp_message,
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unsigned int sdp_message_size);
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void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
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void (*set_dmdata_attributes)(struct pipe_ctx *pipe);
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void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx);
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bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx);
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/* Cursor Related */
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void (*set_cursor_position)(struct pipe_ctx *pipe);
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void (*set_cursor_attribute)(struct pipe_ctx *pipe);
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void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
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/* Colour Related */
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void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx);
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void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx,
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enum dc_color_space colorspace,
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uint16_t *matrix, int opp_id);
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/* VM Related */
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int (*init_sys_ctx)(struct dce_hwseq *hws,
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struct dc *dc,
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struct dc_phy_addr_space_config *pa_config);
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void (*init_vm_ctx)(struct dce_hwseq *hws,
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struct dc *dc,
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struct dc_virtual_addr_space_config *va_config,
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int vmid);
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/* Writeback Related */
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void (*update_writeback)(struct dc *dc,
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struct dc_writeback_info *wb_info,
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struct dc_state *context);
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void (*enable_writeback)(struct dc *dc,
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struct dc_writeback_info *wb_info,
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struct dc_state *context);
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void (*disable_writeback)(struct dc *dc,
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unsigned int dwb_pipe_inst);
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bool (*mmhubbub_warmup)(struct dc *dc,
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unsigned int num_dwb,
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struct dc_writeback_info *wb_info);
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/* Clock Related */
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enum dc_status (*set_clock)(struct dc *dc,
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enum dc_clock_type clock_type,
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uint32_t clk_khz, uint32_t stepping);
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void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type,
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struct dc_clock_config *clock_cfg);
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void (*optimize_pwr_state)(const struct dc *dc,
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struct dc_state *context);
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void (*exit_optimized_pwr_state)(const struct dc *dc,
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struct dc_state *context);
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/* Audio Related */
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void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
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void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx);
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/* Stereo 3D Related */
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void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc);
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/* HW State Logging Related */
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void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx);
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void (*get_hw_state)(struct dc *dc, char *pBuf,
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unsigned int bufSize, unsigned int mask);
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void (*clear_status_bits)(struct dc *dc, unsigned int mask);
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bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx,
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uint32_t backlight_pwm_u16_16,
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uint32_t frame_ramp);
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void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx);
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void (*set_pipe)(struct pipe_ctx *pipe_ctx);
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void (*get_dcc_en_bits)(struct dc *dc, int *dcc_en_bits);
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/* Idle Optimization Related */
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bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable);
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bool (*does_plane_fit_in_mall)(struct dc *dc, struct dc_plane_state *plane,
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struct dc_cursor_attributes *cursor_attr);
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bool (*is_abm_supported)(struct dc *dc,
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struct dc_state *context, struct dc_stream_state *stream);
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void (*set_disp_pattern_generator)(const struct dc *dc,
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struct pipe_ctx *pipe_ctx,
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enum controller_dp_test_pattern test_pattern,
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enum controller_dp_color_space color_space,
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enum dc_color_depth color_depth,
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const struct tg_color *solid_color,
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int width, int height, int offset);
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#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
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void (*z10_restore)(struct dc *dc);
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#endif
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void (*update_visual_confirm_color)(struct dc *dc,
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struct pipe_ctx *pipe_ctx,
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struct tg_color *color,
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int mpcc_id);
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};
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void color_space_to_black_color(
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const struct dc *dc,
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enum dc_color_space colorspace,
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struct tg_color *black_color);
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bool hwss_wait_for_blank_complete(
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struct timing_generator *tg);
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const uint16_t *find_color_matrix(
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enum dc_color_space color_space,
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uint32_t *array_size);
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void get_surface_visual_confirm_color(
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const struct pipe_ctx *pipe_ctx,
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struct tg_color *color);
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void get_hdr_visual_confirm_color(
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struct pipe_ctx *pipe_ctx,
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struct tg_color *color);
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void get_mpctree_visual_confirm_color(
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struct pipe_ctx *pipe_ctx,
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struct tg_color *color);
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void get_surface_tile_visual_confirm_color(
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struct pipe_ctx *pipe_ctx,
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struct tg_color *color);
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#endif /* __DC_HW_SEQUENCER_H__ */
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