linux/drivers/clk/renesas
Geert Uytterhoeven ceabbf94c3 clk: renesas: r9a06g032: Drop __packed for portability
The R9A06G032 clock driver uses an array of packed structures to reduce
kernel size.  However, this array contains pointers, which are no longer
aligned naturally, and cannot be relocated on PPC64.  Hence when
compile-testing this driver on PPC64 with CONFIG_RELOCATABLE=y (e.g.
PowerPC allyesconfig), the following warnings are produced:

    WARNING: 136 bad relocations
    c000000000616be3 R_PPC64_UADDR64   .rodata+0x00000000000cf338
    c000000000616bfe R_PPC64_UADDR64   .rodata+0x00000000000cf370
    ...

Fix this by dropping the __packed attribute from the r9a06g032_clkdesc
definition, trading a small size increase for portability.

This increases the 156-entry clock table by 1 byte per entry, but due to
the compiler generating more efficient code for unpacked accesses, the
net size increase is only 76 bytes (gcc 9.3.0 on arm32).

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Fixes: 4c3d88526e ("clk: renesas: Renesas R9A06G032 clock driver")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201130085743.1656317-1-geert+renesas@glider.be
Tested-by: Stephen Rothwell <sfr@canb.auug.org.au> # PowerPC allyesconfig build
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-12-07 13:58:49 -08:00
..
clk-div6.c clk: renesas: div6: Combine clock-private and parent array allocation 2019-06-20 11:36:29 +02:00
clk-div6.h We have two changes to the core framework this time around. The first being a 2017-11-17 20:04:24 -08:00
clk-emev2.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-mstp.c clk: renesas: mstp: Delete unnecessary kfree() in cpg_mstp_clocks_init() 2019-10-01 09:50:28 +02:00
clk-r8a73a4.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-r8a7740.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-r8a7778.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-r8a7779.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-rz.c remove ioremap_nocache and devm_ioremap_nocache 2020-01-06 09:45:59 +01:00
clk-sh73a0.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
Kconfig clk: renesas: rcar-gen3: Update description for RZ/G2 2020-09-17 15:32:25 +02:00
Makefile clk: renesas: cpg-mssr: Add support for R-Car V3U 2020-09-17 15:32:25 +02:00
r7s9210-cpg-mssr.c clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag 2020-09-17 15:30:08 +02:00
r8a774a1-cpg-mssr.c clk: renesas: rzg2: Mark RWDT clocks as critical 2020-06-22 16:54:32 +02:00
r8a774b1-cpg-mssr.c clk: renesas: rzg2: Mark RWDT clocks as critical 2020-06-22 16:54:32 +02:00
r8a774c0-cpg-mssr.c clk: renesas: rzg2: Mark RWDT clocks as critical 2020-06-22 16:54:32 +02:00
r8a774e1-cpg-mssr.c clk: renesas: cpg-mssr: Add r8a774e1 support 2020-07-13 10:36:33 +02:00
r8a779a0-cpg-mssr.c clk: renesas: cpg-mssr: Add support for R-Car V3U 2020-09-17 15:32:25 +02:00
r8a7742-cpg-mssr.c clk: renesas: r8a7742: Add clk entry for VSPR 2020-09-04 09:42:01 +02:00
r8a7743-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7745-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7790-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7791-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7792-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7794-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7795-cpg-mssr.c clk: renesas: rcar-gen3: Mark RWDT clocks as critical 2020-06-22 16:53:49 +02:00
r8a7796-cpg-mssr.c clk: renesas: rcar-gen3: Mark RWDT clocks as critical 2020-06-22 16:53:49 +02:00
r8a77470-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a77965-cpg-mssr.c clk: renesas: rcar-gen3: Mark RWDT clocks as critical 2020-06-22 16:53:49 +02:00
r8a77970-cpg-mssr.c clk: renesas: rcar-gen3: Mark RWDT clocks as critical 2020-06-22 16:53:49 +02:00
r8a77980-cpg-mssr.c clk: renesas: rcar-gen3: Mark RWDT clocks as critical 2020-06-22 16:53:49 +02:00
r8a77990-cpg-mssr.c clk: renesas: rcar-gen3: Mark RWDT clocks as critical 2020-06-22 16:53:49 +02:00
r8a77995-cpg-mssr.c clk: renesas: rcar-gen3: Mark RWDT clocks as critical 2020-06-22 16:53:49 +02:00
r9a06g032-clocks.c clk: renesas: r9a06g032: Drop __packed for portability 2020-12-07 13:58:49 -08:00
rcar-gen2-cpg.c clk: renesas: rcar-gen2: Switch Z clock to .determine_rate() 2019-10-21 09:53:43 +02:00
rcar-gen2-cpg.h clk: renesas: rcar-gen2: Change multipliers and dividers to u8 2019-12-10 10:24:10 +01:00
rcar-gen3-cpg.c clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks 2019-12-20 15:02:15 +01:00
rcar-gen3-cpg.h Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and 'clk-spdx' into clk-next 2019-05-07 11:45:29 -07:00
rcar-usb2-clock-sel.c clk: renesas: rcar-usb2-clock-sel: Add reset_control 2020-03-09 09:29:58 +01:00
renesas-cpg-mssr.c clk: renesas: cpg-mssr: Add support for R-Car V3U 2020-09-17 15:32:25 +02:00
renesas-cpg-mssr.h clk: renesas: cpg-mssr: Add support for R-Car V3U 2020-09-17 15:32:25 +02:00