Wenjing Liu 1cf49dea28 drm/amd/display: do not reset lane count in EQ fallback ... [Description] According to DP1.4 specs we should not reset lane count back when falling back in failing EQ training. This causes PHY test pattern compliance to fail as infinite LT when LT fails EQ to 4 RBR and fails CR in a loop. Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2017-09-26 18:17:08 -04:00
..
amdgpu_dm	drm/amd/display: Don't leak dc_stream_state.	2017-09-26 18:17:07 -04:00
dc	drm/amd/display: do not reset lane count in EQ fallback	2017-09-26 18:17:08 -04:00
include	drm/amd/display: Implement HDMI retimer settings for RV AM4 support.	2017-09-26 18:16:45 -04:00
modules	drm/amd/display: Clean up flattening core_dc to dc	2017-09-26 18:17:07 -04:00
Kconfig	drm/amd/display: Limit DCN to x86 arch	2017-09-26 18:07:32 -04:00
Makefile
TODO	drm/amd/display: Add a TODO list	2017-09-26 18:16:34 -04:00