133e8e1b35
Before this change, pipe split was disabled by bumping up dpp clock bounding box for DPM level 0 and 1, this allows validation to pass without splitting at a lower DPM level. This change reverts this and instead lowers display clock at DPM level 0, this forces configurations that need pipe split at DPM level 0 to go to DPM level 1, where they can be driven without split. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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| .. | ||
| bw_fixed.c | ||
| custom_float.c | ||
| dce_calcs.c | ||
| dcn_calc_auto.c | ||
| dcn_calc_auto.h | ||
| dcn_calc_math.c | ||
| dcn_calc_math.h | ||
| dcn_calcs.c | ||
| Makefile | ||