forked from Minki/linux
5d17ba6e63
Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based upon Tegra210 SoC with 3 GiB of LPDDR4 RAM. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Tested-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
84 lines
1.4 KiB
Plaintext
84 lines
1.4 KiB
Plaintext
/dts-v1/;
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#include "tegra210.dtsi"
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/ {
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model = "Google Pixel C";
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compatible = "google,smaug-rev8", "google,smaug-rev7",
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"google,smaug-rev6", "google,smaug-rev5",
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"google,smaug-rev4", "google,smaug-rev3",
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"google,smaug-rev1", "google,smaug", "nvidia,tegra210";
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aliases {
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serial0 = &uarta;
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0xc0000000>;
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};
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serial@70006000 {
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status = "okay";
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};
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pmc@7000e400 {
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nvidia,invert-interrupt;
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nvidia,suspend-mode = <0>;
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nvidia,cpu-pwr-good-time = <0>;
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nvidia,cpu-pwr-off-time = <0>;
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nvidia,core-pwr-good-time = <12000 6000>;
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nvidia,core-pwr-off-time = <39053>;
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nvidia,core-power-req-active-high;
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nvidia,sys-clock-req-active-high;
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status = "okay";
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};
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sdhci@700b0600 {
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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clk32k_in: clock@0 {
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compatible = "fixed-clock";
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reg = <0>;
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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cpus {
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cpu@0 {
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enable-method = "psci";
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};
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cpu@1 {
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enable-method = "psci";
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};
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cpu@2 {
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enable-method = "psci";
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};
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cpu@3 {
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enable-method = "psci";
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};
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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};
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