This supports SoC(s) with multiple B/QMan instances
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
'ranges' are specified as <base size> not as <start end>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This binding is for FMan MDIO, it covers FMan v2 & FMan v3.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
[scottwood@freescale.com: mark interrupts required only for external]
Signed-off-by: Scott Wood <scottwood@freescale.com>
Add a property for defining device outputs the LED
represented by the DT child node is connected to.
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Bryan Wu <cooloney@gmail.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
Acked-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
- for all of Samsung SoCs
: use generic power domain bindings
: add 'dr_mode' property for hsotg/dwc2 devices
- exynos3250-rinato and exynos3250-monk
: add regulator-haptic
- exynos5422-odroidxu3
: reduce total RAM by 22 MiB because last 22 MiB
for secure monitor cannot be accessed by kernel
: add on-board INA231 sensors and LDO26 of PMIC
for the sensors
Note that this is based on tags/samsung-dt
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJUyXYCAAoJEA0Cl+kVi2xqZCMP/2B41IOspFq1wAbCLGNDT3sU
sc1z7FR0OSXGVTsIkAQk1dIj9KpEKaygDezF1/3q/csc7lCFWoDDwdTR+zzatrzH
cOyZnecMW/OOzzavc/qbUIfaJQjXwG1MNsdED44taJGJngG3NPvOmJJtA9HBPCPQ
Fv9gmZF/PnstOl2I5exx3mznPIf7LRysHezj6rjbIO5R7znMcc56IegTQm59jY8+
8i1njDINAhVDWGaLHAhDGy5gLEMHI5lST+NP0M9dnSf6pN53Ua20wPEsn5SJ7vRw
Rn6frmZr/lIbKz0JlZtoU+QEcLUiJB7/ZYfKJGzKI5KmF9T3q+Rv+Su+JbGnQciL
3EUy3lh/NDqW6Vvuy+G5UAg5lZ39Pt7BE/F6a0hT1GvRKYnsnY2XfTkIibmD8VDr
0kLPJESKt1z8x5bowlBKlYe6sxU3/x2bYWBpAg0wMbt7oOz99w4kTgxNaJmiyL7y
gda3IXWTkJ9z3sncW9UCbJBpgKM/+9+t6QFOszrXK0Upqz2qPi31levKV8XCwBzW
h0SVULdmxRRm+u5z80++xXaeZ4dmKvQPFV9GJsCj2RGlFGWIi76SwGUZWANZFPAz
g84ApMMvD8uvCJJoPw+gpocesEHckzFHhvbMHT6ctU2QW0JysbJ58vXHvXjc9zNO
2VZnOAFYQq6fw6MiuUfE
=DGVz
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung 2nd DT updates for v3.20" from Kukjin Kim:
- for all of Samsung SoCs
: use generic power domain bindings
: add 'dr_mode' property for hsotg/dwc2 devices
- exynos3250-rinato and exynos3250-monk
: add regulator-haptic
- exynos5422-odroidxu3
: reduce total RAM by 22 MiB because last 22 MiB
for secure monitor cannot be accessed by kernel
: add on-board INA231 sensors and LDO26 of PMIC
for the sensors
* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: reduce total RAM by 22 MiB for exynos5422-odroidxu3
ARM: dts: add on-board INA231 sensors for exynos5422-odroidxu3
ARM: dts: Add regulator-haptic node for exynos3250-monk
ARM: dts: Add regulator-haptic node for exynos3250-rinato
ARM: dts: add 'dr_mode' property to hsotg devices for exynos boards
ARM: dts: convert to generic power domain bindings for exynos DT
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the larger fifo found on sun5i and sun6i, having a separate
compatible for the ir found on sun5i & sun6i also is useful if we ever want
to add ir transmit support, because the sun5i & sun6i version do not have
transmit support.
Note this commits also adds checking for the end-of-packet interrupt flag
(which was already enabled), as the fifo-data-available interrupt flag only
gets set when the trigger-level is exceeded. So far we've been getting away
with not doing this because of the low trigger-level, but this is something
which we should have done since day one.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
On sun6i the cir block is attached to the reset controller, add support
for de-asserting the reset if a reset controller is specified in dt.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Add sensorhub bindings for sensorhub on Galaxy Gear 2.
Signed-off-by: Karol Wrona <k.wrona@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Add binding for Versatile board system registers found in the FPGA of the
Versatile/AB and Versatile/PB boards.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The Conexant CX92755 SoC provides 8 32-bit timers as part of its so called
"Agent Communication" block. Timers can be configures either as free running or
one shot. Each timer has a dedicated interrupt source in the CX92755 interrupts
controller. The first timer (Timer A) can also be configured as watchdog.
This commit adds devicetree binding definition of this hardware module. The
binding defined here should be reusable for other SoCs in the Digicolor series.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The rk3288 board uses the architected timers and these ones are shutdown when
the cpu is powered down. There is a need of a broadcast timer in this case to
ensure proper wakeup when the cpus are in sleep mode and a timer expires.
This driver provides the basic timer functionnality as a backup for the local
timers at sleep time.
The timer belongs to the alive subsystem. It includes two programmables 64 bits
timer channels but the driver only uses 32bits. It works with two operations
mode: free running and user defined count.
Programing sequence:
1. Timer initialization:
* Disable the timer by writing '0' to the CONTROLREG register
* Program the timer mode by writing the mode to the CONTROLREG register
* Set the interrupt mask
2. Setting the count value:
* Load the count value to the registers COUNT0 and COUNT1 (not used).
3. Enable the timer
* Write '1' to the CONTROLREG register with the mode (free running or user)
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
The SDHCI unit used on the Armada 38x needs using an extra register to
do specific clock adjustments in order to support the SDR50 and DDR50
modes. This patch extends the binding to allow using this register.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Remove the DT compatible string entry for the now unsupported sh7372 SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This is the first NFC pull request for 3.20.
With this one we have:
- Secure element support for the ST Micro st21nfca driver. This depends
on a few HCI internal changes in order for example to support more
than one secure element per controller.
- ACPI support for NXP's pn544 HCI driver. This controller is found on
many x86 SoCs and is typically enumerated on the ACPI bus there.
- A few st21nfca and st21nfcb fixes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUyXy7AAoJEIqAPN1PVmxKOY4P/1WJtEZfzBOFMlh9qeA8YESv
cS1xbZuAVeEJ3r/sgDc87iA/4MMNZDzfhDHQlQJs/pJWAXE3Am1/dZGWHJC6pbk/
roTlbEh5OvQU8cRIdAvOcEgrBIWk+E30Mkd2OtOMpWyhbgChN7hKz0KUs7znVHBJ
G3YCcZOPr7K2ra78UlYzApvGqoxiVaiEWQyj6rzx2HbVzxzICL6A5m9cRcZuGxYR
sK3Y/DpKJKGwH3p1kkLIOqHy3nGhq2LttVSXF/f5xkOB8teERSkt4i8aJBiSb9ym
a++iAWp2syH3sGh2rsb3G4KRYCYq2J9mJD7oBB3G/6UoNwyeSgW3GdxgH/yxt6C9
KfzHm9T8jfvQIBlf4lGeboV8zu+ysQehJFNKtxdQDlvwqPiR14clT5JFejocr9+N
SegCbF+LJaZW8boOZVvhxTxASpEZ0RTFwUIkKKxtXOpK4ha0s1gEAtuZUpTYmRtJ
wGqds8wszkE0wOdZJi7dsCGpp5JNI0LZZCsuKa6Ko3E7LkTAor8Bbmob0RR51ClD
srtoz6kJgoozAMRLMISXBimk0geOp38iGs26GPSpRHwSV/1loN6+abaOMYlGbDCq
+oVpqMmJsS/z5US5+wEkWU+O4y9TS0O74d/TxxcwUM+CLNyKI+Ms1rMOyYi0domo
2xa7MuDCrmztQbs6ROKT
=SNWp
-----END PGP SIGNATURE-----
Merge tag 'nfc-next-3.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/nfc-next
NFC: 3.20 first pull request
This is the first NFC pull request for 3.20.
With this one we have:
- Secure element support for the ST Micro st21nfca driver. This depends
on a few HCI internal changes in order for example to support more
than one secure element per controller.
- ACPI support for NXP's pn544 HCI driver. This controller is found on
many x86 SoCs and is typically enumerated on the ACPI bus there.
- A few st21nfca and st21nfcb fixes.
Signed-off-by: David S. Miller <davem@davemloft.net>
This backmerges drm-fixes into drm-next mainly for the amdkfd
stuff, I'm not 100% confident, but it builds and the amdkfd
folks can fix anything up.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Conflicts:
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
Add binding documentation for the PCI controller found on Versatile PB
boards.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
CC: Pawel Moll <pawel.moll@arm.com>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
CC: Kumar Gala <galak@codeaurora.org>
This patch fix multiple words such as "the the" and "which which"
in Documentation/devicetree.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
The "wlf,wm8912" compatible string is used for wm8912, which
share driver with wm8904, however, the data type is different.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Using the PLL in master mode requires using an external connection
between one of the GPIO pins (configured as PLL/4 output) and the
SCK pin. It also requires the external clock to be fed to some other
GPIO pin instead of the SCK pin.
This is described for the PCM5122 chip in the answers to the forum post
"PCM5122 DAC as I2S master troubles with PLL mode" at the TI E2E
community pages (1). The clocking functionality is also much better
described in the datasheet for the chip PCM5242, which seems to be
register compatible with PCM512x and PCM514x (which both have severely
lacking datasheets).
(1) http://e2e.ti.com/support/data_converters/audio_converters/f/64/t/267830
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Mark Brown <broonie@kernel.org>
Document DT binding for Qualcomm SPMI PMIC voltage ADC
driver.
Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This is a patch for adding gpio control about enable/disable of buck.
Signed-off-by: James Ban <james.ban.opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
There are various issues with the examples in this documentation, some
of the DT labels are invalid and one of the macro THERMAL_NO_LIMITS
referenced is not available as well.
This patch attempts to fix such errors in the documentation.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
To support SOCs which specifies specific MMC power sequences, document
some MMC DT bindings to be able to describe these hardwares.
Let's also document bindings for a simple MMC power sequence provider,
which purpose is to support a set of common properties between various
SOCs.
In this initial step, let's also document a top level description of
the MMC power sequence and describe the compatible string used for the
simple MMC power sequence provider.
The simple MMC power sequence provider will initially support a reset
GPIO. From several earlier posted patches, it's clear that such
hardware exists. Especially some WLAN chips which are attached to an
SDIO interface may use a GPIO reset.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Add drm_panel calls to the driver to make the panel and
bridge work together in tandem.
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Tested-by: Rahul Sharma <rahul.sharma@samsung.com>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Shanghai AVIC Optoelectronics TM070DDH03 is a 7" 1024x600 TFT LCD
panel connecting to a 24-bit RGB LVDS interface.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Shanghai AVIC Optoelectronics Co., Ltd. is a subsidiary of Tianma
Microelectronics Co., Ltd. and designs and manufactures TFT LCDs.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch adds support for the GiantPlus GPG48273QS5 4.3" WQVGA TFT LCD
panel to the simple-panel driver.
This panel is connected via a parallel bus and uses both HSYNC and
VSYNC, whose lengths are unfortunately not clearly defined. The
datasheet only specifies the front- and backporch length, but the timing
diagram suggests that both sync signals should be asserted for exactly
one clock cycle.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Conflicts:
arch/arm/boot/dts/imx6sx-sdb.dts
net/sched/cls_bpf.c
Two simple sets of overlapping changes.
Signed-off-by: David S. Miller <davem@davemloft.net>
The set of clock changes for the 3.20 merge window, with mostly:
- Some PLL fixes for the A80 and A31
- The MMC custom phase functions are removed, and moved over to the generic
phase API.
- Add the A80 MMC clocks
Some DT changes slipped here as well, to preserve bisectability.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUxSZeAAoJEBx+YmzsjxAgXeAP/0aIFOuvCQ00JrXoIiKogery
S66HZpVclU9nvhFh99fhVBB0AP0TcH5qZPYCeughCO07SdtnbKVEb2A+2aMP4uzN
dRlL6smk8F9/bUq0yhUzX4e1NbDGVeWaXw2JWxvZ7WGwavjQ9ejS1Pb1BMAwUnVY
ZUebVkbw7XlVkYr3/GROVWTtNswYu8L/8aY438OoK+VnaVWo5N/+8kX8i+I85bxW
4G8WvNO36neEh3Oc4aBbetW29ZQbXlt6IJ89tkEaxtC4Z29VNSeXJfpadYLZRrP+
8+IUA5YVau/9VJePdF5a4BM55Uee7M4aMqVENGiUHMFLMGSJNyR2G9+qu658Twyn
vP//imP34mTVI5D8oo9cOdKgQh2Prf9K8MmYuAvQxVaTEpt4wx2v7jVi1G/m9etX
mxn95h0G7wIFMwPQiZfbvCgw8QOSXWYa59A4d1209SDB0vGYWgG2HJQvJnBPJmhq
9Ifczv9Ia7M6CuTZfdhf0TrABML56IC8JCtCJ1Zk6mUKc+lE+m4IdM68drfM0WC9
+KOC07QJiB0tEHyauppbVvaY6Jon2bYhUyEzGl6gpfYg4VuoBavzS2vVSc8E0n9Z
iYPXtXE8soygRZVgvQ58YN8yKWZI+Ylpz9EAJ1a82fCAG8r3iJ8FNixpfB93nRxU
6GcGqhSQayZY74mRnBqb
=m8K6
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clocks-for-3.20' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Allwinner clock changes for 3.20
The set of clock changes for the 3.20 merge window, with mostly:
- Some PLL fixes for the A80 and A31
- The MMC custom phase functions are removed, and moved over to the generic
phase API.
- Add the A80 MMC clocks
Some DT changes slipped here as well, to preserve bisectability.
for the broadcast timer going through the clocksource tree
and two new boards, the rk3288-based Firefly and the
PX2-based Rayeager board (the PX2 is identical to the rk3066
but made for industrial users).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJUyCaJAAoJEPOmecmc0R2By0oH/ioVbVZWYgTWJRlN0Cmjj+yr
fNnzm93g9N+Uk5PGOjCw70h3QSS65OLdqPF9xJwkSS1p7ORbKmOU3fzAET7x/EYK
a3Ct4NRPPiSkY12Qg+N4Q9wjz8sgUUHsLSFa5D/QJsyPu+lTVhLgWS4j4mzVCbyz
PSMn4Tx52OHzLHWKGrnEq33AIMROvarBmOgnvGe7AbutwDYqoiFiPALIAowrp/SR
WY689+3Gjtha5epUHn9vgUkNABnf0gXR1MBBJ1ZMxgForjZqeSCioHNYomneKOZC
9zyg4yuv5kNL75PY4aHLwalRfIFrqNM5S5D3gH7CTQg1/TcfUcVCBY0CAKczLxw=
=nDW6
-----END PGP SIGNATURE-----
Merge tag 'v3.20-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: rockchip: second batch of dts updates for 3.20" from Heiko Stübner:
Basic display nodes for crtcs and hdmi encoder, timer node
for the broadcast timer going through the clocksource tree
and two new boards, the rk3288-based Firefly and the
PX2-based Rayeager board (the PX2 is identical to the rk3066
but made for industrial users).
* tag 'v3.20-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add dts for ChipSPARK Rayeager PX2 board
ARM: dts: rockchip: add dts for Firefly Firefly-RK3288 boards
dt-bindings: add vendor prefix and root compatible property for Rockchip boards
ARM: dts: rockchip: Add rockchip timer node for rk3288
ARM: dts: rockchip: add rk3288 hdmi nodes
ARM: dts: rockchip: Add rk3288 vop and display-subsystem
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds a devicetree binding documentation for FSL's
Management Complex.
Management Complex is a hardware resource manager that manages
specialized hardware objects used in network-oriented packet
processing applications
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds a devicetree binding documentation for FSL's
LS2085A SoC and Simulator model.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch addss the device-tree documentation for Freescale's
NS16550 UART (also called DUART).
There is a specific errata fix required in FSL NS16550 UART
which ensures that an random interrupt storm is not observed when
a break is provided as an input to the UART.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
On st21nfca, the mechanism to enable a secure element needs to add 2
properties in order manage the SWP line correctly.
Document ese-present and uicc-present properties.
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Of the Digicolor SoCs series only CX92755 is currently supported.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Olof Johansson <olof@lixom.net>
Document the LPASS (low power audio subsystem) clock controller
found on Qualcomm devices.
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
CM3232 is an advanced ambient light sensor with I2C protocol interface.
The I2C slave address is internally hardwired as 0x10 (7-bit). Writing
to configure register is byte mode, but reading ALS register requests to
use word mode for 16-bit resolution.
Signed-off-by: Kevin Tsai <ktsai@capellamicro.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
make the sta32x driver usable with device tree configs. Code is heavily based
on the sta350 driver.
Signed-off-by: Thomas Niederprüm <niederp@physik.uni-kl.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJUxbzlAAoJEHm+PkMAQRiGtqYIAJ8YlKX9cXKYmXx8/FncINH+
2erj94KyHG080R1uwSq1+7zXWCZUUlxiJnDnsup5rG0dImcicqgOE48oHax1aN6b
yHfPONkTjNJ1HYepuGC3YWCG9wIjPZQ5S8KHrwRjyVoE+ddhe9gWgvArA3jl/fW/
2fYNWekoRoMcRiNb4/w2weyOOBywdSVpmj0WYiwdztysG2ymw5hUXRHJhvSf1AFm
RQJfUHkhCOYpQGY7XFba/1uGhTJfOgDmYAfspAOLzmrXE/DJcCutsVdBZO+12fAL
nhGpM/PkRYxMvwzDKIUoG35qsymYOMqo54oXhr0S2JjyXTGdGmB6qHxIfqnV5Tk=
=O/Lr
-----END PGP SIGNATURE-----
Merge tag 'v3.19-rc6' into patchwork
This is needed in order to get the media fixes applied on -rc6.
Linux 3.19-rc6
* tag 'v3.19-rc6': (891 commits)
Linux 3.19-rc6
dm: fix handling of multiple internal suspends
hwmon: (i5500_temp) Convert to use ATTRIBUTE_GROUPS macro
hwmon: (i5500_temp) Convert to module_pci_driver
hwmon: (i5500_temp) Don't bind to disabled sensors
hwmon: (i5500_temp) Convert to devm_hwmon_device_register_with_groups
hwmon: (i5500_temp) New driver for the Intel 5500/5520/X58 chipsets
arm64: dts: add baud rate to Juno stdout-path
Revert "platform: x86: dell-laptop: Add support for keyboard backlight"
Revert "Documentation: Add entry for dell-laptop sysfs interface"
dm cache: fix problematic dual use of a single migration count variable
dm cache: share cache-metadata object across inactive and active DM tables
of/unittest: Overlays with sub-devices tests
KVM: x86: SYSENTER emulation is broken
KVM: x86: Fix of previously incomplete fix for CVE-2014-8480
arm64: dump: Fix implicit inclusion of definition for PCI_IOBASE
x86/tsc: Change Fast TSC calibration failed from error to info
x86/apic: Re-enable PCI_MSI support for non-SMP X86_32
x86, mm: Change cachemode exports to non-gpl
x86, tls: Interpret an all-zero struct user_desc as "no segment"
...
Conflicts:
drivers/media/pci/cx23885/cx23885.h
The Allwinner A31 SoC (sun6i) has the same resistive touchpanel controller
as on other sunxi platforms. The only difference between the variants is
the control bits for enabling operations are left-shifted by 1 on the A31.
Also update the comment for the original temperature sensor with
information from Allwinner.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Add PFC support for the EMMA Mobile EV2 SoC including pin groups for
on-chip devices.
Signed-off-by: Niklas Söderlund <niso@kth.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This driver implements support for PS2 controller found on Allwinner A10,
A20 SOCs. It has been tested on A20 Olimex-Lime2 board and also on A10.
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
- correct some pin configuration for at91sam9x5ek
- add pioD on sama5d4 following a modification of pinctrl driver
- add more precise nand compatibility string for sama5d4
- audio modifications for wm8904 or ac97
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJUxmgWAAoJEAf03oE53VmQtCoIAJtnUtvW5DqRWWsAzKxv6tPF
FLXihD9MRPyywgN5hDvNInKibqcBNxnLfk0xiFbCbfZXU4u6SK1E5iJN72mkTxhP
6rC/rdMDqMqGK7W43h4xFFpQdPrrq00t36gGvnQ+IUaOYcGAByJPYB3YwKMv/n0x
xHTPhydb2RPphEd9ZaXsbUKcaOJPG/6uChQSTp+8L0MAlh4cQADya1SapDhRefDa
PFz49N8QIjxgjWyJiWorcD8KH8hkGzLtvuvDl3UWkNZz9i3h7Vl3QaraC3HCHqwm
kJrOJ/EVw1uJKAKtYoo9xfoA8Z5HHno3vcQ4gKq4ylYDHIB3P4UhQLaGlcqkZfk=
=yOLr
-----END PGP SIGNATURE-----
Merge tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "at91: dt for 3.20 #2" from Nicolas Ferre:
Second DT batch for 3.20:
- correct some pin configuration for at91sam9x5ek
- add pioD on sama5d4 following a modification of pinctrl driver
- add more precise nand compatibility string for sama5d4
- audio modifications for wm8904 or ac97
* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: sam9263: Add ac97 device node
dt: atmel_ac97c: Add device tree documentation
ARM: at91: at91sam9n12ek/dt: use dt ids for wm8904
ARM: at91: sama5d3xek/dt: use dt ids for wm8904
ARM: at91: sama5d4: dts: change the nand compatible string
ARM: at91/dt: sama5d4: add pioD controller
ARM: at91/dt: disable pull-up on vbus-gpio (PB16) to reduce power consumption
Signed-off-by: Olof Johansson <olof@lixom.net>
- exynos3250
: add exynos_usbphy node and hsotg nodes
- exynos3250-rinato
: enable usb
: cleanup and use macro for gpio-keys
: add fimd and Panel devices support
- exynos3250-monk
: enable usb
: cleanup and use macro for gpio-keys
- exynos5250-snow
: add power and lid gpio-keys pinctrl
- exynos5420-peach-pit and exynos5800-peach-pi
: configure regulators for suspend
: set always on for USB webCam regulators
: add lid GPIO key device
- exynos5422
: add support new board Odroid XU3
- dt-bindings
: add exynos-chipid
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJUwxeqAAoJEA0Cl+kVi2xq4zEP/0K1GVsA6aHUYAqvr4JeJD+Q
zL+N8TTypbGhvJbHidrkNtWt7jWLSj2KBmv/EloyI5U0WL9z3lAn5hyG366O6plM
SP2gb+giYLWScV8RM1KYfgpKy4d4EkJc+SfbsZhBF1aWEcxixSLc5iNWoyeUoKV6
XBVJT4sTJ5E5wsJ2aHYOYbWSF+dFUIEkGGnWW0KbXMnKqxvZeDWjIsJjYeu+Wh8v
1X03WXK+NFZu+hbQArCRVE27ZOBJJZSJ83T6rCBDi1oCDVbjIbGQ631YU9MlfslE
9qNJXUVcB/0jVwYxBIZrjIsjQjgJrhA2Zu78Pdb3P5wP+iQipfC+zhqix3o5tJis
EBF3bWQspdYeGXPV8WNkg3mDJjU3Saf7UwiGEQdvblC1tC72aTcOOOf6fDreNLAg
8Zcjrsbe5v67Y7yFNvH9dAdeOOocXyp3PPsRwb2lOoXx4DwIU0Rf5f+OnshkgtQf
SAQgEeB6nuXlfqgqUMLZV4TlKyL4lP1nq3t33hYMBuGtsO1B9KMR3AC8RmVG9hzO
fKfYhJefzOWkb56k5yu2/40KkdEVZvwik2E2l1DMysjyOlYZ7tHp66XJN+5dtNj0
u9YYrQF+sCvIOnBL3O2KoPJkZzRSfh5ESQvY+tCPQTlCuDrN4WZJMehmYok6ev06
qljMpLInQakOA4vo+g3O
=Yc7r
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung DT updates for v3.20" from Kukjin Kim:
- exynos3250
: add exynos_usbphy node and hsotg nodes
- exynos3250-rinato
: enable usb
: cleanup and use macro for gpio-keys
: add fimd and Panel devices support
- exynos3250-monk
: enable usb
: cleanup and use macro for gpio-keys
- exynos5250-snow
: add power and lid gpio-keys pinctrl
- exynos5420-peach-pit and exynos5800-peach-pi
: configure regulators for suspend
: set always on for USB webCam regulators
: add lid GPIO key device
- exynos5422
: add support new board Odroid XU3
- dt-bindings
: add exynos-chipid
* tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Configure regulators for suspend on exynos Peach boards
ARM: dts: Set Peach boards USB WebCam regulators to always on
ARM: dts: Add lid GPIO key device node for Peach boards
ARM: dts: Add power and lid GPIO keys pinctrl for exynos5250-snow
Documentation: dt-bindings: add exynos-chipid binding information
ARM: dts: add Panel device support for exynos3250-rinato
ARM: dts: add fimd device support for exynos3250-rinato
ARM: dts: use macro in gpio keys for exynos3250 boards
ARM: dts: remove unnecessary gpio-key nodes for exynos3250 boards
ARM: dts: Enable USB node for exynos3250-monk
ARM: dts: Enable USB node for exynos3250-rinato
ARM: dts: Add hsotg node for exynos3250
ARM: dts: Add exynos_usbphy node for exynos3250
ARM: dts: Add dts file for Odroid XU3 board
Signed-off-by: Olof Johansson <olof@lixom.net>
Kalle Valo says:
====================
pull-request: wireless-drivers-next 2015-01-22
now a bigger pull request for net-next. Rafal found a UTF-8 bug in
patchwork[1] and because of that two commits (d0c102f70a and
d0f66df539) have his name corrupted:
Acked-by: Rafa? Mi?ecki <zajec5@gmail.com>
Somehow I failed to spot that when I commited the patches. As rebasing
public git trees is bad, I thought we can live with these and decided
not to rebase. But I'll pay close attention to this in the future to
make sure that it won't happen again. Also we requested an update to
patchwork.kernel.org, the latest patchwork doesn't seem to have this
bug.
Also please note this pull request also adds one DT binding doc, but
this was reviewed in the device tree list:
.../bindings/net/wireless/qcom,ath10k.txt | 30 +
Please let me know if you have any issues.
[1] https://lists.ozlabs.org/pipermail/patchwork/2015-January/001261.html
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This adds the bindings for AC97 controller device tree support.
Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-By Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
MT8173 is a 64-bit four core Soc.
And mt8173-evb is a evaluation board based on mt8173.
This commit add the devicetree binding document for
mediatek MT8173 SoC
MT8173 sysirq
MT8173 uart
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
During a recent cleanup of the arm64 DTs it has become clear that
the handling of PPIs in xxxx_set_type() is incorrect. The ARM TRMs
for GICv2 and later allow for "implementation defined" support for
setting the edge or level type of the PPI interrupts and don't restrict
the activation level of the signal. Current ARM implementations
do restrict the PPI level type to IRQ_TYPE_LEVEL_LOW, but licensees
of the IP can decide to shoot themselves in the foot at any time.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Marc Zyngier <Marc.Zyngier@arm.com>
Cc: LAKML <linux-arm-kernel@lists.infradead.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Link: http://lkml.kernel.org/r/1421772779-25764-1-git-send-email-Liviu.Dudau@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
On dm81xx we have 128 interrupts like am33xx has. Let's add
compatible flags for dm814x and dm816x, and document the
existing binding.
As the dm81xx are booting in device tree only mode, we can now
also remove ti81xx_init_irq() legacy function.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1421187806-6804-2-git-send-email-tony@atomide.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Add r8a7779 specific support for IRLM bit configuration
in the INTC-IRQPIN driver. Without this code we need
special workaround code in arch/arm/mach-shmobile.
The IRLM bit for the INTC hardware exists on various
older SH-based SoCs and is used to select between two
modes for the external interrupt pins IRQ0 to IRQ3:
IRLM = 0: (default from reset on r8a7779)
In this mode the pins IRQ0 to IRQ3 are used together
to give a value between 0 and 15 to the SoC. External
logic is required for masking. This mode is not
supported by the INTC-IRQPIN driver.
IRLM = 1: (needs this patch or configuration elsewhere)
In this mode IRQ0 to IRQ3 operate as 4 individual
external interrupt pins. In this mode the SMSC ethernet
chip can be used via IRQ1 on r8a7779 Marzen. This mode
is the only supported mode by the INTC-IRQPIN driver.
For this patch to work the r8a7779 DTS needs to pass
the ICR0 register as the last register bank.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: horms@verge.net.au
Cc: jason@lakedaemon.net
Link: http://lkml.kernel.org/r/20141203121803.5936.35881.sendpatchset@w520
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This adds vendor prefix and root compatible property for following boards
- Firefly, Firefly-RK3288 boards (both beta and mass production version)
- ChipSPARK, Rayeager PX2 board
PX2 SoC is fully compatible with RK3066.
Signed-off-by: FUKAUMI Naoki <naobsd@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Other drivers are following the following compatible string format for dts:
s/_/-/
Because some devices may still use the previous string, the new corrected
string is added to the of_device_id table.
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Other drivers are following the following compatible string format for dts:
s/_/-/
Because some devices may still use the previous string, the new corrected
string is added to the of_device_id table.
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
As no property for phy regulator was documented in this dt-binding documentation,
this commit adds an entry for the optional property phy-supply.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
CLK_S_ICN_REG_0 hasn't existed for a while now. This was renamed
over a few commits, then finally removed in commit 5aa02b9 (ARM:
STi: DT: STiH415: Remove unused CLK_S_ICN_REG_0 fixed clock).
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This patch replaces all custom samsung,power-domain dt
properties with generic power domain bindings and updates
documentation Samsung's devices referring to old binding.
Suggested-by: Kevin Hilman <khilman@kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
[javier.martinez@collabora.co.uk: tested on the Exynos5800 Peach Pi Chromebook]
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This adds support for the Tegra132 SoC, which is essentially a Tegra124
with a dual Denver CPU complex instead of the quad-Cortex-A15. There is
not much here, only the Kconfig entries, but it will allow us to more
easily get subsequent patches in (many of which have already been sent
for review).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJUwm3UAAoJEN0jrNd/PrOh9PsP/RZTPGClTNZUSrHxX09j2QDw
hU7ebVPGblZ/izkrkhrmVn149+39ajuytISRmVTtHUGUAW0A2wVZqDedKUvD1Zun
PfXln0EW1LqKAXjOiM2RXXNzQ21hgDNdAuKp+NNsf68HQk2qpLR6ZJZIny1WCRzL
j+bBOwPw5RR4s6qa+4ulJhO2RYQx0odenqgwcZNx6Z9muRxk1eHk2DmMxlGOslo9
mFoaPfhSPMymeiw3Eh+H4zvnamc3mJ17mskGF5tiAC2Kfh5IYq0rUMDYC+yVj2AC
nPf8NFKTJX/2GHkR2WISP3fA0FttMEbzchKZsxQqj9O52mRhgTDG89JTGNQdDpOV
M2c1pQlUcJ0xqaotRZFm7pjJLT9UWW+lyUeeL0/cQQHq4BivUfoVDAdgH14Mzjut
ZXYauCBYthK+nSopu0QcP3aIU+iRnXIJ3SJI66mwXJrjR/Oiqr0WDom9jYrxgHz7
k9/gg4wInDn/ttuDFW/CC6+iwCBJJhO2dH7O9ClOyHr0HOQ0R9UH1M8aSv2cO7tm
TOIBlbbmJnVSmkS0vbl80mOEQuscfcvjNN3ZkGonXFhbP1iuo0n5cQu5vXPV/jNJ
Etb9DT475lQLbov5BJFN9Vh8Lzy7Ia1UIThrpZJX09JY+sFhyQuHkSKaYD9gWAqH
Iz1aNlJfGEo3QAID2B8w
=Naxw
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.20-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/arm64
Merge "arm64: Add initial Tegra support" from Thierry Reding:
This adds support for the Tegra132 SoC, which is essentially a Tegra124
with a dual Denver CPU complex instead of the quad-Cortex-A15. There is
not much here, only the Kconfig entries, but it will allow us to more
easily get subsequent patches in (many of which have already been sent
for review).
* tag 'tegra-for-3.20-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: Add Tegra132 support
soc: tegra: Add thermal reset (thermtrip) support to PMC
ARM: tegra: Add PMC thermtrip programming to Jetson TK1 device tree
of: Add descriptions of thermtrip properties to Tegra PMC bindings
soc/tegra: pmc: Add Tegra132 support
soc/tegra: fuse: Add Tegra132 support
soc/tegra: fuse: Constify tegra_fuse_info structures
soc/tegra: Add Tegra132 support
clocksource: Build Tegra timer on 32-bit ARM only
soc/tegra: pmc: restrict compilation of suspend-related support to ARM
Signed-off-by: Olof Johansson <olof@lixom.net>
A few bugfixes for the new DT overlay feature, documentation updates,
spelling corrections, and changes to MAINTAINERS. Nothing earth
shattering here.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUwnLYAAoJEMWQL496c2LNR88P/R7PbMZndqGhThzfPkbrEUx2
7Myb9TtIwOSdGnB2Q+QLplDEn5qhO/S37PjIhEq4lo07QTVvzSJY4x+SP+w5cXyC
9yfEVhsLzcQb54U7G9F5MHANgaeHMPn8p70l3MWUSMiathcc/2akG9IwD4OlxR7s
CcH/wSlzd8GTPwd2k+k2OxTTRt8PexaySpa9oHd1CzKwMENMvIexm4xFXTYDEX1f
tyjdcPnQWe0LbzWlOMYO/N2kXb4a+ILoB5v4YJMZXi44+1bugbGLvqlNmG1UR+5d
xEMHxgt0ukzYrtrILBiTj3IZHyluIyiz142Xah0kMj2GDrGB+NouxWuTsrZt8Bql
4/9co1qAYSlD2pdoaBczaqum72OkIvFtJKJFsV8tNTk3aUVfi/RtHAqoWcSvvoZv
o40VxIozMC5M14wtlPvMHF7g38mUerGL04+wXSzIUitTDZLSe5Huxg1olN0jh0zn
G+1OsyleUnOwwFyN+e1lBxd03TTZu/8Jy01HJZub1106ch2ympfIm6V8i7UI1GZS
RfmPE90/3JqsX9fjvCN3h4beX2mavpquPQvR85pRPsu6Fls7unSFeSU6v6J91xfb
G1lhVgdj+PwUiMzOoOjzzs9sLejBf7Z6IJNtTQ3g+iBA4VwhkWc+e5JzheiHD76Q
XUroHBEVAugg/iT9jmBJ
=/bBX
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux
Pull devicetree bug fixes and documentation updates from Grant Likely:
"A few bugfixes for the new DT overlay feature, documentation updates,
spelling corrections, and changes to MAINTAINERS. Nothing earth
shattering here"
* tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux:
of/unittest: Overlays with sub-devices tests
of/platform: Handle of_populate drivers in notifier
of/overlay: Do not generate duplicate nodes
devicetree: document the "qemu" and "virtio" vendor prefixes
devicetree: document ARM bindings for QEMU's Firmware Config interface
Documentation: of: fix typo in graph bindings
dma-mapping: fix debug print to display correct dma_pfn_offset
of: replace Asahi Kasei Corp vendor prefix
ARM: dt: GIC: Spelling s/specific/specifier/, s/flaggs/flags/
dt/bindings: arm-boards: Spelling s/pointong/pointing/
MAINTAINERS: Update DT website and git repository
MAINTAINERS: drop DT regex matching on of_get_property and of_match_table
This contains a couple of preparatory patches for 64-bit support. A new
feature is implemented in the power-management controller which allows
it to switch off the SoC if it overheats.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJUwm1UAAoJEN0jrNd/PrOhcHgP/3DS5OrGHUUg8yokvWG5suA7
Bfj0b4t64/k+ZJL3C3vZJxlgXqBkOFLjPgCFagGlliEJtbVvOQLqGwtdypTwoMpa
Y1pje+45cCl5KZvDN4D0i1dJDGZqV82Xck6FE7xyJev9FmwADvUFNQB91BykM8rw
42FW20Q0dUpFNMTeOWWBW84+D0JEC79wP/FWjWzKgxJQ6ydLwX8DWk5U5AmzX7A/
Gv/fJlaFp4ti+leRWIqkkNRy72mSZwvizprmgVTX4k3BJt7PagfUjB1r12+pDpLJ
dxsJSjEqgnJK00JlmiJLSZkzXtvGu2OSmgt7Sa3k/1vIQXERMv5AWr9QgkXyUv/E
SnzoRRb3q6xfyjs6KWEpSd6jDAqbkbpb2MGUoixbfg5bLWEL86j87uclA765DzYn
3f9w6VT5CrzSGVnvbUEClUl9tTPn/fHbZVFvK1qYBGGk3/En32bU2iCMwOTPkeoN
coUEpMDpZDS6yXYGkDNxYFMhtbY7MkMiN3ZKnV7IB4cJVL3doJArj2BTL8fCXKXT
OKjmov2cWktxU64UYj1gzVVoA/l9MnxCBx1N5l59kP+ZdgFJ9BrQL/9ELpNtWEeo
GwDkcFI86iZVg0Go47Ue0gDcKCLG2cuo/cJoaQ2Krmuv3Rv7JuTxrLbPjIruLRDd
WQf2t3pFUyvYrY1KyLEJ
=uibw
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
Merge "ARM: tegra: Core code changes for v3.20" from Thierry Reding:
This contains a couple of preparatory patches for 64-bit support. A new
feature is implemented in the power-management controller which allows
it to switch off the SoC if it overheats.
* tag 'tegra-for-3.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc: tegra: Add thermal reset (thermtrip) support to PMC
ARM: tegra: Add PMC thermtrip programming to Jetson TK1 device tree
of: Add descriptions of thermtrip properties to Tegra PMC bindings
soc/tegra: pmc: Add Tegra132 support
soc/tegra: fuse: Add Tegra132 support
soc/tegra: fuse: Constify tegra_fuse_info structures
soc/tegra: Add Tegra132 support
clocksource: Build Tegra timer on 32-bit ARM only
soc/tegra: pmc: restrict compilation of suspend-related support to ARM
Signed-off-by: Olof Johansson <olof@lixom.net>
- Update i.MX6 operating-points setting in device tree to match the
latest i.MX6 data sheet
- Add i.MX6SX sabreauto board support
- Add imx6dl-udoo board support based off imx6q-udoo
- Update sabrelite board to include I2C and HDMI support
- Update the VPU compatible strings to also use cnm,coda<model>
- Remove the ocram clock from the VPU node, as the clock is already
provided inside the ocram node
- Add system reset controller and syscon-reboot for VF610
- Update VF610 device tree to use zero based naming for GPIO nodes,
so that the number scheme matches hardware manual
- A number of random device additions like watchdog for VF610, sahara
for i.MX53, QSPI for imx6sx-sdb board, etc.
Note: the branch imx/soc was merged into imx/dt because the SNVS device
tree node needs to refer to the new clock ID added by the imx/soc patch.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJUwg4gAAoJEFBXWFqHsHzO1NIH/AlXPcZZQM8sYbHrvWXmvVTM
JstCR6XjVvOqT9zdFbEzdgpFGvu1oSDer8tOk00hL1NZYzHJRmTr/wgNP6tsvQ0F
uoRj62B+WaMMcFanTbSdzh0tJtp7HZyFkJwjWRIL76bmd4VBsHXCPw4tr3oeDLzm
x62SP14eSevV8ydlZj4TA2Ej7SxV6esdPLGeylZldXKTvo8AUH9sYN/BAz7WXfYH
wfQ8owW/ql7YyCSRVdhSoeGG4H9qJA9M/CdwofsorLONkUx0nrBPRQfku5Uvf8Op
fydbEbZ0LAkqIVnHcLi8xgBDhjjS/7glHSx4tp+mxtDcIMzAzfAtjyrawheWqQE=
=ni1W
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Merge "ARM: imx: device tree changes for 3.20" from Shawn Guo:
The i.MX device tree update for 3.20:
- Update i.MX6 operating-points setting in device tree to match the
latest i.MX6 data sheet
- Add i.MX6SX sabreauto board support
- Add imx6dl-udoo board support based off imx6q-udoo
- Update sabrelite board to include I2C and HDMI support
- Update the VPU compatible strings to also use cnm,coda<model>
- Remove the ocram clock from the VPU node, as the clock is already
provided inside the ocram node
- Add system reset controller and syscon-reboot for VF610
- Update VF610 device tree to use zero based naming for GPIO nodes,
so that the number scheme matches hardware manual
- A number of random device additions like watchdog for VF610, sahara
for i.MX53, QSPI for imx6sx-sdb board, etc.
Note: the branch imx/soc was merged into imx/dt because the SNVS device
tree node needs to refer to the new clock ID added by the imx/soc patch.
* tag 'imx-dt-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (28 commits)
ARM: dts: imx28-evk: remove duplicate property
ARM: vf610: use zero based naming for GPIO nodes
ARM: dts: imx6q: enable dma for ecspi5
ARM: dts: vfxxx: Add SNVS node
ARM: imx: clk-vf610: Add clock for SNVS
ARM: imx: clk-vf610: Add clock for UART4 and UART5
ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sx
ARM: dts: imx6dl-udoo: Add board support based off imx6q-udoo
ARM: imx: support arm power off in cpuidle for i.mx6sx
ARM: imx: remove unnecessary setting for DSM
ARM: dts: imx6sx: add i.mx6sx sabreauto board support
ARM: dts: imx6sx-sdb: Add QSPI support
ARM: dts: imx6qdl: Remove OCRAM clock from VPU node
ARM: imx: apf51dev: add gpio-backlight support
ARM: imx: correct the hardware clock gate setting for shared nodes
ARM: imx: pllv3: add shift for frequency multiplier
ARM vf610: add compatibilty strings of supported Vybrid SoC's
ARM: i.MX53: dts: add sahara module
ARM: dts: imx6dl: correct cpufreq volt/freq table
ARM: dts: imx6q: update cpufreq volt/freq table
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add .disable_unused function hook for shared gate clock to ensure
the clock tree use count matches the hardware state
- Add a deeper idle state for i.MX6SX cpuidle driver powering off the
ARM core
- One correction on i.MX6Q esai_ipg parent clock setting
- Add a missing iounmap call for imx6q_opp_check_speed_grading()
- Add missing clocks for VF610 UART4, UART5 and SNVS blocks
- Expand VF610 device tree compatible matching table to cover more
Vybrid family SoCs
- Expand i.MX clk-pllv3 a bit with the shift for frequency multiplier
to support Vybrid's USB PLL oddity
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJUwgT5AAoJEFBXWFqHsHzO2fAIAKnvpNONYdZFI0Q1Z5sIl+/8
Sl+Cs+dCfG5ZHKcqOQ/1ir1OpCEvZW6QQfnK7j1MKpDCIStnmBXRg723H4bh0Kbx
7/uB0nF3wrBuMweEoqGsx4fOfKDLgHUzMt+3jNOubiDoQcQIZmxPECsPifj9aVSV
Z+TkHoslKv4XAKRzuOX2aepLwv1a6OJ3As9gaKVbzF8QVb2JGgvuKafruREfV0dP
R7XWEscS1vd1xMEKiCMtJcnQ8nKaaToB8oRhk8VvpvgVIReC96PeAbrA7melVEjR
paqlnp1qZlf+M03rebvmrHVLFT6OWRTULJ3jh1D8U8AJaNnAw8u1W1k6cIeWMos=
=Vsin
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Merge "ARM: imx: soc changes for 3.20" from Shawn Guo:
The i.MX SoC changes for 3.20:
- Add .disable_unused function hook for shared gate clock to ensure
the clock tree use count matches the hardware state
- Add a deeper idle state for i.MX6SX cpuidle driver powering off the
ARM core
- One correction on i.MX6Q esai_ipg parent clock setting
- Add a missing iounmap call for imx6q_opp_check_speed_grading()
- Add missing clocks for VF610 UART4, UART5 and SNVS blocks
- Expand VF610 device tree compatible matching table to cover more
Vybrid family SoCs
- Expand i.MX clk-pllv3 a bit with the shift for frequency multiplier
to support Vybrid's USB PLL oddity
* tag 'imx-soc-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: clk-imx6q: refine esai_ipg's parent
ARM i.MX6q: unmap memory mapped at imx6q_opp_check_speed_grading()
ARM: imx: clk-vf610: Add clock for SNVS
ARM: imx: clk-vf610: Add clock for UART4 and UART5
ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sx
ARM: imx: support arm power off in cpuidle for i.mx6sx
ARM: imx: remove unnecessary setting for DSM
ARM: imx: correct the hardware clock gate setting for shared nodes
ARM: imx: pllv3: add shift for frequency multiplier
ARM vf610: add compatibilty strings of supported Vybrid SoC's
Signed-off-by: Olof Johansson <olof@lixom.net>
ARM: mvebu: make DTS comments reflect DEBUG_LL changes
ARM: mvebu: Armada 385 GP: Add regulators to the SATA port
ARM: Kirkwood: Added support for pogoplug e02 (pink/gray)
ARM: mvebu: fix compatible strings of MBus on Armada 375 and Armada 38x
dt: bindings: update mvebu-mbus DT binding with new compatible properties
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJUwEZPAAoJEOa/DcumaUyE9rQQAKKSnjBfem3/F5Gr3JWZ25Gp
s42q5FyIl+LZf1c20aY6STE792/fAnsCC1VfCm+BhRpdRbBU2Y+7ZCD89w0nrqOz
J6TMO57yz41Sa4aoeo22Kuoy0YW8VmV129/tkITk+UmdkljrQnMEDUg++YdTRt64
1Q5RPtqz0xiENtqq1eLfRaiT7dYYeZ2BTwkZ7wGONA3NjjzZmZ5Bc4FFYGV+Zq6G
sfLfDh+1bEJdh5LWBtTB/sJofwt7ho9L998Ohf9QfEyHj3wD6BgvOJDr9ntftxw4
iPGEIQs6rW0/bEEKbMGXN+RjdAFyKylFRdZCglHvlvcgnONPT+4Na66y8xDanzuW
Kx26RgPolyt5/3prs/RyAAq3BHlSQKSdh7GAkc6Uut4K1n/rjUWsIOrSq9yfHXA+
dTo2w/Kxlq0NjWFam4lue4V10qIbkq8Z9kClMYxnT3GXTxjcbmYUBV3gWlDP5pfI
+6yycmdYvF2jwImVoeSZw9a4egXwuwJTtOdPZxIg5sL0Ptyb0fbScC3irK2rQB9x
+m3MCB48+8KzLOGVP+inW5GNV2QG5ufjVCNtB6LfrLa1Hd8TW8nrZH+DpLRBnzMt
wfxhyLIWq4mBkaV/W3E4J2zriBBXcLlVv+A/ecOxUGP+ioFn/q5Q/UB3UUFOBbkJ
ugjYe27QPYI2RBYsrun7
=KUSL
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.20-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu/dt #2" from Andrew Lunn:
Second set of dt patches for mvebu for v3.20.
* tag 'mvebu-dt-3.20-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: make DTS comments reflect DEBUG_LL changes
ARM: mvebu: Armada 385 GP: Add regulators to the SATA port
ARM: Kirkwood: Added support for pogoplug e02 (pink/gray)
ARM: mvebu: fix compatible strings of MBus on Armada 375 and Armada 38x
dt: bindings: update mvebu-mbus DT binding with new compatible properties
Signed-off-by: Olof Johansson <olof@lixom.net>
Cortex-A9 reference from the machine name.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJUwBuaAAoJEPOmecmc0R2B5KkIAKU75P0FOtAMnuF4vOybgCcE
lPQKX//fXsjClh56NuIxAtU6sg3HIXrXeD0O8hsTRVBO72RSv5wuzdJtCKCMbtNT
TFJQe3YXbYHxRwzh/beBX1ff6qKbJyPHxuFkAukfzGDXPin0J4ac0ryWjNrDfpYM
j+X6o2/Uo/FF/I1tPDztxKlk15bNuPV9IOINbN3tTUr121y/6sc+UkeErtWfRnFt
+MD9/8tz8nETDmGXzxMjsfTSl6iMjzgesSr7ltMlytXGdIwCzU4NCPO2Y0/MoaUi
UKtuI2vT3xi9OH6DHNCIIebvaVzN7fp+tNSkhIIKVIomWTOIxgIQJ6BOS+CKgj0=
=H1k7
-----END PGP SIGNATURE-----
Merge tag 'v3.20-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
Merge "ARM: rockchip: soc updates for v3.20" from Heiko Stübner:
SoC parts of basic suspend support and removal of
Cortex-A9 reference from the machine name.
* tag 'v3.20-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: remove cpu-core name from machine name
ARM: rockchip: Add pmu-sram binding
ARM: rockchip: add suspend and resume for RK3288
Signed-off-by: Olof Johansson <olof@lixom.net>
Add i2c-mux-idle-disconnect device tree property to PCA954x mux driver. The new
property forces the multiplexer to disconnect child buses in idle state. This is
used, for example, when there are several multiplexers on the same bus and the
devices on the underlying buses might have same I2C addresses.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nsn.com>
[wsa: added a newline]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Hardware-triggered thermal reset requires configuring the I2C
reset procedure. This configuration is read from the device tree,
so document the relevant properties in the binding documentation.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device tree bindings for DA9063 regulators; Real-Time Clock
and Watchdog.
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add binding for the Qualcomm Resource Power Manager (RPM) found in 8660,
8960 and 8064 based devices.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This adds the devicetree binding documentation for the LTC2941 and LTC2943
driver. These are I2C connected battery gas gauge ICs.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
The register bit fields are a little different, so add an entry and a
compatible string to accommodate them.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Backmerge Linus tree after rc5 + drm-fixes went in.
There were a few amdkfd conflicts I wanted to avoid,
and Ben requested this for nouveau also.
Conflicts:
drivers/gpu/drm/amd/amdkfd/Makefile
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
drivers/gpu/drm/amd/amdkfd/kfd_priv.h
drivers/gpu/drm/amd/include/kgd_kfd_interface.h
drivers/gpu/drm/i915/intel_runtime_pm.c
drivers/gpu/drm/radeon/radeon_kfd.c
The pogoplug differs from the SheevaPlug only by a
few details, but especially in the led assignments.
This patch was tested under Gentoo Linux and is
based on dts files from Arch Linux ARM and OpenWrt.
Suggested-by: Felix Kaechele <heffer@fedoraproject.org>
Suggested-by: Oleg Rakhmanov <moonman.ca@gmail.com>
Signed-off-by: Christoph Junghans <ottxor@gentoo.org>
[Andrew Lunn <andrew@lunn.ch>: Fixed subject line]
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
This patch enable the last big hardware feature of my driver: the
connector for panel.
Like for HMDI and HDA, Digital Video Out (DVO) create brige, encoder
and connector
drm objects.
* 'drm-sti-next-add-dvo' of git://git.linaro.org/people/benjamin.gaignard/kernel:
drm: sti: add DVO output connector
Add dts file for Hisilicon hip01 ca9x2 board
Signed-off-by: Wang Long <long.wanglong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
[olof: Folded in smp enable-method from a different patch]
Signed-off-by: Olof Johansson <olof@lixom.net>
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
update the phy driver to not use the reg property to access the sysconfig
register offsets.
This is because other phy's (miphy28, miphy365) have a combination of
memory mapped registers and sysconfig control regs, and we shouldn't
be mixing address spaces in the reg property. In addition we would
ideally like the sysconfig offsets to be passed via DT in a uniform way.
This new method will also allow us to support devices which have sysconfig
registers in different banks more easily and it is also analagous to how
keystone and bcm7745 platforms pass there syscon offsets in DT.
This breaks DT compatibility, but this platform is considered WIP, and
is only used by a few developers who are upstreaming support for it.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
update the miphy28lp phy driver to access sysconfig register offsets via
syscfg dt property.
This is because the reg property should not be mixing address spaces like
it does currently for miphy28lp. This change then also aligns us to how other
platforms such as keystone and bcm7445 pass there syscon offsets via DT.
I have updated the miphy28lp phy driver same way as Peter's implementation.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display
controller device.
The HLCDC block provides a single RGB output port, and only supports LCD
panels connection to LCD panels for now.
The atmel,panel property link the HLCDC RGB output with the LCD panel
connected on this port (note that the HLCDC RGB connector implementation
makes use of the DRM panel framework).
Connection to other external devices (DRM bridges) might be added later by
mean of a new atmel,xxx (atmel,bridge) property.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Updated pull request with Daniel's fix on top for the power management
Kconfig changes that had snuck in since last update of the IIO tree
worked it's way through from mainline.
Original pull message
New device support
* jsa1212 proxmity / ambient light sensor
* SM08500 supported added to the kxcjk-1013 accelerometer driver
* KMX61 Accelerometer/Magnetometer. This took a somewhat rocky path
being first merged, then reverted for a rewrite after a discussion of
how to support additional functionality and finally being merged prior
to some last reviews coming in, with resultant follow up patches.
* Freescale mma9551l driver (minor follow up warning supression patch).
* Semtech SX9500 proximity device driver.
* ak8975 gains support for ak09911 and ak09912 and drop the standalone driver
for the ak09911.
New functionality
* Dummy driver gains some virtual registers making it more flexible.
* IIO_ACTIVITY channel types, with modifiers running, walking etc. This is
to support on chip motion clasifiers. As such it is in the form of a
confidence percentage. The only devices so far only do binary decisions
but this gives us room when other devices give more nuanced clasification.
* IIO_EV_DIR_NONE type for events where there is no obvious direction.
First case is step detection.
* IIO_STEPS channel type for pedometers.
* ENABLE mask element used to control turning on counting types such as
the pedometer that need a 'start point'.
* INSTANCE event type to support things that happen once.
* info element for height calibration (used in various motion estimation
algorithms). Note heigh tof use
* dummy driver demonstration of the use of all the new bits above.
* event monitor support for the new events.
* inv_mpu6050 gains an i2c mux to allow bypassing the device to access
additional devices connected on the other side of it. Note that in
Windows these are handled by firmware on the device and not exposed
directly.
* inv_mpu6050 gains ACPI enumeration.
* inkern interface gains iio_write_channel_raw to allow in kernel users
of DAC functionality via a simple wrapper.
* Document input current readings in the ABI docs.
* Add an error message when we get an out of range error in device tree
processing for the in kernel interfaces. Basically a device tree debugging
aid.
* Add a sanity check that a scan index for a channel is unique during
registration. There to help catch bugs as this should never happen
in a bug free driver.
Cleanups and fixlets
A rework of buffer registration from Lars - a precursor to some other
upcoming new stuff (a few patches from others rolled in here as well).
* Ensure all drivers register the same channels for the device and buffer.
* Move buffer registration into the core rather than using the old
two step approach. Now we have simple ways of using a unified set channels
for both without requiring channels be exposed by both interface, this
removes a fair bit of boilerplate.
* Stop sca3000 and ad5933 (both in staging) enabling buffer channels by
default. It has long be convention in IIO to startup with no channels
enabled and leave it up to userspace to say what goes in the buffer.
Getting rid of these allows us to drop export of iio_scan_mask_set.
* Drop get_bytes_per_datum from iio_buffer_access_funcs as not been used
for a while.
* Allocate standard buffer attributes in the core rather than in every
driver with a buffer.
* Make the length attribute read only when a driver is not able to set
the length.
* Drop the get_length callback for buffers as it is already available in
struct iio_buffer.
* Drop an unused arguement form iio_kfifo_allocate and add devm allocator
for it.
* some kconfig entries gain anotation with the resulting module name.
* Fix a resulting compile issue in dummy driver due to a stub taking
wrong parameters as a result of the above rework.
* Fix an off by 2 error in copying the core assigned buffer attributes.
Other cleanups,
* Trivial space before comma fixups.
* ak8975 fixlets - none critical. Rework to allow more device support.
* Drop unnecessary sizeof(u8) calls.
* bmp280 - refactor the compensation code to reduce copy operations and
code length. A second patch futher optimized this and performed some
other minor cleanups.
* kxcjk-1013 - various power control cleanups to avoid unnecessary enable
/ disable of device. Make sure it is only controlled at all if CONFIG_PM
is enabled. Also som cleanups of error paths.
* Small cleanups in adf4530 driver - pointless message and unnecessary braces.
* Clarifiy the proximity ABI docs to make it clear it should get bigger
as we move futher away.
* Drop a misleading comment form industrialio-core.c
* Trivial white space cleanups.
* sca3000 looses an unused debug function.
* Fix char unsigned ordering in ad8366
* Increase the sleep time in ad9523 to make it predictable (value didn't
really matter so make it more than 20 msecs)
* mxs-lradc touchscreen property cleanups in device tree are fixed to ensure
the meet all the 'interesting' documentation.
* A couple of cleanups for the staging ad5933 driver to avoid unnecessary
conversion to a processed temperature vlaue in kernel and remove
platform data form the state structure as not needed after probe.
* Fix a wrong scale factor in the docs.
Misc
* Add IIO include files to the maintainers entry.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJUvtDlAAoJEFSFNJnE9BaIaNMQAI9ZYOrOmvSpxPV4ab71it9z
gi03VG8+iJl0dPgwcSHeFZvSDiNAOWSX/XdWLoxFAdpjpsnytIp01s9+c3ogz58j
pYbjxuOT2Qcf+36REuaFkQPFV2ppXMvwDwFUUNeFVupu+bVUKeZuNafBDp00aN1c
o4MPDwoS1EcTHL+77iCg06exL8LozOwLabfUTRVIRkhIqikemghcmubQHH06m+dk
EMddtNcXTVR4cJLX076nkKsNDHgmfoBYL9Hy/OvQbjWYAxoZg+q90ZX8yCy0Z5oW
otChj5XpoYRIa7X6xvP5kTebD4iiR/COWer83EyqFosXhmQ/27rWasST42j1K3q/
mU40skbscDef4F6COMlgBtVh1FhKUm9AHPAGk5swW792Qjpd4xdt+GShU5bJCa4O
OOZYk8ulraELeWVz2IK+CrOvJYeTSrNQR6VA6sBjWRHeqxtB0yOJkhxX9NUcSIgJ
GwM8qNTrQUkvI7OGvFGvf8hp9cboJTKEfzC+yspj+OJSjgJgNWw2pOjzJjsexxaL
nT2rKhPg46hC+FR4IvPPjhGihCtMSgBWkwbHSeXH+TgRfbbTUh6y6sqEUZraVhnQ
LKde54G0aH1XBFIM6fwWIPgdWBWsI3b3pFuBRMzhORdcCuAUOvDSyc5hVcaA8qb5
UZghapUruB556xjoMV3n
=LlJD
-----END PGP SIGNATURE-----
Merge tag 'iio-for-3.20a_take2' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-testing
Jonathan writes:
First round of IIO new drivers, cleanups and functionality for the 3.20 cycle take 2
Updated pull request with Daniel's fix on top for the power management
Kconfig changes that had snuck in since last update of the IIO tree
worked it's way through from mainline.
Original pull message
New device support
* jsa1212 proxmity / ambient light sensor
* SM08500 supported added to the kxcjk-1013 accelerometer driver
* KMX61 Accelerometer/Magnetometer. This took a somewhat rocky path
being first merged, then reverted for a rewrite after a discussion of
how to support additional functionality and finally being merged prior
to some last reviews coming in, with resultant follow up patches.
* Freescale mma9551l driver (minor follow up warning supression patch).
* Semtech SX9500 proximity device driver.
* ak8975 gains support for ak09911 and ak09912 and drop the standalone driver
for the ak09911.
New functionality
* Dummy driver gains some virtual registers making it more flexible.
* IIO_ACTIVITY channel types, with modifiers running, walking etc. This is
to support on chip motion clasifiers. As such it is in the form of a
confidence percentage. The only devices so far only do binary decisions
but this gives us room when other devices give more nuanced clasification.
* IIO_EV_DIR_NONE type for events where there is no obvious direction.
First case is step detection.
* IIO_STEPS channel type for pedometers.
* ENABLE mask element used to control turning on counting types such as
the pedometer that need a 'start point'.
* INSTANCE event type to support things that happen once.
* info element for height calibration (used in various motion estimation
algorithms). Note heigh tof use
* dummy driver demonstration of the use of all the new bits above.
* event monitor support for the new events.
* inv_mpu6050 gains an i2c mux to allow bypassing the device to access
additional devices connected on the other side of it. Note that in
Windows these are handled by firmware on the device and not exposed
directly.
* inv_mpu6050 gains ACPI enumeration.
* inkern interface gains iio_write_channel_raw to allow in kernel users
of DAC functionality via a simple wrapper.
* Document input current readings in the ABI docs.
* Add an error message when we get an out of range error in device tree
processing for the in kernel interfaces. Basically a device tree debugging
aid.
* Add a sanity check that a scan index for a channel is unique during
registration. There to help catch bugs as this should never happen
in a bug free driver.
Cleanups and fixlets
A rework of buffer registration from Lars - a precursor to some other
upcoming new stuff (a few patches from others rolled in here as well).
* Ensure all drivers register the same channels for the device and buffer.
* Move buffer registration into the core rather than using the old
two step approach. Now we have simple ways of using a unified set channels
for both without requiring channels be exposed by both interface, this
removes a fair bit of boilerplate.
* Stop sca3000 and ad5933 (both in staging) enabling buffer channels by
default. It has long be convention in IIO to startup with no channels
enabled and leave it up to userspace to say what goes in the buffer.
Getting rid of these allows us to drop export of iio_scan_mask_set.
* Drop get_bytes_per_datum from iio_buffer_access_funcs as not been used
for a while.
* Allocate standard buffer attributes in the core rather than in every
driver with a buffer.
* Make the length attribute read only when a driver is not able to set
the length.
* Drop the get_length callback for buffers as it is already available in
struct iio_buffer.
* Drop an unused arguement form iio_kfifo_allocate and add devm allocator
for it.
* some kconfig entries gain anotation with the resulting module name.
* Fix a resulting compile issue in dummy driver due to a stub taking
wrong parameters as a result of the above rework.
* Fix an off by 2 error in copying the core assigned buffer attributes.
Other cleanups,
* Trivial space before comma fixups.
* ak8975 fixlets - none critical. Rework to allow more device support.
* Drop unnecessary sizeof(u8) calls.
* bmp280 - refactor the compensation code to reduce copy operations and
code length. A second patch futher optimized this and performed some
other minor cleanups.
* kxcjk-1013 - various power control cleanups to avoid unnecessary enable
/ disable of device. Make sure it is only controlled at all if CONFIG_PM
is enabled. Also som cleanups of error paths.
* Small cleanups in adf4530 driver - pointless message and unnecessary braces.
* Clarifiy the proximity ABI docs to make it clear it should get bigger
as we move futher away.
* Drop a misleading comment form industrialio-core.c
* Trivial white space cleanups.
* sca3000 looses an unused debug function.
* Fix char unsigned ordering in ad8366
* Increase the sleep time in ad9523 to make it predictable (value didn't
really matter so make it more than 20 msecs)
* mxs-lradc touchscreen property cleanups in device tree are fixed to ensure
the meet all the 'interesting' documentation.
* A couple of cleanups for the staging ad5933 driver to avoid unnecessary
conversion to a processed temperature vlaue in kernel and remove
platform data form the state structure as not needed after probe.
* Fix a wrong scale factor in the docs.
Misc
* Add IIO include files to the maintainers entry.
- Implement mode_fixup for a DI vertical timing limitation
- Use generic DRM OF helpers in DRM core
- Convert imx-hdmi to dw_hdmi drm_bridge and add rockchip
driver
- Add DC use counter to fix multi-display support
- Simplify handling of DI clock flags
- A few small fixes and cleanup
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUr4dcAAoJEFDCiBxwnmDr/scQAIZhXd+UtgqxoUe/gEiDO5FE
EaWMzhnVKqc+aWlz2N4g968WDrC/F5zlL66i9AnYdmW8m2FwQkLVkHivALdHzvsb
B1QCoo/LySlXJ25sUIGiSXt2kqsqnWykXCyKE0DicovS3oH/krye8kXoNmKe4pZx
munUrXKH2XRAdSg+d5MjIVodfGWVgCyTq2DY4W+YII+KfFc0eC9qWSLdaPFe+eED
Kg1QwcwRh7EQ4Smb+LX4bWqguYl6+kCEYQdio8cNLp8iYyxILG0ZJ/Unhm7y2bus
3c13VAFeMud5j40t4Bfzq3LcnxeBDAzR/RyNheracr6OAu5Jv0liRTe3Y8JWgq6c
JqZ1hjch210RniCrorKajBJ+KKnHHtzpmardxK5p1L8f93btmNTDwanqiYohV+GE
+V8SoOzG0ek69CC+yFPxh2oV0wQ+BLu+Yg4CLFLA2uSN9pmdxpgYlulB4LqYC4qw
UKU40kNdv/Vzt0+FTKkw1yDQW3XZ7ZfP/9P89H8MFE1DKqkJl7dTEk6ZNDT/fjVS
qyhQMbk4V1HuKVlL0WASFwIkyqDTIx9mz0wp+UMH1kk1tFlq5F20IgBPWhLgQqmR
XgOiRR1yZkaZVAGTtAgQ4e5eKc87chEmtTOp1zcT1K53HPyn2WE6sISeLYttn+/4
cxRr39xl6M97Nfi2JkJO
=r9/P
-----END PGP SIGNATURE-----
Merge tag 'imx-drm-next-2015-01-09' of git://git.pengutronix.de/git/pza/linux into drm-next
imx-drm mode fixup support, imx-hdmi bridge conversion and imx-drm cleanup
- Implement mode_fixup for a DI vertical timing limitation
- Use generic DRM OF helpers in DRM core
- Convert imx-hdmi to dw_hdmi drm_bridge and add rockchip
driver
- Add DC use counter to fix multi-display support
- Simplify handling of DI clock flags
- A few small fixes and cleanup
* tag 'imx-drm-next-2015-01-09' of git://git.pengutronix.de/git/pza/linux: (26 commits)
imx-drm: core: handling of DI clock flags to ipu_crtc_mode_set()
gpu: ipu-di: Switch to DIV_ROUND_CLOSEST for DI clock divider calc
gpu: ipu-v3: Use videomode in struct ipu_di_signal_cfg
imx-drm: encoder prepare/mode_set must use adjusted mode
imx-drm: ipuv3-crtc: Implement mode_fixup
drm_modes: add drm_display_mode_to_videomode
gpu: ipu-di: remove some non-functional code
gpu: ipu-di: Add ipu_di_adjust_videomode()
drm: rockchip: export functions needed by rockchip dw_hdmi bridge driver
drm: bridge/dw_hdmi: request interrupt only after initializing the mutes
drm: bridge/dw_hdmi: add rockchip rk3288 support
dt-bindings: Add documentation for rockchip dw hdmi
drm: bridge/dw_hdmi: add function dw_hdmi_phy_enable_spare
drm: bridge/dw_hdmi: clear i2cmphy_stat0 reg in hdmi_phy_wait_i2c_done
drm: bridge/dw_hdmi: add mode_valid support
drm: bridge/dw_hdmi: add support for multi-byte register width access
dt-bindings: add document for dw_hdmi
drm: imx: imx-hdmi: move imx-hdmi to bridge/dw_hdmi
drm: imx: imx-hdmi: split phy configuration to platform driver
drm: imx: imx-hdmi: convert imx-hdmi to drm_bridge mode
...
* 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev:
drm: rcar-du: Implement support for interlaced modes
drm: rcar-du: Clamp DPMS states to on and off
drm: rcar-du: Enable hotplug detection on HDMI connector
drm: rcar-du: Output HSYNC instead of CSYNC
drm: rcar-du: Add support for external pixel clock
drm: rcar-du: Refactor DEFR8 feature
drm: rcar-du: Remove LVDS and HDMI encoders chaining restriction
drm: rcar-du: Configure pitch for chroma plane of multiplanar formats
drm: rcar-du: Don't fail probe in case of partial encoder init error
drm: adv7511: Remove interlaced mode check
Since in SAMA5D4 chip, the PMECC can correct bit flips in erased page.
So we add a DT property to indicate this hardware character.
If the PMECC support correct bitflip erased page (all data are 0xff).
Then we can use the PMECC correct the page and skip the erased page
check.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Freescale introduced new ARM-based socs which using the compatible
clock IP block with PowerPC-based socs'. So this driver can be used
on both platforms.
Updated relevant descriptions and renamed this driver to better
represent its meaning and keep the function of driver untouched.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
On dm816x the clocks are sourced from a FAPLL (Flying Adder PLL)
that does not seem to be used on the other omap variants.
There are four instances of the FAPLL on dm816x that each have three
to seven child synthesizers.
I've set up the FAPLL as a single fapll.c driver. Later on we could
potentially have the PLL code generic. To do that, we would have to
consider the following:
1. Setting the PLL to bypass mode also sets the child synthesizers
into bypass mode. As the bypass rate can also be generated by
the PLL in regular mode, there's no way for the child synthesizers
to detect the bypass mode based on the parent clock rate.
2. The PLL registers control the power for each of the child
syntheriser.
Note that the clocks are currently still missing the set_rate
implementation so things are still running based on the bootloader
values. That's OK for now as most of the outputs have dividers and
those can be set using the existing TI component clock code.
I have verified that the extclk rates are correct for a few clocks,
so adding the set_rate support should be fairly trivial later on.
This code is partially based on the TI81XX-LINUX-PSP-04.04.00.02
patches published at:
http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
On the A80 SoC, the 4 mmc controllers each have a separate register
controlling their register access clocks and reset controls. These
registers in turn share a ahb clock gate and reset control.
This patch adds a platform device driver for these controls. It
requires both clocks and reset controls to be available, so using
CLK_OF_DECLARE might not be the best way.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Document new device tree bindings for Maxim 77693 charger driver.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Document the fact that the trigger signal is now optional, and describe
the behavior when this is used.
While at it, fix a typo, and paraphrase a sentence to be less platform
specific.
Signed-off-by: Frans Klaver <frans.klaver@xsens.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Driver for Fujitsu MB86S7x SoCs that have a memory mapped GPIO controller.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Andy Green <andy.green@linaro.org>
Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com>
Signed-off-by: Tetsuya Nuriya <nuriya.tetsuya@jp.fujitsu.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation for APM X-Gene standby GPIO controller DTS binding.
Signed-off-by: Y Vo <yvo@apm.com>
[Some spelling and various fixes]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds new host controller driver for
Fujitsu SDHCI controller f_sdh30.
Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com>
Signed-off-by: Andy Green <andy.green@linaro.org>
Signed-off-by: Tetsuya Takinishi <t.takinishi@jp.fujitsu.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
this company already provided some products, so it make sense to add
them to vendor-prefixes.txt list
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The module 0 style clocks, or storage module clocks as named in the
official SDK, are almost the same as the module 0 clocks on earlier
Allwinner SoCs. The only difference is wider mux register bits.
As with earlier Allwinner SoCs, mmc module clocks are a special case
of mod0 clocks, with phase controls for 2 child clocks, output and
sample.
This patch adds support for both.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The network coprocessor (NetCP) is a hardware accelerator that processes
Ethernet packets. NetCP has a gigabit Ethernet (GbE) subsystem with a ethernet
switch sub-module to send and receive packets. NetCP also includes a packet
accelerator (PA) module to perform packet classification operations such as
header matching, and packet modification operations such as checksum
generation. NetCP can also optionally include a Security Accelerator(SA)
capable of performing IPSec operations on ingress/egress packets.
Keystone SoC's also have a 10 Gigabit Ethernet Subsystem (XGbE) which
includes a 3-port Ethernet switch sub-module capable of 10Gb/s and
1Gb/s rates per Ethernet port.
NetCP Subsystem device tree layout looks something like below:
-----------------------------
NetCP subsystem(10G or 1G)
-----------------------------
|
|-> NetCP Devices -> |
| |-> GBE/XGBE Switch
| |
| |-> Packet Accelerator
| |
| |-> Security Accelerator
|
|
|
|-> NetCP Interfaces -> |
|-> Ethernet Port 0
|
|-> Ethernet Port 1
|
|-> Ethernet Port 2
|
|-> Ethernet Port 3
Common driver supports GBE as well XGBE network processors.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: David Miller <davem@davemloft.net>
Cc: Santosh Shilimkar <santosh.shilimkar@kernel.org>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
- little typo and a LED declared
- addition of the Special Function Registers (SFR) + its binding
- RTC & SRAM nodes
- the at91sam9xe has its own .dtsi now. Not combined with at91sam9260 anymore
- addition of the Image Sensor Interface (ISI) DT part and supported sensors
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJUt+9WAAoJEAf03oE53VmQrlQH/2gLux3w9NMBm6GKDAJe3ZbY
JSiT9JIpcDmvVPXheeXQc0gZFGbfg8kcbx6mopPR/n6gAeP0npRApmQxS04M9M6b
HyAyj26s1h79WZOki7hhsIw6bhMCNDb7ODoDOw4F6U1/WWLh+uZY3fg+HO2CFBS8
wyDWKQQWAe0LvbaB44iw5cGsZ2+8/1rb5R7w7AqITjLTOGLvJZn50TYlY6hRrb+7
qfD0gqaRzX6axdtsGVNzkuYUuLQ3rE9IhgauhHlge9QT1Lkl4wfONnGiOFeIc+n0
tcHLb3BYBqOKDbOop+3ED3bqxcmobUIQIlEutvg5lnFkWeVYnXgkIFxHPpEK4K0=
=RH2X
-----END PGP SIGNATURE-----
Merge tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "at91: dt for 3.20 #1" from Nicolas Ferre:
First batch of DT changes for 3.20:
- little typo and a LED declared
- addition of the Special Function Registers (SFR) + its binding
- RTC & SRAM nodes
- the at91sam9xe has its own .dtsi now. Not combined with at91sam9260 anymore
- addition of the Image Sensor Interface (ISI) DT part and supported sensors
* tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91: dts: sama5d3: add ov2640 camera sensor support
ARM: at91: dts: sama5d3: change name of pinctrl of ISI_MCK
ARM: at91: dts: sama5d3: change name of pinctrl_isi_{power,reset}
ARM: at91: dts: sama5d3: move the isi mck pin to mb
ARM: at91: dts: sama5d3: add missing pins of isi
ARM: at91: dts: sama5d3: split isi pinctrl
ARM: at91: dts: sama5d3: add isi clock
ARM: at91/dt: ethernut5: use at91sam9xe.dtsi
ARM: at91/dt: Add a dtsi for at91sam9xe
ARM: at91/dt: add SRAM nodes
ARM: at91/dt: at91rm9200ek: enable RTC
ARM: at91/dt: rm9200: add RTC node
ARM: at91/dt: at91sam9n12: Add RTC node
ARM: at91: sama5d4: Add SFR
ARM: at91: sama5d3: Add SFR
ARM: at91: Add Special Function Registers binding documentation
ARM: at91/dt: sam9263: Fix typo: ac91_clk -> ac97_clk
ARM: at91/dt: sama5d3: enable D2 as the heartbeat LED
Signed-off-by: Olof Johansson <olof@lixom.net>
CSR Marco SoC has never shipped to customers that could be interested
in mainline support. and new Atlas7 is a replacement SoC that is in
development.
so we drop Marco dts stuff, and add dts stuff for Atlas7.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJUtmPZAAoJEDIv4aC191Rh3ZEQAI0kUJqgUAK8te3zHnQ0rUBp
zawNk6N5D6KIFEue3hNDE6XlBhhKz8o5Npr7Wlp3WDRlA9gvSn0BYd5iQhRQjg3F
hXRLPpK47pUPlq0RMLFNiYO4EwNQlA6ANBDe1sAUDWPiDplfkF0w5WXW8ZvPk3FL
YXbumzH6JOrCzyMijOXKfJEtN/8qkgbm8mEQxwiuwLzzfmsuryOTbJbSvv8ogP4K
hZEnfAP6MfR9Kk87a1XKMgs3DMuaWou6RXh6Vah4z0OlvtWLOmAy/j0tXs0Qe8Eh
Kcms+zHHrmT9QyT82x/FK3ZCj0Q+HuI9mf3Gf54DKfYh9zMhjZH/y3ORFxHMiQFi
ycSVO/LuLEB9J2X/3UDmnsl2YVds7v9Bf+8ZkMTprA1MKEpxWnZDIEH7cX5e192+
pgVBh7N9dbeLxgH6i6VtRXSRtjNqE+893o4qKYGagvzJhQ0XO5Dk1Em+LrkJIQeh
pdpmgpKCWfT5RPJLpdUC93TUvpex+LlcCC5Obk107aEjGDeZCqJDYMl6J3YQdVIC
2oY5+hAmq5rxQ3D4KrXoSLmFr9pXQSNEav18dM00LZMnpoQlC/2EiuIsCv/b45EF
w31fW0CM0C8kXDabkQjZOTcItz+nkJCb1KLvhm20Zcir2g9zM9iqW8QVcg6BYm10
KC+gpZpQvAszle4KW+v0
=wbyB
-----END PGP SIGNATURE-----
Merge tag 'atlas7-init-dts-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/dt
Merge "CSR atlas7 init dts for 3.20" from Barry Song:
Drop Marco and add init dts stuff for Atlas7
CSR Marco SoC has never shipped to customers that could be interested
in mainline support. and new Atlas7 is a replacement SoC that is in
development.
So we drop Marco dts stuff, and add dts stuff for Atlas7.
* tag 'atlas7-init-dts-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
ARM: dts: add init dts file for CSR atlas7 SoC
ARM: dts: drop MARCO platform DT stuff
Signed-off-by: Olof Johansson <olof@lixom.net>
It is now possible to use a regulator property for each port of the
AHCI controller.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Current sx150x gpio expander driver doesn't support
DTS. Now we added dts support for this driver.
Signed-off-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Audio IPs on Exynos7 require gpios available in AUDIO
pin controller block. So adding the AUDIO pinctrl support.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
While SDIO devices are runtime probable they sometimes need nonprobable
additional information on embedded systems, like an additional gpio
interrupt or a clock. This binding describes how to add child nodes to the
devicetree to supply this information.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[hdegoede@redhat.com: Documented the need for #address- and #size-cells]
[hdegoede@redhat.com: Added a real world example]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The touchscreen controller has a temperature sensor embedded in the SoC,
which already has hwmon support in the driver.
Add DT thermal zone support so we can use it with cpufreq for thermal
throttling.
This also adds a comment stating that we do not know the actual formula
for calculating the temperature.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
The driver allows using CDCE706 in its default configuration recorded in
EEPROM and adjusting of synthesized clocks by consumers.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
st33zp24 exists in i2c and spi version. Both have different possible
configuration.
st33zp24.txt is renamed st33zp24-i2c.txt.
Reviewed-by: Jason Gunthorpe <jason.gunthorpe@obsidianresearch.com>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Peter Huewe <peterhuewe@gmx.de>
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
st33zp24 tpm can be seen as a trivial i2c device as other i2c tpm.
However several other properties needs to be documented such as lpcpd.
Reviewed-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Certain PHY settings need to be configurable by UEFI depending on the
platform being used. Add new device tree / ACPI properties that, if
present, will override the pre-determined values currently used.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The auto negotiation logic was geared to being the initiator of the
auto negotiation. This presented problems when auto negotiation was
initiated by the remote end. Change the auto negotiation logic to
make use of the auto negotiation event interrupt thus allowing the
auto negotiation state machine to function properly in either scenario.
This also removes the polling during auto-negotiation.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch
settings configured in registers leading to crashes if L2C is enabled
without overriding them. This patch introduces bindings to enable
prefetch settings to be specified from DT and necessary support in the
driver.
[mszyprow: rebased onto v3.18-rc1, added error message when prefetch related
dt property has been provided without any value]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On dm816x we have two emac controllers with separate memory
areas.
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
SH-Mobile AG5 (sh73a0) can be handled by the existing bindings.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- to support ARMv8 based exynos7 SoC
: add initial device tree for pinctrl, PMU, mmc, i2c, rtc,
watchdog, and adc nodes for exynos7 SoC and exynos7 based
espresso board.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJUs4KlAAoJEA0Cl+kVi2xqNWAP/RYc00oMVtKv8bvy6/SfY1QV
+ZqvZJwiYw+hR42bQ+piiT2F7fZJKjh1igUUQAV+ufIJNMb/ViwlMuAVc4PYhIwx
9vpGQjGGxCuxtTLu9D8mtO5VForsfqyVXFEAm/Puf0KgRLmCTsaZ1N7pSLhbEyyI
tY4fLfsU8xIozL7/yxO2jcmqZykdSKr7YJrvAzp+kcLGvCyrFUMOYFuwbHOMBfxI
vP41NrNtKfLQvwoQwGdAdVt+M3IIWgbRr6iK81X8a4GrirAp1vgpz6mgphpmu3J+
y/K7S5vdA3d3+tZ4JnG7qhW9MFfHqrgva2q1Sw4HMCEB70Z0E3j3Mlh+dDCK3tNH
DmXqpQJi7X0HiD0dWZnAsg66Y1KxB4D5+dnVgCz5NUeAs3diovEaQTBwLr67xy1W
IL8N2XQw7k7hRSBQr4XhSUZxslFult7kpg2VJ3josKOPvmh7jLUBPh+8TtHtaqxU
bYJDERjoYPpvrN8ep1Jg2oPdGqFt/PDG+9FQD28J2Ier4rVG5r0oJU8N+b1gpXnc
B+t5+2SzxCnjNy1E/CV7YZt1UifEqediDsn/1FAl47e4rk3P5/7kLFoiaeebSgzM
bqZX2VYzIzRa1bg778ECvq/21PcvAdRWCs7DjUkNi78k0tvWoeWmha5JbCTZH2Sb
OEdhyhNFH1BgVqSGfmNN
=09qn
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-64' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/arm64
Merge "Samsung exynos7 updates for v3.20" from Kukjin Kim:
- to support ARMv8 based exynos7 SoC
: add initial device tree for pinctrl, PMU, mmc, i2c, rtc,
watchdog, and adc nodes for exynos7 SoC and exynos7 based
espresso board.
* tag 'samsung-dt-64' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
arm64: Enable ARMv8 based exynos7 SoC support
arm64: dts: Add nodes for mmc, i2c, rtc, watchdog, adc on exynos7
arm64: dts: Add PMU DT node for exynos7 SoC
arm64: dts: Add initial pinctrl support to exynos7
arm64: dts: Add initial device tree support for exynos7
Signed-off-by: Olof Johansson <olof@lixom.net>
In boards, the dm9000 chip's power and reset can be controlled by gpio.
It makes sense to add them to the dm9000 driver and let dt be used to
enable power and reset the phy.
Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJUsuDQAAoJEHm+PkMAQRiGnecH/0RO9UKnEduOTRPaZGXAjGI8
N0FvNia8qn7f+XnvN62pG/YZZqi2uvuy37vwAXMtS6KXEgaDG9Wq4fVrhOaJ5VgL
QOmPdVGUa+1PuPcMYj/QLIFRfIHvIY/XVZWXrcIyYfQdBAAoJ2q23qx/yFmdyTwf
+enAv+PV4ZVNMEANyN9KS7xX5gPbSDl36AOhm6lXDvrlem4mbnhRuUtYez9R8KTK
VNfkKZQRDOgl4/ns0ndzpAUhaDj1JJGoLRgMXKna33XgtzSEL4XijvImdnoIXp5N
Z98Jc1N5Vg5OcUFeGJC3bRR27m39xoOHQk2ufY43uAIfB3Ez/C7m/r7b50ZVWfs=
=J7TO
-----END PGP SIGNATURE-----
Merge tag 'v3.19-rc4' into next
Merge with mainline to bring in the latest thermal and other changes.
This allows checkpatch to validate more DTSes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
at91sam9xe is slightly different from at91sam9260, in particular it has a
different SRAM size and location.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The special function registers gather some registers that allow to tweak
features provided by IPs controlled through another register range.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[nicolas.ferre@atmel.com: reg size: 0x60]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Three compatible strings have been added to the at91_udc driver.
Update the documentation accordingly.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The at91_udc driver request 2 clocks, and thus need them to be defined in
the device tree.
Document the clocks and clock-names properties so that everybody use the
correct names.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The SMC registers are used to configure Atmel EBI (External Bus Interface)
to interface with standard memory devices (NAND, NOR, SRAM or specialized
devices like FPGAs).
Declare this memory region as a syscon, so that different drivers can
configure the SMC interface (mostly timing configuration) according to
their need.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The Matrix registers are provided to configure internal bus behavior on
at91 SoCs.
Some registers might be accessed by several drivers (e.g. to configure
external memory bus timings), hence we declare this register set as a
syscon device.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Call clk_prepare_enable() and clk_disable_unprepare() for cpu dai
clock and codec dai clock in dai statup and shutdown callbacks. This
to make sure the related clock are enabled when the audio device is
used.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
- Add Armada 388 General Purpose Development Board support
- Add Device Tree description of the Armada 388 SoC
- Document the Device Tree binding for the Armada 388 SoC
- a38x: Add missing labels
- a38x: Add more pinctrl functions
- Add Armada 385 Access Point Development Board support
- Add a number of pinctrl functions
- A38x: Remove redundant pinctrl informations
- a38x: Fix node names
- Add support for Seagate BlackArmor NAS220
- kirkwood: enable phy driver for SATA controller on 88f6192
- gpio_poweroff support for Iomega ix2-200
- Use all remaining MTD space foor rootfs of Iomega ix2-200
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJUtS2PAAoJEOa/DcumaUyEjFYP/1YASbIF+hARCHek2egM5XL0
nBiJtZ1Gu0/1iHU18i6MsO1psksAQtf85mKiW/KJZxUUgZFk8aqcXm54KgMkVlG9
9WgcmLb3vYDEcz6rrbX+54fpDX6xep/vEKQv5SUFuUSPFhSKVHE3FOTvzAA5CrKQ
X6z27WyK9vPzfsOiM7j5acM5m+Myntsy0szDF6iPzi55FofTxbbi85rWlwshKGKd
xytFYmzJ8VBrYJHpfV51+BkacTJI8DgmVm1VwgqafP0dkcwrGM8cmyODwhItxdhg
9ChCuHd1rI6kJAQI8mldyMmQAaKpCkkTmkP6K0+a43QtK1zvkfkn/2IdbWDXRRyn
VBIYTZ+/CP2YQwtQFbk7SdNPZOP3CUpuyz/1gE3jglHjQf4g3usD7KkJRS+FrFP5
hYl74ZmNVh++hKCUbWXzTBxvZcWODQOZgSpfS+W9+2KOIFsXaQa2T596Ct7Kc32E
4ZHCX/uCccx8w+lELaivcYO4bQ+MDapGg85KdCUBUoeyHPUTOGAc2dmH/bjhzV9X
w8EdlC+H2y5Es68IDj4nQIyrc3MofPBtpUBSn152lZE+t53kPSwXGzlz4eFwcHtw
5CxY7DwgEdEP72cavKoV1/17cZ5hJuZK9cNAkngfO/JoYlcbAgRlTeekaz0fZkN2
fGxgDxiVHy+XFJZdMTHG
=uzJs
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.20' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu: dt for v3.20" from Andrew Lunn:
mvebu dt changes for v3.20 (part #1)
- Add Armada 388 General Purpose Development Board support
- Add Device Tree description of the Armada 388 SoC
- Document the Device Tree binding for the Armada 388 SoC
- a38x: Add missing labels
- a38x: Add more pinctrl functions
- Add Armada 385 Access Point Development Board support
- Add a number of pinctrl functions
- A38x: Remove redundant pinctrl informations
- a38x: Fix node names
- Add support for Seagate BlackArmor NAS220
- kirkwood: enable phy driver for SATA controller on 88f6192
- gpio_poweroff support for Iomega ix2-200
- Use all remaining MTD space foor rootfs of Iomega ix2-200
* tag 'mvebu-dt-3.20' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Add Armada 388 General Purpose Development Board support
ARM: mvebu: Add Device Tree description of the Armada 388 SoC
ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
ARM: mvebu: a38x: Add missing labels
ARM: mvebu: a38x: Add more pinctrl functions
ARM: mvebu: Add Armada 385 Access Point Development Board support
ARM: mvebu: Add a number of pinctrl functions
ARM: mvebu: A38x: Remove redundant pinctrl informations
ARM: mvebu: a38x: Fix node names
Kirkwood: add support for Seagate BlackArmor NAS220
ARM: dts: kirkwood: enable phy driver for SATA controller on 88f6192
ARM: dts: add gpio_poweroff support for Iomega ix2-200
ARM: dts: use all remaining MTD space foor rootfs of Iomega ix2-200
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add DT bindings for Renesas R-Mobile and SH-Mobile memory controllers.
Currently memory controller device nodes are used only to reference PM
domains, and prevent these PM domains from being powered down, which
would crash the system.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The new DT properties required for the I2S device node to be referred
as a clock provider and corresponding clock indices definition is added.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Addition of a LED Flash class extension entails the need for flash LED
specific device tree properties. The properties being added are:
max-microamp, flash-max-microamp, flash-timeout-microsec.
(cooloney@gmail.com: remove white spaces)
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
The A31s is a stripped down version of the A31, as such it is missing some
pins and some functions on some pins.
The new pinctrl-sun6i-a31s.c this commit adds is a copy of pinctrl-sun6i-a31s.c
with the missing pins and functions removed.
Note there is no a31s specific version of pinctrl-sun6i-a31-r.c, as the
prcm pins are identical between the A31 and the A31s.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
USB and Power regulator on Exynos7 require gpios available
in BUS1 pin controller block.
So adding the BUS1 pinctrl support.
Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that we have proper support to use the generic phase API in our clock
driver, switch the MMC driver to use it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Instead of having three different clocks for the main MMC clock and the two
phase sub-clocks, which involved having three different drivers sharing the
same register, rework it to have the same single driver registering three
different clocks.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
This patch adds the Device Tree bindings for the Hisilicon hip04
Ethernet controller, including 100M / 1000M controller.
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
- mt8135
- mt8127
- mt6598
For mt6592 only the sysirq support was added.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUsuCiAAoJELQ5Ylss8dNDRd4P/3MIYZpFs2uFVn5zeixAjfpI
OJQhA8M8XTsa4cO7pI1wcpJsCQJtor+gyQSAgHtTIX0haVDIzBs9hn5zpHk52/lW
e4jTGsovGhQGFubHjiX9579ej3gZN58bjEkvSmRSvlKMon572VR/TTshbz1GA0b9
QbvsA8r+HF34jPinh7aDNq67CjS38E4ge9GOda8apgLKgDhM/oUEnTIrDakqZgcg
2FRl/mymO25mAtuJi4Jlk6ecaAZ1kbdL+c4YGAjM9/cCCASPhHJE7fMujrwRiZfY
kCwcOMZ/aW5Vi2MviJQY63CH/iBcjj8zvqom080QXWU7XHys6osw3J1OoqVtAivr
t+aGhYn86tGcL5mD84c4yXXVMero9SGiJoQXjouusJmbNNOsOReqVpATHdhFMFK0
7DCtHX+Wjg/VKYdQ52cxzdnf1yOv1NiFH4oY+nW/taGVYH2dj6+wvtL7D5kvqlOy
UNtNMPgz6gU4BN33xu6LjWHM1q8WmCabYT59ViXNx2z78tJWubxy7GrqqWlRyhPt
ghHbMt1kUYOtGmI3EBXaZpxE/wWwsaGGWDEiMQN+sqFD73wOEc40nKh6q7XinhRB
PeWywT65UPUsQkR/WiD2s0uqE6UDC3NVFBVyZVpFcGRG+6rNcxt8lnXSuMwzxxBi
2BZHvFXQdwUQhO6QtfKG
=Idho
-----END PGP SIGNATURE-----
Merge tag 'v3.20-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
Merge "ARM: mediatek: DT changes for v3.20 (round 1)" from Matthias Brugger:
This adds support for the mediatek sysirq and the uarts for the following SoCs:
- mt8135
- mt8127
- mt6598
For mt6592 only the sysirq support was added.
* tag 'v3.20-next-dts' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: dts: Add uart to Aquaris5
ARM: mediatek: dts: Add uart to mt6589
dt-bindings: add mt6592 compatible string for mediatek sysirq
ARM: mediatek: Add sysirq device node to mt6592 dtsi
ARM: mediatek: dts: Add UART dts for MT8127 and MT8135 boards
DTS: serial: Add bindings document for the Mediatek UARTs
ARM: mediatek: add UART dts for mt8127 and mt8135
ARM: mediatek: Add sysirq in mt6589/mt8135/mt8127 dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fixes DT vendor-prefixes.txt documentation to reference
isil (NASDAQ symbol and the most used prefix inside the kernel) for
Intersil.
It reverts 7c75c1d5e7 ("dt-bindings: Document deprecated device
vendor name to fix related warning").
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Rob Herring <robh@kernel.org>
AD Holdings design and manufacture IP Camera technology in the UK.
http://www.ad-group.co.uk/
Signed-off-by: Ian Molton <imolton@ad-holdings.co.uk>
Signed-off-by: Rob Herring <robh@kernel.org>
Add vendor prefix for Silicon Mitus. Currently there is binding for
sm5502 extcon driver ("siliconmitus,sm5502-muic").
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
After the Nomadik pin controller was force migrated to generic pin
control bindings, some leftovers in the documentation need to be
cleaned up. The code and device trees are already migrated.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Everspin is a vendor of MRAM devices. Add them to the list
of Vendors.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Rob Herring <robh@kernel.org>
New bindings document for Altera fpga manager.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
The QEMU open source machine emulator and virtualizer presents firmware
and operating systems running in virtual machines ("guests") with purely
virtual hardware (ie. hardware that has never existed in physical form).
Since QEMU exposes some of these devices in a DTB, it makes sense to
define "qemu" and "virtio" as vendor prefixes.
The qemu definition is from [1], revision 4451 (22:24, 25 November 2014).
The virtio definition is composed from [2] and [3].
[1] http://wiki.qemu.org/Main_Page
[2] http://docs.oasis-open.org/virtio/virtio/v1.0/csprd01/virtio-v1.0-csprd01.html
[3] http://en.wikipedia.org/wiki/OASIS_%28organization%29
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Peter Maydell suggested that we describe new devices / DTB nodes in the
kernel Documentation tree that we expose to arm "virt" guests in QEMU.
Although the kernel is not required to access the fw_cfg interface,
"Documentation/devicetree/bindings/arm" is probably the best central spot
to keep the fw_cfg description in.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Just fix a minor typo about the example path.
Signed-off-by: Kaixu Xia <xiakaixu@huawei.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Current vendor-prefixes.txt already has "ak" prefix for Asahi Kasei Corp
by ae8c4209af2c(of: Add vendor prefix for Asahi Kasei Corp.)
It went through the appropriate review process. But, almost all
Asahi Kasei chip drivers are using "asahi-kasei" prefix today.
(arch/arm/boot/dts/tegra20-seaboard.dts only is using "ak,ak8975",
but there are instances of "asahi-kasei,ak8975" in other dts files.
And drivers/iio/magnetometer/ak8975.c doesn't support "ak,ak8975" prefix)
So, we made a mistake there.
In addition, checkpatch.pl reports WARNING if it is using "asahi-kasei"
prerfix in DT file.
(DT compatible string vendor "asahi-kasei" appears un-documented)
Marking it deprecated and warning with checkpatch is certainly
preferable. So, this patch replace "ak" to "asahi-kasei" in
vendor-prefixes.txt. (and fixup tegra20-seaboard)
OTOH, Asahi Kasei is usually referred to as "AKM", but this patch
doesn't care about it. Because no DT is using that today.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
This patch fixes I2C trivial-devices.txt DT documentation file to
reference isil (NASDAQ symbol and the most used prefix inside the
kernel) for Intersil.
It reverts 7c75c1d5e7 ("dt-bindings: Document deprecated device
vendor name to fix related warning").
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
On Rockchip I2C the controller drops SDA low slightly too soon to meet
the "repeated start" requirements.
>From my own experimentation over a number of rates:
- controller appears to drop SDA at .875x (7/8) programmed clk high.
- controller appears to keep SCL high for 2x programmed clk high.
The first rule isn't enough to meet tSU;STA requirements in
Standard-mode on the system I tested on. The second rule is probably
enough to meet tHD;STA requirements in nearly all cases (especially
after accounting for the first), but it doesn't hurt to account for it
anyway just in case.
Even though the repeated start requirement only need to be accounted
for during a small part of the transfer, we'll adjust the timings for
the whole transfer to meet it. I believe that adjusting the timings
in just the right place to switch things up for repeated start would
require several extra interrupts and that doesn't seem terribly worth
it.
With this change and worst case rise/fall times, I see 100kHz i2c
going to ~85kHz. With slightly optimized rise/fall (800ns / 50ns) I
see i2c going to ~89kHz. Fast-mode isn't affected much because
tSU;STA is shorter relative to tHD;STA there.
As part of this change we needed to account for the SDA falling time.
The specification indicates that this should be the same, but we'll
follow Designware's lead and add a binding. Note that we deviate from
Designware and assign the default SDA falling time to be the same as
the SCL falling time, which is incredibly likely.
Signed-off-by: Doug Anderson <dianders@chromium.org>
[wsa: rebased to i2c/for-next]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The number of clock cycles to be written into the CLKDIV register
that determines the I2C clk high phase includes the rise time.
So to meet the timing requirements defined in the I2C specification
which defines the minimal time SCL has to be high, the rise time
has to taken into account. The same applies to the low phase with
falling time.
In my test on RK3288-Pink2 board, which is not an upstream board yet,
if external pull-up resistor is 4.7K, rise_ns is about 700ns.
So the measured high_ns is about 3900ns, which is less than 4000ns
(the minimum high_ns in I2C specification for Standard-mode).
To fix this bug min_low_ns should include fall time and min_high_ns
should include rise time.
This patch merged the patch from chromium project which can get the
rise and fall times for signals from the device tree. This allows us
to more accurately calculate timings. see:
https://chromium-review.googlesource.com/#/c/232774/
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
[wsa: fixed a typo in the docs]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
CSR atlas7 uses Network on Chip(NoC) bus architecture, there are dozens
of MARCOs, in each MARCO, there are dozens of hardware modules.
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Hao Liu <Hao.Liu@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
The Renesas R-Mobile System Controller provides a.o. power management
support, following the generic PM domain bindings in
Documentation/devicetree/bindings/power/power_domain.txt.
For now this supports the R-Mobile A1 (r8a7740) only, but it should be
sufficiently generic to handle other members of the SH-Mobile/R-Mobile
family in the future.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Indicate if gadget driver must use dma for usb transfers.
Tested-by: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Gregory Herrero <gregory.herrero@intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Enhance the phy documentation by adding 2 new optional bindings :
- the vbus gpio, which detects usb insertion
- the vbus regulator, which provides current drawn from the usb cable
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Felipe Balbi <balbi@ti.com>
at91sam9rl SoC has an erratum forcing us to toggle the BIAS on USB
suspend/resume events.
This specific handling is only activated when CONFIG_ARCH_AT91SAM9RL is
set and this option is only set when building a non-DT kernel, which is
problematic since non-DT support for at91sam9rl SoC has been removed.
Rework the toggle_bias implementation to attach it to the "at91sam9rl-udc"
compatible string.
Add new compatible strings to avoid executing at91sam9rl erratum handling
on other SoCs.
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Since bd27fa44e1 ("usb: phy: generic: Don't use regulator framework for
RESET line") we no longer model the reset line as a regulator supply, so
adapt the documentation accordingly.
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This driver provides UIO access to memory of a peripheral connected
to the Freescale enhanced local bus controller (eLBC) interface
using the general purpose chip-select mode (GPCM).
Signed-off-by: John Ogness <john.ogness@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Exynos SoC's DT files are using Chipid device nodes, but it's binding
information is missing. This patch adds exynos-chipid binding information.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
we should not be mixing address spaces in the reg property like this driver
currently does. This patch updates the driver, dt docs and also the existing
dt nodes to pass the sysconfig offset in the syscon dt property.
This patch breaks DT compatibility! But this platform is considered WIP,
and is only used by a few developers who are upstreaming support for it.
This change has been done as a single atomic commit to ensure it is
bisectable.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
update the miphy365 phy driver to access sysconfig register offsets via
syscfg dt property.
This is because the reg property should not be mixing address spaces
like it does currently for miphy365. This change then also aligns us
to how other platforms such as keystone and bcm7445 pass there syscon
offsets via DT.
This patch breaks DT compatibility, but this platform is considered WIP,
and is only used by a few developers who are upstreaming support for it.
This change has been done as a single atomic commit to ensure it is
bisectable.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
update the phy driver to not use the reg property to access the sysconfig
register offsets.
This is because other phy's (miphy28, miphy365) have a combination of
memory mapped registers and sysconfig control regs, and we shouldn't
be mixing address spaces in the reg property. In addition we would
ideally like the sysconfig offsets to be passed via DT in a uniform way.
This new method will also allow us to support devices which have sysconfig
registers in different banks more easily and it is also analagous to how
keystone and bcm7745 platforms pass there syscon offsets in DT.
This breaks DT compatibility, but this platform is considered WIP, and
is only used by a few developers who are upstreaming support for it.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add documentation for the devicetree binding for the Zynq pincontroller.
Changes since v1:
- fix typo
- add USB related documentation
- remove 'pinctrl-' prefix for pinctrl sub-nodes
- update documentation to enforce strict separation of pinmux
and pinconf nodes
- update example accordingly
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
MARCO will not be supported any more. it has been replaced by CSR
atlas7.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
After the Nomadik pin controller was force migrated to generic pin
control bindings, some leftovers in the documentation need to be
cleaned up. The code and device trees are already migrated.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
UBI needs to know the physical erase block size, even on read-only
devices, since it defines the on-device layout. Use a device-tree
provided value to support previously written UBI on read-only NOR.
UBI also needs a non-zero writebufsize, so we set it to one.
Note: This was implemented because hardware write-protected CFI
NOR cannot be probed for the physical erase block size.
Signed-off-by: Joe Schultz <jschultz@xes-inc.ccom>
Signed-off-by: Aaron Sierra <asierra@xes-inc.ccom>
[Brian: removed unneeded #ifdef, note 'optional' erase-size property]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
"fsl,imx6sx-qspi" is also a valid compatible string, so add an entry for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Use "cnxt" since it once was the stock ticker of Conexant.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
MARCO will not be supported any more and the project was dropped.
it has been replaced by CSR atlas7.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add device-tree bindings for EHCI so we can use "needs-reset-on-resume"
property to force EHCI reset after resume if necessary. This is necessary
on platforms like rk3288 that need a reset after resume to detect if a
device has been disconnected during suspend time.
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Reviewed-by: Julius Werner <jwerner@google.com>
Reviewed-by: Doug Anderson <dianders@google.com>
Reviewed-by: Tomasz Figa <tfiga@google.com>
Reviewed-by: Pawel Osciak <posciak@google.com>
Reviewed-by: Sonny Rao <sonnyrao@google.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Tested-by: Doug Anderson <dianders@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Contrary to what was originally thought, the Armada 375 and Armada 38x
MBus windows hardware block is *not* compatible with the Armada 370,
due to a difference in how window 13 is handled. It was rather
compatible with the Armada XP MBus hardware block.
However, the DTs for Armada 375 and Armada 38x encode the following
compatible string for MBus:
compatible = "marvell,armada375-mbus", "marvell,armada370-mbus", "simple-bus";
compatible = "marvell,armada380-mbus", "marvell,armada370-mbus", "simple-bus";
So, by extending the mvebu-mbus DT binding to also cover the
marvell,armada375-mbus and marvell,armada380-mbus compatible strings,
we can define a new behavior for those SoCs without changing the DT.
Therefore, this commit adds those two new compatible strings to the DT
binding documentation of mvebu-mbus. Note that it re-uses two existing
duplicated lines for the armada370-mbus and armadaxp-mbus compatible
strings.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
