We get a harmless warning if the ARM_SCPI_POWER_DOMAIN driver is enabled
without CONFIG_OF during compile testing:
warning: (ARM_SCPI_POWER_DOMAIN) selects PM_GENERIC_DOMAINS_OF which has unmet direct dependencies (PM_GENERIC_DOMAINS && OF)
There is no need to select PM_GENERIC_DOMAINS_OF if OF is set, so we can
replace the 'select' with a dependency.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 8bec4337ad ("firmware: scpi: add device power domain support using genpd")
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
booting.
This driver has been unusable with multiarch because of the hardware
timer access. With the recent PWM changes, we can finally fix the
driver for multiarch and device tree support. And naturally there
is no rush for these for the -rc cycle, these can wait for the
merge window.
The PWM changes have been acked by Thierry. For the media changes
I did not get an ack from Mauro but he was Cc'd in the discussion
and these changes do not conflict with other media changes.
After this series we can drop the remaining omap3 legacy booting
board files finally.
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Merge tag 'omap-for-v4.8/ir-rx51-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Merge "omap ir-rx51 driver fixes for multiarch for v4.8 merge window"
from Tony Lindgren:
Fix a long time regression for ir-rx51 driver for n900 device tree
booting.
This driver has been unusable with multiarch because of the hardware
timer access. With the recent PWM changes, we can finally fix the
driver for multiarch and device tree support. And naturally there
is no rush for these for the -rc cycle, these can wait for the
merge window.
The PWM changes have been acked by Thierry. For the media changes
I did not get an ack from Mauro but he was Cc'd in the discussion
and these changes do not conflict with other media changes.
After this series we can drop the remaining omap3 legacy booting
board files finally.
* tag 'omap-for-v4.8/ir-rx51-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ir-rx51: use hrtimer instead of dmtimer
ir-rx51: add DT support to driver
ir-rx51: use PWM framework instead of OMAP dmtimer
pwm: omap-dmtimer: Allow for setting dmtimer clock source
ir-rx51: Fix build after multiarch changes broke it
- change request API to be more explicit about the difference between
exclusive and shared resets (the former guarantee the reset line is
asserted immediately when reset_control_assert is called, the latter
are refcounted and do not guarantee this).
- add Hisilicon hi6220 media subsystem reset controller support
- add TI SYSCON based reset controller support
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Merge tag 'reset-for-4.8-3' of git://git.pengutronix.de/git/pza/linux into next/drivers
Merge "Reset controller changes for v4.8, part 3" from Philipp Zabel:
- change request API to be more explicit about the difference between
exclusive and shared resets (the former guarantee the reset line is
asserted immediately when reset_control_assert is called, the latter
are refcounted and do not guarantee this).
- add Hisilicon hi6220 media subsystem reset controller support
- add TI SYSCON based reset controller support
* tag 'reset-for-4.8-3' of git://git.pengutronix.de/git/pza/linux:
reset: add TI SYSCON based reset driver
Documentation: dt: reset: Add TI syscon reset binding
reset: hisilicon: Add hi6220 media subsystem reset support
reset: hisilicon: Change to syscon register access
arm64: dts: hi6220: Add media subsystem reset dts
reset: hisilicon: Add media reset controller binding
reset: TRIVIAL: Add line break at same place for similar APIs
reset: Supply *_shared variant calls when using *_optional APIs
reset: Supply *_shared variant calls when using of_* API
reset: Ensure drivers are explicit when requesting reset lines
reset: Reorder inline reset_control_get*() wrappers
Contains fixes and cleanups to the PMC driver, as well as some fixes for
the generic PM domain support and some prep work to support PCIe on 64-
bit ARM.
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Merge tag 'tegra-for-4.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
soc/tegra: Changes for v4.8-rc1
Contains fixes and cleanups to the PMC driver, as well as some fixes for
the generic PM domain support and some prep work to support PCIe on 64-
bit ARM.
* tag 'tegra-for-4.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: Stub out PCIe IRQ workaround on 64-bit ARM
soc/tegra: pmc: Enable XUSB partitions on boot
soc/tegra: pmc: Initialise power partitions early
soc/tegra: pmc: Add specific error messages
soc/tegra: pmc: Use whitespace more consistently
soc/tegra: pmc: Don't probe PMC if early initialisation fails
soc/tegra: pmc: Add missing of_node_put()
soc/tegra: pmc: Ensure mutex is always initialised
soc/tegra: pmc: Don't populate SoC data until register space is mapped
soc/tegra: pmc: Fix early initialisation of PMC
soc/tegra: pmc: Ensure powergate is available when powering on
soc/tegra: pmc: Initialise resets associated with a power partition
soc/tegra: pmc: Use register definitions instead of magic values
Signed-off-by: Olof Johansson <olof@lixom.net>
Adds support for the Tegra ACONNECT bus that's used to access the APE
(audio processing engine) on Tegra X1.
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Merge tag 'tegra-for-4.8-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
bus: NVIDIA Tegra ACONNECT support
Adds support for the Tegra ACONNECT bus that's used to access the APE
(audio processing engine) on Tegra X1.
* tag 'tegra-for-4.8-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
bus: Add support for Tegra ACONNECT
dt-bindings: bus: Add documentation for Tegra210 ACONNECT
Signed-off-by: Olof Johansson <olof@lixom.net>
* Prepare for handling SYSC interrupt configuration purely
from DT in the rcar-sysc driver for new SoCs, while preserving
backward compatibility with old DTBs for R-Car H1, H2, and M2-W
* Add R8A7792 support
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Merge tag 'renesas-rcar-sysc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.8
* Prepare for handling SYSC interrupt configuration purely
from DT in the rcar-sysc driver for new SoCs, while preserving
backward compatibility with old DTBs for R-Car H1, H2, and M2-W
* Add R8A7792 support
* tag 'renesas-rcar-sysc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper
soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver
soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains
soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init()
soc: renesas: rcar-sysc: add R8A7792 support
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes the compatibility string to match with the smallest
supported chip (EP7209). Since the DT-support for this CPU is not yet
announced, this change is safe.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Rework of SCM driver
* Add file patterns for Qualcomm Maintainers entry
* Add worker for wcnss_ctrl signaling
* Fixes for smp2p
* Update smem_state properties to match documentation
* Add SCM Peripheral Authentication service
* Expose SCM PAS command 10 as a reset controller
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Merge tag 'qcom-drivers-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Qualcomm ARM Based Driver Updates for v4.8
* Rework of SCM driver
* Add file patterns for Qualcomm Maintainers entry
* Add worker for wcnss_ctrl signaling
* Fixes for smp2p
* Update smem_state properties to match documentation
* Add SCM Peripheral Authentication service
* Expose SCM PAS command 10 as a reset controller
* tag 'qcom-drivers-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
firmware: qcom: scm: Expose PAS command 10 as reset-controller
firmware: qcom: scm: Peripheral Authentication Service
soc: qcom: Update properties for smem state referencing
soc: qcom: smp2p: Drop io-accessors
soc: qcom: smp2p: Correct addressing of outgoing value
soc: qcom: wcnss_ctrl: Make wcnss_ctrl parent the other components
firmware: qcom: scm: Add support for ARM64 SoCs
firmware: qcom: scm: Convert to streaming DMA APIS
firmware: qcom: scm: Generalize shared error map
firmware: qcom: scm: Use atomic SCM for cold boot
firmware: qcom: scm: Convert SCM to platform driver
MAINTAINERS: Add file patterns for qcom device tree bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
* Make GPMC driver non modular as it is going to
be built-in only till arch/arm/mach-omap2 users
are removed.
* Fix build if CONFIG_OF is not defined.
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Merge tag 'gpmc-omap-for-v4.8' of https://github.com/rogerq/linux into next/drivers
OMAP-GPMC: driver updates for v4.8
* Make GPMC driver non modular as it is going to
be built-in only till arch/arm/mach-omap2 users
are removed.
* Fix build if CONFIG_OF is not defined.
* tag 'gpmc-omap-for-v4.8' of https://github.com/rogerq/linux:
memory: omap-gpmc: Move gpio functions out of #ifdef CONFIG_OF
memory: omap-gpmc: make it explicitly non-modular
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Adds support for device power state management using generic power
domains and runtime PM
2. Other minor/miscellaneous fixes to the driver
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Merge tag 'scpi-updates-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers
SCPI updates and fixes for v4.8
1. Adds support for device power state management using generic power
domains and runtime PM
2. Other minor/miscellaneous fixes to the driver
* tag 'scpi-updates-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: scpi: add device power domain support using genpd
Documentation: add DT bindings for ARM SCPI power domains
firmware: arm_scpi: add support for device power state management
firmware: arm_scpi: make it depend on MAILBOX instead of ARM_MHU
firmware: arm_scpi: mark scpi_get_sensor_value as static
firmware: arm_scpi: remove dvfs_get packed structure
Signed-off-by: Olof Johansson <olof@lixom.net>
- Make memory drivers explicitly non-modular
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Merge tag 'at91-ab-4.8-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/drivers
Drivers for 4.8 #2:
- Make memory drivers explicitly non-modular
* tag 'at91-ab-4.8-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
memory: atmel-ebi: make it explicitly non-modular
memory: atmel-sdramc: make it explicitly non-modular
Signed-off-by: Olof Johansson <olof@lixom.net>
Add a bus driver for the Tegra ACONNECT which is used to interface to
various devices within the Audio Processing Engine (APE). The purpose
of the bus driver is to register child devices that are accessed via
the ACONNECT bus and through the device parent child relationship,
ensure that the appropriate power domain and clocks are enabled for
the ACONNECT when any of the child devices are active. Hence, the
ACONNECT driver simply enables runtime-pm for the ACONNECT device
so that when a child device is resumed, it will enable the power-domain
and clocks associated with the ACONNECT.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add binding documentation for the Tegra ACONNECT bus that is part of the
Audio Processing Engine (APE) on Tegra210. The ACONNECT bus is used to
access devices within the APE subsystem. The APE is located in a
separate power domain and so accesses made to the ACONNECT require the
power domain to be enabled as well as some platform specific clocks.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The PCIe host controller found on Tegra20 has a hardware bug that causes
PCIe interrupts to get lost when LP2 is enabled. Stub out the workaround
on 64-bit ARM because none of the more recent Tegra SoC generations seem
to have this bug anymore.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra XHCI driver does not currently manage the Tegra XUSB power
partitions and so it these partitions have not been enabled by the
bootloader then the system will crash when probing the XHCI device.
While proper support for managing the power partitions is being
developed to the XHCI driver for Tegra, for now power on all the XUSB
partitions for USB host and super-speed on boot if the XHCI driver is
enabled.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
If CONFIG_PM_GENERIC_DOMAINS is not enabled, then power partitions
associated with a device will not be enabled automatically by the PM
core when the device is in use. To avoid situations where a device in
a power partition is to be used but the partition is not enabled,
initialise the power partitions for Tegra early in the boot process and
if CONFIG_PM_GENERIC_DOMAINS is not enabled, then power on all
partitions defined in the device-tree blob.
Note that if CONFIG_PM_GENERIC_DOMAINS is not enabled, after the
partitions are turned on, the clocks and resets used as part of the
sequence for turning on the partition are released again as they are no
longer needed by the PMC driver. Another benefit of this is that this
avoids any issues of sharing resets between the PMC driver and other
device drivers that may wish to independently control a particular
reset.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
When initialising a powergate, only a single error message is shown if
the initialisation fails. Add more error messages to give specific
details of what failed if the initialisation failed and remove the
generic failure message.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Commit 0259f522e0 ('soc/tegra: pmc: Restore base address on probe
failure') fixes an issue where the PMC base address pointer is not
restored on probe failure. However, this fix creates another problem
where if early initialisation of the PMC driver fails and an initial
mapping for the PMC address space is not created, then when the PMC
device is probed, the PMC base address pointer will not be valid and
this will cause a crash when tegra_pmc_init() is called and attempts
to access a register.
Although the PMC address space is mapped a 2nd time during the probe
and so this could be fixed by populating the base address pointer
earlier during the probe, this adds more complexity to the code.
Moreover, the PMC probe also assumes the the soc data pointer is also
initialised when the device is probed and if not will also lead to a
crash when calling tegra_pmc_init_tsense_reset(). Given that if the
early initialisation does fail then something bad has happen, it seems
acceptable to allow the PMC device probe to fail as well. Therefore, if
the PMC base address pointer or soc data pointer are not valid when
probing the PMC device, WARN and return an error.
Fixes: 0259f522e0 ('soc/tegra: pmc: Restore base address on probe failure')
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add missing of_node_put() in PMC early initialisation function to avoid
leaking the device nodes.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: squash in a couple more of_node_put() calls]
Signed-off-by: Thierry Reding <treding@nvidia.com>
The mutex used by the PMC driver may not be initialised if early
initialisation of the driver fails. If this does happen, then it could
be possible for callers of the public PMC functions to still attempt to
acquire the mutex. Fix this by initialising the mutex as soon as
possible to ensure it will always be initialised.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The public functions exported by the PMC driver use the presence of the
SoC data pointer to determine if the PMC device is configured and the
registers can be accessed. However, the SoC data is populated before the
PMC register space is mapped and this opens a window where the SoC data
pointer is valid but the register space has not yet been mapped which
could lead to a crash. Furthermore, if the mapping of the PMC register
space fails, then the SoC data pointer is not cleared and so would
expose a larger window where a crash could occur.
Fix this by initialising the SoC data pointer after the PMC register
space has been mapped.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
During early initialisation, the available power partitions for a given
device is configured as well as the polarity of the PMC interrupt. Both
of which should only be configured if there is a valid device node for
the PMC device. This is because the soc data used for configuring the
power partitions is only available if a device node for the PMC is found
and the code to configure the interrupt polarity uses the device node
pointer directly.
Some early device-tree images may not have this device node and so fix
this by ensuring the device node pointer is valid when configuring these
items.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The function tegra_power_sequence_power_up() is a public function used
to power on a partition. When this function is called, we do not check
to see if the partition being powered up is valid/available. Fix this
by checking to see that the partition is valid/available.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
When registering the Tegra power partitions with the generic PM domain
framework, the current state of the each partition is checked and used
as the default state for the partition. However, the state of each reset
associated with the partition is not initialised and so it is possible
that the state of the resets are not in the expected state. For example,
if a partition is on, then the resets should be de-asserted and if the
partition is off, the resets should be asserted.
There have been cases where the bootloader has powered on a partition
and only de-asserted some of the resets to some of the devices in the
partition. This can cause accesses to these devices to hang the system
when the kernel boots and attempts to probe these devices.
Ideally, the driver for the device should ensure the reset has been
de-asserted when probing, but the resets cannot be shared between the
PMC driver (that needs to de-assert/assert the reset when turning the
partition on or off) and another driver because we cannot ensure the
reset is in the correct state.
To ensure the resets are in the correct state, when using the generic
PM domain framework, put each reset associated with the partition in
the correct state (based upon the partition's current state) when
obtaining the resets for a partition.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop dmtimer usage for pulse timer in favor of hrtimer. That allows
removing PWM dmitimer platform data usage.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the upcoming removal of legacy boot, lets add support to one of the
last N900 drivers remaining without it. As the driver still uses omap
dmtimer, add auxdata as well.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Convert driver to use PWM framework instead of calling dmtimer functions
directly for PWM timer. Remove paragraph about writing to the Free Software
Foundation's mailing address while at it.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP GP timers can have different input clocks that allow different PWM
frequencies. However, there is no other way of setting the clock source but
through clocks or clock-names properties of the timer itself. This limits
PWM functionality to only the frequencies allowed by the particular clock
source. Allowing setting the clock source by PWM rather than by timer
allows different PWMs to have different ranges by not hard-wiring the clock
source to the timer.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The ir-rx51 driver for n900 has been disabled since the multiarch
changes as plat include directory no longer is SoC specific.
Let's fix it with minimal changes to pass the dmtimer calls in
pdata. Then the following changes can be done while things can
be tested to be working for each change:
1. Change the non-pwm dmtimer to use just hrtimer if possible
2. Change the pwm dmtimer to use Linux PWM API with the new
drivers/pwm/pwm-omap-dmtimer.c and remove the direct calls
to dmtimer functions
3. Parse configuration from device tree and drop the pdata
Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: linux-media@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Add a reset-controller driver for performing reset management of
various devices present on the SoC, with the reset registers shared
between devices in a common register memory space. This driver uses
the syscon/regmap frameworks to actually implement the various reset
functionalities needed by the reset consumer devices.
Signed-off-by: Andrew F. Davis <afd@ti.com>
[s-anna@ti.com: add documentation, syscon name change]
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Add TI syscon reset controller binding. This will hook to the reset
framework and use syscon/regmap to set reset bits. This allows reset
control of individual SoC subsytems and devices with memory-mapped
reset registers in a common register memory space.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
There are two reset controllers in hi6220 SoC:
The peripheral reset controller bits are part of sysctrl registers.
The media reset controller bits are part of mediactrl registers.
So change register access to syscon way.
And rename current reset controller to peripheral one.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Xia Qing <saberlily.xia@hisilicon.com>
Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Add compatible for media reset controller.
Actually, there are two reset controllers in hi6220 SoC:
The peripheral reset controller bits are part of sysctrl registers.
The media reset controller bits are part of mediactrl registers.
So for the compatible part, it should contain "syscon" for both peripheral
and media reset controller.
Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Standardise the way inline functions:
devm_reset_control_get_shared_by_index
devm_reset_control_get_exclusive_by_index
... are formatted.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Consumers need to be able to specify whether they are requesting an
'exclusive' or 'shared' reset line no matter which API (of_*, devm_*,
etc) they are using. This change allows users of the optional_* API
in particular to specify that their request is for a 'shared' line.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Consumers need to be able to specify whether they are requesting an
'exclusive' or 'shared' reset line no matter which API (of_*, devm_*,
etc) they are using. This change allows users of the of_* API in
particular to specify that their request is for a 'shared' line.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Phasing out generic reset line requests enables us to make some better
decisions on when and how to (de)assert said lines. If an 'exclusive'
line is requested, we know a device *requires* a reset and that it's
preferable to act upon a request right away. However, if a 'shared'
reset line is requested, we can reasonably assume sure that placing a
device into reset isn't a hard requirement, but probably a measure to
save power and is thus able to cope with not being asserted if another
device is still in use.
In order allow gentle adoption and not to forcing all consumers to
move to the API immediately, causing administration headache between
subsystems, this patch adds some temporary stand-in shim-calls. This
will ease the burden at merge time and allow subsystems to migrate over
to the new API in a more realistic time-frame.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
We're about to split the current API into two, where consumers will
be forced to be explicit when requesting reset lines. The choice
will be to either the call the *_exclusive or *_shared variant
depending on whether they can actually tolorate not being asserted
when that request is made.
The new API will look like this once reorded and complete:
reset_control_get_exclusive()
reset_control_get_shared()
reset_control_get_optional_exclusive()
reset_control_get_optional_shared()
of_reset_control_get_exclusive()
of_reset_control_get_shared()
of_reset_control_get_exclusive_by_index()
of_reset_control_get_shared_by_index()
devm_reset_control_get_exclusive()
devm_reset_control_get_shared()
devm_reset_control_get_optional_exclusive()
devm_reset_control_get_optional_shared()
devm_reset_control_get_exclusive_by_index()
devm_reset_control_get_shared_by_index()
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
