Commit Graph

1043499 Commits

Author SHA1 Message Date
Arnd Bergmann
e2a3495bf9 Merge tag 'qcom-drivers-for-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
More Qualcomm driver updates for v5.16

This introduces the Qualcomm "sleep stats" driver, which aids the
efforts of bringing various Qualcomm platforms into low power mode.

The SMP2P driver gains support for negotiating the "SSR" feature, which
is used to better synchronize some corner cases that might appear as the
remoteproc is recovering from a crash.

The socinfo driver learns about a few new PMICs.

SMEM is updated so that it's possible to put the compatible property
directly in the reserved-memory node, to avoid having to have a separate
node just pointing to the memory-region.

Lastly it fixes some bugs in smp2p, apr, rpmhpd drivers, notably
avoiding the issue where powering on a power-domain using rpmhpd while
keeping the performance_state at 0 is a nop

* tag 'qcom-drivers-for-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  firmware: qcom: scm: Don't break compile test on non-ARM platforms
  soc: qcom: smp2p: Add of_node_put() before goto
  soc: qcom: apr: Add of_node_put() before return
  soc: qcom: qcom_stats: Fix client votes offset
  soc: qcom: rpmhpd: fix sm8350_mxc's peer domain
  dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method
  ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226
  firmware: qcom: scm: Add support for MC boot address API
  soc: qcom: spm: Add 8916 SPM register data
  dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu
  soc: qcom: socinfo: Add PM8150C and SMB2351 models
  firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available()
  soc: qcom: smp2p: add feature negotiation and ssr ack feature support
  soc: qcom: Add Sleep stats driver
  dt-bindings: Introduce QCOM Sleep stats bindings
  soc: qcom: socinfo: add two missing PMIC IDs
  soc: qcom: rpmhpd: Make power_on actually enable the domain
  soc: qcom: smem: Support reserved-memory description
  dt-bindings: soc: smem: Make indirection optional
  dt-bindings: sram: Document qcom,rpm-msg-ram

Link: https://lore.kernel.org/r/20211026140706.1205989-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-26 17:17:57 +02:00
Arnd Bergmann
64954d19e0 Merge tag 'samsung-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers
Samsung SoC drivers changes for v5.16

1. Convert Exynos ChipID and ASV driver to a module and make it a
   default, instead of selected. The driver is not essential, so it
   could be disabled, if needed.
2. Add support for Exynos850 and Exynos Auto v9 to Exynos ChipID and ASV
   driver.
3. Get rid of HAVE_S3C_RTC because it was adding just another layer
   instead of direct dependencies.
4. Minor cleanups.

* tag 'samsung-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: exynos-chipid: add exynosautov9 SoC support
  rtc: s3c: remove HAVE_S3C_RTC in favor of direct dependencies
  soc: samsung: exynos-chipid: Add Exynos850 support
  dt-bindings: samsung: exynos-chipid: Document Exynos850 compatible
  soc: samsung: exynos-chipid: Pass revision reg offsets
  soc: samsung: pm_domains: drop unused is_off field
  arm64: exynos: don't have ARCH_EXYNOS select EXYNOS_CHIPID
  soc: samsung: exynos-chipid: do not enforce built-in
  soc: samsung: exynos-chipid: convert to a module
  soc: samsung: exynos-chipid: avoid soc_device_to_device()
  soc: samsung: exynos-pmu: Fix compilation when nothing selects CONFIG_MFD_CORE

Link: https://lore.kernel.org/r/20211026094709.75692-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-26 17:16:03 +02:00
Chanho Park
b417d1e88f soc: samsung: exynos-chipid: add exynosautov9 SoC support
The product id of Exynos Auto v9 is "0xAAA8_0000". Add this id and its
name.

Cc: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20211021012017.158919-2-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-26 09:16:53 +02:00
Bjorn Andersson
c50031f03d firmware: qcom: scm: Don't break compile test on non-ARM platforms
The introduction of __qcom_scm_set_boot_addr_mc() relies on
cpu_logical_map() and MPIDR_AFFINITY_LEVEL() from smp_plat.h, but only
ARM and ARM64 has this include file, so the introduction of this
dependency broke compile testing on e.g. x86_64.

Make the inclusion of smp_plat.h and the affected function depend on
ARM || ARM64 to allow the code to still be compiled.

Fixes: 55845f46df ("firmware: qcom: scm: Add support for MC boot address API")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211025025816.2937465-1-bjorn.andersson@linaro.org
2021-10-25 14:21:34 -05:00
Wan Jiabing
e1b391e971 soc: qcom: smp2p: Add of_node_put() before goto
Fix following coccicheck warning:
./drivers/soc/qcom/smp2p.c:501:1-33: WARNING: Function
for_each_available_child_of_node should have of_node_put() before goto

Early exits from for_each_available_child_of_node should decrement the
node reference counter.

Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211014062350.8942-1-wanjiabing@vivo.com
2021-10-24 12:14:52 -05:00
Wan Jiabing
72f1aa6205 soc: qcom: apr: Add of_node_put() before return
Fix following coccicheck warning:

./drivers/soc/qcom/apr.c:485:1-23: WARNING: Function
for_each_child_of_node should have of_node_put() before return

Early exits from for_each_child_of_node should decrement the
node reference counter.

Fixes: 8347356626 ("soc: qcom: apr: Add avs/audio tracking functionality")
Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211014083017.19714-1-wanjiabing@vivo.com
2021-10-24 12:12:57 -05:00
Maulik Shah
62563bd99c soc: qcom: qcom_stats: Fix client votes offset
Client votes starts at 0x20 offset. Correct the offset.

Reported-and-suggested-by: Shawn Guo <shawn.guo@linaro.org>
Fixes: 1d77246903 ("soc: qcom: Add Sleep stats driver")
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1634719753-26064-1-git-send-email-mkshah@codeaurora.org
2021-10-23 23:35:42 -05:00
Dmitry Baryshkov
086f52fdc8 soc: qcom: rpmhpd: fix sm8350_mxc's peer domain
The sm8350_mxc's domain description incorrectly references
sm8150_mmcx_ao as a peer instead of sm8350_mxc_ao. Correct this typo.

Fixes: 639c856287 ("soc: qcom: rpmhpd: Add SM8350 power domains")
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211020012639.1183806-1-dmitry.baryshkov@linaro.org
2021-10-23 23:34:26 -05:00
Stephan Gerhold
8e24a29620 dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method
Since MSM8916 is an ARM v8 64-bit SoC the CPU cores are normally booted
using "psci" or "spin-table". Unfortunately, some devices come with signed
32-bit-only firmware without ARM64 and PSCI support. This setup is easy to
support since it's very similar to older 32-bit only Qualcomm SoCs
(e.g. MSM8226) and only requires adding a few new definitions to already
existing drivers.

Document the qcom,msm8916-smp enable-method. It is actually just an alias
of qcom,msm8226-smp since it should be implemented identically.
The enable-method is only valid on ARM32 and must not be used on ARM64.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-8-stephan@gerhold.net
2021-10-23 22:35:19 -05:00
Stephan Gerhold
87922aec8a ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226
Unfortunately, some MSM8916 devices have signed firmware without
ARM64 and PSCI support and can therefore only boot ARM32 Linux.
The ARM Cortex-A53 cores should be actually booted exactly like
the Cortex-A7 cores on MSM8226, so just add an alias for the
existing code.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-9-stephan@gerhold.net
2021-10-23 22:18:01 -05:00
Stephan Gerhold
55845f46df firmware: qcom: scm: Add support for MC boot address API
It looks like the old QCOM_SCM_BOOT_SET_ADDR API is broken on some
MSM8916 firmware versions that implement the newer SMC32 calling
convention. It just returns -EINVAL no matter which arguments are
being passed.

This does not cause any problems downstream because it first tries
to use the new multi-cluster API replacement which is working fine.

Implement support for the multi-cluster variant of the SCM call
by attempting it first but still fallback to the old call in case
of an error. Also, to be absolutely sure only use the multi-cluster
variant with the SMC calling convention since older platforms should
not need this.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-12-stephan@gerhold.net
2021-10-23 22:15:47 -05:00
Lina Iyer
7f8adb19e9 soc: qcom: spm: Add 8916 SPM register data
Add SPM register information and initialization values for QCOM 8916
SoC.

Link: https://lore.kernel.org/linux-arm-msm/1429314549-6730-5-git-send-email-lina.iyer@linaro.org/
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
[stephan: rebase patch and fix conflicts]
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-11-stephan@gerhold.net
2021-10-23 22:15:46 -05:00
Stephan Gerhold
93fcf45b16 dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu
Document the qcom,msm8916-saw2-v3.0-cpu compatible that is needed
for cpuidle for MSM8916 on some devices with signed firmware which
is only capable of booting ARM32 kernels without PSCI.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-10-stephan@gerhold.net
2021-10-23 22:15:46 -05:00
Bjorn Andersson
87fd343c6e soc: qcom: socinfo: Add PM8150C and SMB2351 models
Add PM8150C and SMB2351 to the list of known PMIC models.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20211005024025.2037810-1-bjorn.andersson@linaro.org
2021-10-23 22:13:23 -05:00
Guru Das Srinagesh
38212b2a8a firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available()
Since __qcom_scm_is_call_available() returns bool, have it return false
instead of -EINVAL if an invalid SMC convention is detected.

This fixes the Smatch static checker warning:

	drivers/firmware/qcom_scm.c:255 __qcom_scm_is_call_available()
	warn: signedness bug returning '(-22)'

Fixes: 9d11af8b06 ("firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Guru Das Srinagesh <quic_gurus@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1633982414-28347-1-git-send-email-quic_gurus@quicinc.com
2021-10-23 22:12:18 -05:00
Chia-Wei Wang
c6807970c3 soc: aspeed: Add UART routing support
Add driver support for the UART routing control. Users can perform
runtime configuration of the RX muxes among the UART controllers and
the UART IO pins.

The sysfs interface is also exported for the convenience of routing paths
check and update.

Signed-off-by: Oskar Senft <osk@google.com>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tested-by: Lei YU <yulei.sh@bytedance.com>
Link: https://lore.kernel.org/r/20210927023053.6728-5-chiawei_wang@aspeedtech.com
Link: https://lore.kernel.org/r/20211022000616.481772-1-joel@jms.id.au'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-22 17:32:09 +02:00
Arnd Bergmann
ac2561f921 Merge tag 'soc-fsl-next-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers
NXP/FSL SoC driver updates for v5.16

DPIO Driver
- Code cleanup and fix compile warning

RCMP and Guts Driver
- Make use of the helper function devm_platform_ioremap_resource()

* tag 'soc-fsl-next-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: dpio: rename the enqueue descriptor variable
  soc: fsl: dpio: use an explicit NULL instead of 0
  soc: fsl: rcpm: Make use of the helper function devm_platform_ioremap_resource()
  soc: fsl: guts: Make use of the helper function devm_platform_ioremap_resource()

Link: https://lore.kernel.org/r/20211022010027.11866-2-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-22 17:31:40 +02:00
Youri Querry
54c8b5b6f8 soc: fsl: dpio: rename the enqueue descriptor variable
The struct qbman_eq_desc 'd' variable declaration is covering one of the
function parameters. This has no functional impact since this function
parameter was not used after the new declaration.
Even so, rename the variable so that we make the code more readable.

Fixes: 3b2abda7d2 ("soc: fsl: dpio: Replace QMAN array mode with ring mode enqueue")
Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21 19:38:56 -05:00
Ioana Ciornei
a7ff7dcaf4 soc: fsl: dpio: use an explicit NULL instead of 0
Use an explicit NULL pointer when calling qbman_swp_enqueue_multiple()
instead of a plain integer. Without this fix, we get the following
compile time error.

drivers/soc/fsl/dpio/dpio-service.c:466:60: warning: Using plain integer as NULL pointer

Fixes: 9d98809711 ("soc: fsl: dpio: Adding QMAN multiple enqueue interface")
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21 19:38:49 -05:00
Cai Huoqing
ea41191165 soc: fsl: rcpm: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21 19:37:32 -05:00
Cai Huoqing
e0162129c6 soc: fsl: guts: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21 19:34:47 -05:00
Jens Wiklander
34f3c67b81 optee: smc_abi.c: add missing #include <linux/mm.h>
Adds missing #include <linux/mm.h> drivers/tee/optee/smc_abi.c to fix
compile errors like:
drivers/tee/optee/smc_abi.c:405:15: error: implicit
declaration of function 'page_to_section'
[-Werror,-Wimplicit-function-declaration]
        optee_page = page_to_phys(*pages) +
                     ^
arch/arm/include/asm/memory.h:148:43: note: expanded from
macro 'page_to_phys'
                                               ^
include/asm-generic/memory_model.h:52:21: note: expanded
from macro 'page_to_pfn'
                    ^
include/asm-generic/memory_model.h:35:14: note: expanded
from macro '__page_to_pfn'
        int __sec = page_to_section(__pg);                      \
                    ^
drivers/tee/optee/smc_abi.c:405:15: note: did you mean
'__nr_to_section'?
arch/arm/include/asm/memory.h:148:43: note: expanded from
macro 'page_to_phys'
                                               ^
include/asm-generic/memory_model.h:52:21: note: expanded
from macro 'page_to_pfn'
                    ^
include/asm-generic/memory_model.h:35:14: note: expanded
from macro '__page_to_pfn'
        int __sec = page_to_section(__pg);                      \
                    ^
include/linux/mmzone.h:1365:35: note: '__nr_to_section'
declared here
static inline struct mem_section *__nr_to_section(unsigned long nr)

Fixes: c51a564a5b ("optee: isolate smc abi")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Link: https://lore.kernel.org/r/20211021125539.3858495-1-jens.wiklander@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-21 21:35:49 +02:00
Arnd Bergmann
bccb5d53e2 Merge tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.16, part two

1. Convert LPDDR2 bindings to dtschema and extend them with new
   properties.
2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from
   devicetree.

* tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: tegra20-emc: Add runtime dependency on devfreq governor module
  memory: tegra20-emc: Support matching timings by LPDDR2 configuration
  memory: Add LPDDR2-info helpers
  dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
  dt-bindings: Add vendor prefix for Elpida Memory
  dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F
  dt-bindings: memory: lpddr2: Add revision-id properties
  dt-bindings: memory: lpddr2: Convert to schema
  dt-bindings: Relocate DDR bindings

Link: https://lore.kernel.org/r/20211021093002.118192-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-21 21:34:21 +02:00
Dmitry Osipenko
14b43c20c2 memory: tegra20-emc: Add runtime dependency on devfreq governor module
Tegra20 EMC driver uses simple devfreq governor. Add simple devfreq
governor to the list of the Tegra20 EMC driver module softdeps to allow
userspace initramfs tools like dracut to automatically pull the devfreq
module into ramfs image together with the EMC module.

Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Suggested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20211019231524.888-1-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-21 11:18:08 +02:00
Arnd Bergmann
c13d33985d Merge tag 'reset-for-v5.16' of git://git.pengutronix.de/pza/linux into arm/drivers
Reset controller updates for v5.16

Allow building the reset-brcmstb-rescal driver as module, add reset
lines for the Uniphier PXs3 audio and video input subsystems and
bindings for the Uniphier NX1 SoC, and add lan966x switch reset support
to the reset-microchip-sparx5 driver.

* tag 'reset-for-v5.16' of git://git.pengutronix.de/pza/linux:
  reset: mchp: sparx5: Extend support for lan966x
  dt-bindings: reset: Add lan966x support
  reset: uniphier: Add NX1 reset support
  dt-bindings: reset: uniphier: Add NX1 reset control binding
  reset: uniphier: Add audio system and video input reset control for PXs3
  reset: Allow building Broadcom STB RESCAL as module

Link: https://lore.kernel.org/r/96e686f78f0e42bad666df5ec0cbcb2dcdc270a3.camel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20 23:26:53 +02:00
Arnd Bergmann
20f6d9586e Merge tag 'optee-ffa-for-v5.16' of git://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers
Add FF-A support in OP-TEE driver

Adds supports for the OP-TEE driver to communicate with secure world
using FF-A [1] as transport.

[1] https://developer.arm.com/documentation/den0077/latest

* tag 'optee-ffa-for-v5.16' of git://git.linaro.org/people/jens.wiklander/linux-tee:
  optee: add FF-A support
  optee: isolate smc abi
  optee: refactor driver with internal callbacks
  optee: simplify optee_release()
  tee: add sec_world_id to struct tee_shm
  tee: optee: Fix missing devices unregister during optee_remove
  tee/optee/shm_pool: fix application of sizeof to pointer

Link: https://lore.kernel.org/r/20211018121324.GA2943530@jade
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20 17:47:04 +02:00
Nikita Shubin
9645ccc7bd ep93xx: clock: convert in-place to COMMON_CLK
Converted in-place without moving file to drivers/clk.

tested on ts7250 (EP9302).

Only setting rate and change parent tested for, as they
are missing on ts7250:
- video
- I2S
- ADC/KEYPAD
- PWM

Only video and I2S clock are interesting, as they are
GATE + double DIV + MUX, all other are pretty much
common but require ep93xx_syscon_swlocked_write to set
registers.

Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20211018103105.146380-3-alexander.sverdlin@gmail.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20 17:46:36 +02:00
Alexander Sverdlin
f4ff6b56bc ASoC: cirrus: i2s: Prepare clock before using it
Use clk_prepare_enable()/clk_disable_unprepare() in preparation for switch
to Common Clock Framework, otherwise the following is visible:

WARNING: CPU: 0 PID: 97 at drivers/clk/clk.c:1011 clk_core_enable+0x9c/0xbc
Enabling unprepared mclk
...
Hardware name: Cirrus Logic EDB9302 Evaluation Board
...
clk_core_enable
clk_core_enable_lock
ep93xx_i2s_hw_params
snd_soc_dai_hw_params
soc_pcm_hw_params
snd_pcm_hw_params
snd_pcm_ioctl
...

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Acked-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20211018103105.146380-2-alexander.sverdlin@gmail.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20 17:46:36 +02:00
Arnd Bergmann
409d8a9c1d Merge tag 'sunxi-drivers-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/drivers
Some new drivers changes for the Allwinner SoCs, converting to a helper
and improving logging.

* tag 'sunxi-drivers-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  bus: sun50i-de2: Adjust printing error message
  soc: sunxi_sram: Make use of the helper function devm_platform_ioremap_resource()

Link: https://lore.kernel.org/r/ad0aa469-9e1b-4bb6-a116-92648ed774fa.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20 17:45:34 +02:00
Arnd Bergmann
4a47ce1fab Merge tag 'imx-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.16:

- Select REGMAP_MMIO for i.MX GPCv2 driver to avoid build issue.
- A couple of i.MX GPCv2 driver changes from Marek Vasut to turn
  domain->pgc into bitfield for i.MX8MM GPU domain support.
- A series from Lucas Stach adding support of i.MX8MM nested power
  domains like VPUMIX and DISPMIX which contains the ADB and BLK_CTRL.
- An off-by-one fix on Lucas' i.MX8M blk-ctrl driver code.

* tag 'imx-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: imx8m-blk-ctrl: off by one in imx8m_blk_ctrl_xlate()
  soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl
  soc: imx: add i.MX8M blk-ctrl driver
  soc: imx: gpcv2: support system suspend/resume
  soc: imx: gpcv2: keep i.MX8M* bus clocks enabled
  soc: imx: gpcv2: add domain option to keep domain clocks enabled
  soc: imx: gpcv2: add lockdep annotation
  Revert "soc: imx: gpcv2: move reset assert after requesting domain power up"
  soc: imx: gpcv2: allow to disable individual power domains
  imx: soc: Select REGMAP_MMIO
  soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU domain
  soc: imx: gpcv2: Turn domain->pgc into bitfield

Link: https://lore.kernel.org/r/20211016140138.1603-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20 16:53:34 +02:00
Horatiu Vultur
8c81620ac1 reset: mchp: sparx5: Extend support for lan966x
This patch extends sparx5 driver to support also the lan966x. The
process to reset the switch is the same only it has different offsets.
Therefore make the driver more generic and add support for lan966x.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Steen Hegelund <steen.hegelund@microchip.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20211018091522.1113510-3-horatiu.vultur@microchip.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2021-10-18 14:09:57 +02:00
Horatiu Vultur
3ec1b819f1 dt-bindings: reset: Add lan966x support
This patch extends the existing file microchip,rst.yaml to support
also the lan966x. For this is added only a new compatible string.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Link: https://lore.kernel.org/r/20211018091522.1113510-2-horatiu.vultur@microchip.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2021-10-18 14:09:56 +02:00
Jens Wiklander
4615e5a34b optee: add FF-A support
Adds support for using FF-A [1] as transport to the OP-TEE driver.

Introduces struct optee_msg_param_fmem which carries all information
needed when OP-TEE is calling FFA_MEM_RETRIEVE_REQ to get the shared
memory reference mapped by the hypervisor in S-EL2. Register usage is
also updated to include the information needed.

The FF-A part of this driver is enabled if CONFIG_ARM_FFA_TRANSPORT is
enabled.

[1] https://developer.arm.com/documentation/den0077/latest
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-18 11:44:23 +02:00
Jens Wiklander
c51a564a5b optee: isolate smc abi
Isolate the ABI based on raw SMCs. Code specific to the raw SMC ABI is
moved into smc_abi.c. This makes room for other ABIs with a clear
separation.

The driver changes to use module_init()/module_exit() instead of
module_platform_driver(). The platform_driver_register() and
platform_driver_unregister() functions called directly to keep the same
behavior. This is needed because module_platform_driver() is based on
module_driver() which can only be used once in a module.

A function optee_rpc_cmd() is factored out from the function
handle_rpc_func_cmd() to handle the ABI independent part of RPC
processing.

This patch is not supposed to change the driver behavior, it's only a
matter of reorganizing the code.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-18 11:44:23 +02:00
Will McVicker
d96890fca9 rtc: s3c: remove HAVE_S3C_RTC in favor of direct dependencies
The config HAVE_S3C_RTC is not really needed since we can simply just
add the dependencies directly to RTC_DRV_S3C. Also, one less config to
keep track of!

Signed-off-by: Will McVicker <willmcvicker@google.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20211013212256.3425889-1-willmcvicker@google.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-17 19:15:12 +02:00
Chris Lew
85f755083b soc: qcom: smp2p: add feature negotiation and ssr ack feature support
This patch adds feature negotiation and ssr ack feature between
local host and remote processor. Local host can negotiate on common
features supported with remote processor.

When ssr ack feature bit is set, the remote processor will tell local
host when it is reinitialized. All clients registered for falling edge
interrupts will be notified when the smp2p entries are cleared for ssr.

Signed-off-by: Chris Lew <clew@codeaurora.org>
Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1633450403-21281-1-git-send-email-deesin@codeaurora.org
2021-10-17 11:43:31 -05:00
Mahesh Sivasubramanian
1d77246903 soc: qcom: Add Sleep stats driver
Let's add a driver to read the stats from remote processor and
export to debugfs.

The driver creates "qcom_sleep_stats" directory in debugfs and
adds files for various low power mode available. Below is sample
output with command

cat /sys/kernel/debug/qcom_sleep_stats/ddr
count = 0
Last Entered At = 0
Last Exited At = 0
Accumulated Duration = 0

Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
[mkshah: add subsystem sleep stats, create one file for each stat]
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1634107104-22197-3-git-send-email-mkshah@codeaurora.org
2021-10-16 18:23:30 -05:00
Mahesh Sivasubramanian
ac3f1ee77c dt-bindings: Introduce QCOM Sleep stats bindings
Add device binding documentation for Qualcomm Technologies, Inc. (QTI)
Sleep stats driver. The driver is used for displaying Sleep statistic maintained
by Always On Processor or Resource Power Manager.

Cc: devicetree@vger.kernel.org
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1634107104-22197-2-git-send-email-mkshah@codeaurora.org
2021-10-16 18:23:30 -05:00
Dmitry Baryshkov
2fae3ecc70 soc: qcom: socinfo: add two missing PMIC IDs
Add IDs for PMK8001 and PMI8996. They also fall in the list of
'duplicated' IDs, where the same index was used for multiple chips.

Fixes: 7fda2b0bfb ("soc: qcom: socinfo: import PMIC IDs from pmic-spmi")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211016190607.49866-1-dmitry.baryshkov@linaro.org
2021-10-16 18:19:56 -05:00
Bjorn Andersson
e3e56c050a soc: qcom: rpmhpd: Make power_on actually enable the domain
The general expectation is that powering on a power-domain should make
the power domain deliver some power, and if a specific performance state
is needed further requests has to be made.

But in contrast with other power-domain implementations (e.g. rpmpd) the
RPMh does not have an interface to enable the power, so the driver has
to vote for a particular corner (performance level) in rpmh_power_on().

But the corner is never initialized, so a typical request to simply
enable the power domain would not actually turn on the hardware. Further
more, when no more clients vote for a performance state (i.e. the
aggregated vote is 0) the power domain would be turned off.

Fix both of these issues by always voting for a corner with non-zero
value, when the power domain is enabled.

The tracking of the lowest non-zero corner is performed to handle the
corner case if there's ever a domain with a non-zero lowest corner, in
which case both rpmh_power_on() and rpmh_rpmhpd_set_performance_state()
would be allowed to use this lowest corner.

Fixes: 279b7e8a62 ("soc: qcom: rpmhpd: Add RPMh power domain driver")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20211005033732.2284447-1-bjorn.andersson@linaro.org
2021-10-15 18:03:20 -05:00
Jens Wiklander
4602c5842f optee: refactor driver with internal callbacks
The OP-TEE driver is refactored with three internal callbacks replacing
direct calls to optee_from_msg_param(), optee_to_msg_param() and
optee_do_call_with_arg().

These functions a central to communicating with OP-TEE in secure world
by using the SMC Calling Convention directly.

This refactoring makes room for using other primitives to communicate
with OP-TEE in secure world while being able to reuse as much as
possible from the present driver.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-15 11:55:42 +02:00
Jens Wiklander
c0ab6db39a optee: simplify optee_release()
Simplifies optee_release() with a new helper function,
optee_close_session_helper() which has been factored out from
optee_close_session().

A separate optee_release_supp() is added for the supplicant device.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-15 11:55:41 +02:00
Jens Wiklander
9028b2463c tee: add sec_world_id to struct tee_shm
Adds sec_world_id to struct tee_shm which describes a shared memory
object. sec_world_id can be used by a driver to store an id assigned by
secure world.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-15 11:55:41 +02:00
Dmitry Osipenko
131dd9a436 memory: tegra20-emc: Support matching timings by LPDDR2 configuration
ASUS Transformer TF101 doesn't provide RAM code and in this case memory
timings should be selected based on identity information read out from
SDRAM chip. Support matching timings by LPDDR2 configuration.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20211006224659.21434-10-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15 09:52:47 +02:00
Dmitry Osipenko
38322cf423 memory: Add LPDDR2-info helpers
Add common helpers for reading and parsing standard LPDDR2 configuration
properties.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20211006224659.21434-9-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15 09:52:47 +02:00
Dmitry Osipenko
ce004ae6c5 dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
Some Tegra20 boards don't have RAM code stored in NVMEM, which is used for
the memory chip identification and the identity information should be read
out from LPDDR2 chip in this case. Document new sub-node containing generic
LPDDR2 properties that will be used for the memory chip identification if
RAM code isn't available. The identification is done by reading out memory
configuration values from generic LPDDR2 mode registers of SDRAM chip and
comparing them with the values of device-tree 'lpddr2' sub-node.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-8-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15 09:52:47 +02:00
Dmitry Osipenko
001b8b2594 dt-bindings: Add vendor prefix for Elpida Memory
Elpida Memory designed, manufactured and sold dynamic random-access
memory (DRAM) products. It was acquired by Micron Technology in 2013,
still there are many devices with components from Elpida. Document the
vendor prefix.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-6-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15 09:52:47 +02:00
Dmitry Osipenko
2782ece0d3 dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F
Elpida B8132B2PB-6D-F memory chip is used by ASUS Transformer TF101
tablet, add compatible for it. We need to specify this compatible it
for a device-tree node containing corresponding memory timings in order
to allow software to match the timings with the detected hardware.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-5-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15 09:52:47 +02:00
Dmitry Osipenko
3539a2c6c6 dt-bindings: memory: lpddr2: Add revision-id properties
Add optional revision-id standard LPDDR2 properties which will help to
identify memory chip.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-4-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15 09:52:47 +02:00
Dmitry Osipenko
9e17f71e9c dt-bindings: memory: lpddr2: Convert to schema
Convert LPDDR2 binding to schema. I removed obsolete ti,jedec-lpddr2-*
compatibles since they were never used by device-trees and by the code.
I also changed "Elpida" compatible prefix to lowercase "elpida".

Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-3-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15 09:52:46 +02:00