Commit Graph

191 Commits

Author SHA1 Message Date
Alex Deucher
19eca43e5a drm/radeon: rework crtc pll setup to better support PPLL sharing
We need the calculate the pixel clock before allocating a PPLL
in order to insure the clocks really match.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20 13:10:44 -04:00
Alex Deucher
2f454cf126 drm/radeon: allow PPLL sharing on non-DP displays
If several non-DP displays use the same pixel clock
we can use the same PPLL for all of them.  If all
relevant displays have the same pixel clock, this
allows the driver to:
- use fewer PPLLs which saves power
- support more than two non-DP displays on DCE4+

The current drm modesetting infrastructure doesn't
really provide a good framework for validating combinations
that work or won't work, so it's possible you could go from
a working configuration to a non-working one by changing the
mode a one of the displays.  However, there this is better
than what was there before.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20 13:10:44 -04:00
Alex Deucher
9dbbcfc689 drm/radeon/dce3: use a single PPLL for all DP displays
If possible, use a single PPLL for multiple DP displays
on DCE3.x.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20 13:10:44 -04:00
Alex Deucher
f3dd8508d4 drm/radeon: rework pll selection (v4)
For DP we can use the same PPLL for all active DP
encoders.  Take advantage of that to prevent cases
where we may end up sharing a PPLL between DP and
non-DP which won't work.  Also clean up the code
a bit.

v2: - fix missing pll_id assignment in crtc init
v3: - fix DP PPLL check
    - document functions
    - break in main encoder search loop after matching.
      no need to keep checking additional encoders.
v4: - same as v3, but re-apply to drm-next as the corner
      cases are fixed properly in subsequent patches.

fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=54471

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20 13:10:43 -04:00
Alex Deucher
e729586e33 drm/radeon/atom: fix typo in SetPixelClock handling
MiscInfo field should be programmed with the crtc id
rather than the pll id.  However, at this point the
two are the same for chips with this version of the table.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20 13:10:43 -04:00
Alex Deucher
2f1f4d9b60 Revert "drm/radeon: rework pll selection (v3)"
This reverts commit 985f61f7ee.

This commit fixed certain cases, but ended up regressing others
due to limitations in the current KMS API.  A proper fix is too
invasive for 3.6.  Push it back to 3.7.

Reported-by: Andres Freund <andres@anarazel.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-17 17:26:24 -04:00
Alex Deucher
985f61f7ee drm/radeon: rework pll selection (v3)
For DP we can use the same PPLL for all active DP
encoders.  Take advantage of that to prevent cases
where we may end up sharing a PPLL between DP and
non-DP which won't work.  Also clean up the code
a bit.

v2: - fix missing pll_id assignment in crtc init
v3: - fix DP PPLL check
    - document functions
    - break in main encoder search loop after matching.
      no need to keep checking additional encoders.

fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=54471

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2012-09-13 16:17:49 -04:00
Alex Deucher
c205b232a6 drm/radeon/atom: powergating fixes for DCE6
Power gating is per crtc pair, but the powergating registers
should be called individually.  The hw handles power up/down
properly.  The pair is powered up if either crtc in the pair
is powered up and the pair is not powered down until both
crtcs in the pair are powered down.  This simplifies
programming and should save additional power as the previous
code never actually power gated the crtc pair.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2012-08-29 12:11:01 -04:00
Alex Deucher
4e58591c89 drm/radeon: don't disable plls that are in use by other crtcs
Some plls are shared for DP.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-08-29 12:11:00 -04:00
Alex Deucher
5317670692 drm/radeon/ss: use num_crtc rather than hardcoded 6
When checking if a pll is in use.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2012-08-21 18:52:56 -04:00
Jerome Glisse
5efcc76c13 drm/radeon: avoid turning off spread spectrum for used pll
If spread spectrum is enabled and in use for a given pll we
should not turn it off as it will lead to turning off display
for crtc that use the pll (this behavior was observed on chelsea
edp).

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Cc: stable@vger.kernel.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-20 11:09:48 -04:00
Alex Deucher
ecd67955fd drm/radeon: fix ordering in pll picking on dce4+
No functional change, but re-order the cases so they
evaluate properly due to the way the DCE macros work.

Noticed by kallisti5 on IRC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-13 10:50:53 -04:00
Alex Deucher
6c0ae2ab85 drm/radeon: properly handle crtc powergating
Need to make sure the crtc is gated on before modesetting.
Explicitly gate the crtc on in prepare() and set a flag
so that the dpms functions don't gate it off during
mode set.

Noticed by sylware on IRC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2012-08-13 10:50:50 -04:00
Laurent Pinchart
e811f5ae19 drm: Make the .mode_fixup() operations mode argument a const pointer
The passed mode must not be modified by the operation, make it const.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-07-19 21:52:38 -04:00
Alex Deucher
f312f09378 drm/radeon: fix SS setup for DCPLL
Need to actually set the SS parameters rather than just 0.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2012-07-18 13:53:43 +02:00
Alex Deucher
26fe45a0a7 drm/radeon: fix up pll selection on DCE5/6
Selecting ATOM_PPLL_INVALID should be equivalent as the
DCPLL or PPLL0 are already programmed for the DISPCLK, but
the preferred method is to always specify the PLL selected.
SetPixelClock will check the parameters and skip the
programming if the PLL is already set up.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2012-07-18 13:53:42 +02:00
Alex Deucher
b7019b2f31 drm/radeon: SI tiling fixes for display
- Use the correct union for getting the tiling info
- Properly init the PIPE_CONFIG field for SI

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-06-20 19:55:56 +01:00
Daniel Vetter
dc257cf154 Linux 3.4-rc6
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.18 (GNU/Linux)
 
 iQEcBAABAgAGBQJPpvY9AAoJEHm+PkMAQRiGpEoIAJgbu+Y8gITnBK/wh9O6zy3S
 5jie5KK4YWdbJsvO58WbNr3CyVIwGIqQ2dUZLiU59aBVLarlGw8xor0MmW+cZwhp
 6fBHaf0qDYAV0MZjD+mnnExOiCRyISa2lPmsfu9dAWywh5KGe6/oAP6/qcXIyok3
 KZyl3qQf4ENpaZPHwZPXCEkUvtuyHgNiszN+QXEadA3s19Ot4VGe9A3VGw+GNrSm
 JqFIq3acQAbKa5BYaqf7TQC02v2FI7//eqt6QHxTqbE6a7LGbTvLfX3HlJ2mnfqa
 1R6QHhM4y4OZDHbaMT2raHZ8WuLXzhehJzhP8Co7AHFOKwVKOb5XbcUr2RrukMU=
 =HkMd
 -----END PGP SIGNATURE-----

Merge tag 'v3.4-rc6' into drm-intel-next

Conflicts:
	drivers/gpu/drm/i915/intel_display.c

Ok, this is a fun story of git totally messing things up. There
/shouldn't/ be any conflict in here, because the fixes in -rc6 do only
touch functions that have not been changed in -next.

The offending commits in drm-next are 14415745b2..1fa611065 which
simply move a few functions from intel_display.c to intel_pm.c. The
problem seems to be that git diff gets completely confused:

$ git diff 14415745b2..1fa611065

is a nice mess in intel_display.c, and the diff leaks into totally
unrelated functions, whereas

$git diff --minimal  14415745b2..1fa611065

is exactly what we want.

Unfortunately there seems to be no way to teach similar smarts to the
merge diff and conflict generation code, because with the minimal diff
there really shouldn't be any conflicts. For added hilarity, every
time something in that area changes the + and - lines in the diff move
around like crazy, again resulting in new conflicts. So I fear this
mess will stay with us for a little longer (and might result in
another backmerge down the road).

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-07 14:02:14 +02:00
Alex Deucher
700698e7c3 drm/radeon/kms: need to set up ss on DP bridges as well
Makes Nutmeg DP to VGA bridges work for me.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=42490

Noticed by Jerome Glisse (after weeks of debugging).

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-04-28 08:04:34 +01:00
Alex Deucher
37d4174d2d drm/radeon/kms: use frac fb div on APUs
Seems to be more stable on certain monitors.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=48880

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-04-27 08:30:19 +01:00
Alex Deucher
eccea7920c drm/radeon/kms: improve bpc handling (v2)
Improve handling of bpc (bits per color) in radeon.
In most cases we want 8 except for HDMI, DP, LVDS, and eDP.

v2: handle DP better.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-04-24 09:50:12 +01:00
Alex Deucher
017d213f64 drm/radeon/kms/atom: force bpc to 8 for now
Using the bpc (bits per color) specified by the monitor
can cause problems in some cases.  Until we get a better
handle on how to deal with those cases, just use a bpc of 8.

Reported-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-26 09:53:12 +01:00
Alex Deucher
0671bdd798 drm/radeon/kms/DCE6.1: ss is not supported on the internal pplls
It's handled via external clock. It should already be protected
by the external ss flag, but add an explicit check just in case.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:56 +00:00
Alex Deucher
641998701b drm/radeon/kms: disable PPLL0 on DCE6.1 when not in use
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:56 +00:00
Alex Deucher
24e1f7947b drm/radeon/kms: Adjust pll picker for DCE6.1
On TN, UNIPHYA always uses PPLL2, UNIPHYB/C/D/E/F
can use either PPLL1 or PPLL0.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:56 +00:00
Alex Deucher
729b95ef03 drm/radeon/kms: DCE6.1 disp eng pll updates
DCE6.1 uses EXT_PLL1 for disp eng.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:56 +00:00
Alex Deucher
f3f1f03ed0 drm/radeon/kms: DCE6 disp eng pll updates
Rename the function to better match the functionality.
DCPLL became PLL0 on DCE6.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:51 +00:00
Alex Deucher
fef9f91fec drm/radeon/kms/atom: add support for crtc power gating
Each pair of crtcs (0/1, 2/3, 4/5) can be power gated.
Make sure the power is applied when the crtc is in use and
only power down the pair when both are off.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:51 +00:00
Alex Deucher
79f17c64b2 drm/radeon/kms/atom: DCE6 no longer has crtcmemreq bits
The hw no longer has the bits and the table is removed.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:50 +00:00
Jerome Glisse
285484e2d5 drm/radeon: add support for evergreen/ni tiling informations v11
evergreen and northern island gpu needs more informations for 2D tiling
than previous r6xx/r7xx. Add field to tiling ioctl to allow userspace
to provide those.

The v8 cs checking change to track color view on r6xx/r7xx doesn't
affect old userspace as old userspace always emited 0 for this register.

v2 fix r6xx/r7xx 2D tiling computation
v3 fix r6xx/r7xx height align for untiled surface & add support for
   tile split on evergreen and newer
v4 improve tiling debugging output
v5 fix tile split code for evergreen and newer
v6 set proper tile split for crtc register
v7 fix tile split limit value
v8 add COLOR_VIEW checking to r6xx/r7xx checker, add evergreen cs
   checking, update safe reg for r600, evergreen and cayman.
   Evergreen checking need some work around for stencil alignment
   issues
v9 fix tile split value range, fix compressed texture handling and
   mipmap calculation, allow evergreen check to be silencious in
   front of current broken userspace (depth/stencil alignment issue)
v10 fix eg 3d texture and compressed texture, fix r600 depth array,
    fix r600 color view computation, add support for evergreen stencil
    split
v11 more verbose debugging in some case

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-02-13 12:28:13 +00:00
Michel Dänzer
1b61925061 drm/radeon: Set DESKTOP_HEIGHT register to the framebuffer (not mode) height.
The value of this register is transferred to the V_COUNTER register at the
beginning of vertical blank. V_COUNTER is the reference for VLINE waits and
goes from VIEWPORT_Y_START to VIEWPORT_Y_START+VIEWPORT_HEIGHT during scanout,
so if VIEWPORT_Y_START is not 0, V_COUNTER actually went backwards at the
beginning of vertical blank, and VLINE waits excluding the whole scanout area
could never finish (possibly only if VIEWPORT_Y_START is larger than the length
of vertical blank in scanlines). Setting DESKTOP_HEIGHT to the framebuffer
height should prevent this for any kind of VLINE wait.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=45329 .

CC: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-02-01 15:42:54 +00:00
Alex Deucher
9aa59993e2 drm/radeon/kms: refine TMDS dual link checks
HDMI 1.3 defines single link clocks up to 340 Mhz.
Refine the current dual link checks to only enable
dual link for DVI > 165 Mhz or HDMI > 340 Mhz if the
hw supports HDMI 1.3 (DCE3+).

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=44755

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-24 17:35:52 +00:00
Alex Deucher
3fa47d9efa drm/radeon/kms: move disp eng pll setup to init path
We really only need to set it up once on init or resume
rather than on every mode set.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-24 17:35:49 +00:00
Dave Airlie
06e4cd6417 drm/radeon/kms: don't use 0 bpc for adjusting hdmi clock
If the bpc is set from the connector is 0, we then use it later to adjust
in a special case the HDMI pixel clock, however if the bpc is 0, we end up
passing a 0 pixel clock into the code.

I'm not sure if this is the correct answer or if we should avoid the HDMI
clock adjustment for 0 values.

This fixes a divide by 0 on my Llano system with a HDMI monitor and hdmi
audio enabled.

Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-12-20 19:58:27 +00:00
Dave Airlie
1fbe6f625f Merge tag 'v3.2-rc6' of /home/airlied/devel/kernel/linux-2.6 into drm-core-next
Merge in the upstream tree to bring in the mainline fixes.

Conflicts:
	drivers/gpu/drm/exynos/exynos_drm_fbdev.c
	drivers/gpu/drm/nouveau/nouveau_sgdma.c
2011-12-20 14:43:53 +00:00
Ville Syrjälä
01f2c7730e drm: Replace pitch with pitches[] in drm_framebuffer
Otherwise each driver would need to keep the information inside
their own framebuffer object structure. Also add offsets[]. BOs
on the other hand are driver specific, so those can be kept in
driver specific structures.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-12-20 10:06:27 +00:00
Alex Deucher
392e37229f drm/radeon/kms: fix scanout of 2D tiled buffers on EG/CM
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=43191

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-12-02 10:48:19 +00:00
Alex Deucher
10b391b946 drm/radeon/kms: remove extraneous calls to radeon_pm_compute_clocks()
It's already called via the DPMS functions.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-11 14:15:05 +00:00
Alex Deucher
996d5c5900 drm/radeon/kms: check for DP MST mode in a few more places (v2)
DP MST is DP multi-stream support, part of DP 1.2.

v2: switch to a helper macro as suggested by Michel.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-01 16:04:57 +00:00
Alex Deucher
1d33e1fc8d drm/radeon/kms: rework DP bridge checks
Return the encoder id rather than a boolean.  This is needed
for differentiate between multiple DP bridge chips.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-01 16:04:39 +00:00
Alex Deucher
b4f15f808b drm/radeon/kms: cleanup atombios_adjust_pll()
The logic was messy and hard to follow.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-01 16:02:01 +00:00
Alex Deucher
09cc6506f9 drm/radeon/kms/DCE4.1: ss is not supported on the internal pplls
It's handled via external clock.  It should already be protected
by the external ss flag, but add an explicit check just in case.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-10-18 10:16:33 +01:00
Benjamin Herrenschmidt
f1bece7fde drm/radeon: ATOM Endian fix for atombios_crtc_program_pll()
v6 of the structure was programmed incorrectly:

  args.v6.ulCrtcPclkFreq.ulPixelClock = cpu_to_le32(clock / 10);

ulPixelClock is a 24-bit bitfield. This statement would thus
do a 32-bit swap of (clock / 10) and drop the top 8 bits which
are ... the LSB. Not what we want. Instead use masks & shifts.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-07-25 12:27:05 +01:00
Alex Deucher
cc9f67a0a0 drm/radeon/kms/atom: AdjustPixelClock fixes for DP bridges
Need to set the external transmitter type properly in
AdjustPixelClock to get the properly output.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-06-17 09:28:10 +10:00
Alex Deucher
adcfde516e drm/radeon/kms: viewport height has to be even
Otherwise, no vblank interrupts.
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=37522

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-06-02 10:48:59 +10:00
Alex Deucher
d0ae3e890b drm/radeon/kms: fix typo in spread spectrum code
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-05-24 08:59:24 +10:00
Alex Deucher
2307790f0c drm/radeon/kms: the SS_Id field in the LCD table if for LVDS only
For DP/eDP, always use the standard DP SS indices.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>
2011-05-22 20:20:41 +10:00
Alex Deucher
6f15c506e0 drm/radeon/kms: properly set the CLK_REF bit for DCE3 devices
If the ss clock is external, the CLK_REF bit needs to be set
in the SetPixelClock parameters.  This should fix DP failures
in the channel equalization loop.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>
2011-05-22 20:20:05 +10:00
Alex Deucher
eac4dff6d3 drm/radeon/kms: handle DP bridges
Fusion hardware often has DP to VGA/LVDS/TMDS bridges to
handle non-DP encoders.  Internally we treat them mostly
like DP.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-05-20 20:02:29 +10:00
Alex Deucher
86a94defe2 drm/radeon/kms: fix up DP clock programming on DCE4/5
In DP mode, the DP ref clock can come from PPLL, DCPLL, or ext clock,
depending on the asic.  The crtc virtual pixel clock is derived from
the DP ref clock.

- DCE4: PPLL or ext clock
- DCE5: DCPLL or ext clock

Setting ATOM_PPLL_INVALID will cause SetPixelClock to skip
PPLL/DCPLL programming and only program the DP DTO for the
crtc virtual pixel clock.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-05-20 20:02:22 +10:00
Alex Deucher
8e8e523d86 drm/radeon/kms: spread spectrum fixes
- properly mask the ss type
- don't enable ss if type is external or percentage is 0
- if ss enabled and type is external, set ref_div_src to ext clock
- prefer ASIC_INTERNAL_SS_ON_DP to LCD_Info SS_Id for eDP
- fix ss amount calculation

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-05-20 20:02:21 +10:00
Alex Deucher
df271bec80 drm/radeon/kms: properly handle bpc >8 in atom command tables
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-05-20 20:02:20 +10:00
Alex Deucher
5785e53ffa drm/radeon/kms: pll tweaks for r7xx
Prefer min m to max p only on pre-r7xx asics.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=36197

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-04-20 09:39:37 +10:00
Alex Deucher
9bb09fa1b5 drm/radeon/kms: pll tweaks for rv6xx
Prefer minm over maxp.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=35994

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-04-09 16:20:41 +10:00
Alex Deucher
fb9674bd2c drm/radeon/kms: pageflipping cleanup for avivo+
Avoid touching the flip setup regs while
acceleration is running.  Set them at modeset
rather than during pageflip.  Touching these
regs while acceleration is active caused hangs
on pre-avivo chips.  These chips do not seem
to be affected, but better safe than sorry,
plus it avoids repeatedly reprogramming the
regs every flip.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-04-04 10:08:35 +10:00
Alex Deucher
64146f8b2a drm/radeon/kms: prefer legacy pll algo for tv-out
ntsc seems to work fine with either algo, some
pal TVs seem pickier.

Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=30832

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-03-23 14:16:19 +10:00
Alex Deucher
942b0e95c3 drm/radeon/kms: fix typo in atom overscan setup
Typo in the aspect scale setup.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-03-16 11:24:12 +10:00
Dave Airlie
34db18abd3 Merge remote branch 'intel/drm-intel-next' of ../drm-next into drm-core-next
* 'intel/drm-intel-next' of ../drm-next: (755 commits)
  drm/i915: Only wait on a pending flip if we intend to write to the buffer
  drm/i915/dp: Sanity check eDP existence
  drm/i915: Rebind the buffer if its alignment constraints changes with tiling
  drm/i915: Disable GPU semaphores by default
  drm/i915: Do not overflow the MMADDR write FIFO
  Revert "drm/i915: fix corruptions on i8xx due to relaxed fencing"
  drm/i915: Don't save/restore hardware status page address register
  drm/i915: don't store the reg value for HWS_PGA
  drm/i915: fix memory corruption with GM965 and >4GB RAM
  Linux 2.6.38-rc7
  Revert "TPM: Long default timeout fix"
  drm/i915: Re-enable GPU semaphores for SandyBridge mobile
  drm/i915: Replace vblank PM QoS with "Interrupt-Based AGPBUSY#"
  Revert "drm/i915: Use PM QoS to prevent C-State starvation of gen3 GPU"
  drm/i915: Allow relocation deltas outside of target bo
  drm/i915: Silence an innocuous compiler warning for an unused variable
  fs/block_dev.c: fix new kernel-doc warning
  ACPI: Fix build for CONFIG_NET unset
  mm: <asm-generic/pgtable.h> must include <linux/mm_types.h>
  x86: Use u32 instead of long to set reset vector back to 0
  ...

Conflicts:
	drivers/gpu/drm/i915/i915_gem.c
2011-03-14 14:15:13 +10:00
Daniel Vetter
7e4d15d90a drm/radeon: introduce gem_to_radeon_bo helper
... and switch it to container_of upcasting.

v2: converted new pageflip code-paths.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-23 10:34:47 +10:00
Alex Deucher
9f4283f49f drm/radeon/kms: add missing frac fb div flag for dce4+
The fixed ref/post dividers are set by the AdjustPll table
rather than the ss info table on dce4+.  Make sure we enable
the fractional feedback dividers when using a fixed post
or ref divider on them as well.

Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=29272

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-17 13:55:47 +10:00
Alex Deucher
5b40ddf888 drm/radeon/kms: hopefully fix pll issues for real (v3)
The problematic boards have a recommended reference divider
to be used when spread spectrum is enabled on the laptop panel.
Enable the use of the recommended reference divider along with
the new pll algo.

v2: testing options

v3: When using the fixed reference divider with LVDS, prefer
min m to max p and use fractional feedback dividers.

Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=28852
https://bugzilla.kernel.org/show_bug.cgi?id=24462
https://bugzilla.kernel.org/show_bug.cgi?id=26552
MacbookPro issues reported by Justin Mattock <justinmattock@gmail.com>

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-15 09:18:51 +10:00
Alex Deucher
265aa6c8d8 drm/radeon/kms: fix a few more atombios endian issues
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-15 09:01:21 +10:00
Cédric Cano
4589433c57 drm/radeon/kms: atombios big endian fixes
agd5f: additional cleanups/fixes

Signed-off-by: Cédric Cano <ccano@interfaceconcept.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-14 09:23:36 +10:00
Alex Deucher
c9417bdd4c drm/radeon/kms: fix interlaced modes on dce4+
- set scaler table clears the interleave bit, need to
reset it in encoder quirks, this was already done for
pre-dce4.
- remove the interleave settings from set_base() functions
this is now handled in the encoder quirks functions, and
isn't technically part of the display base setup.
- rename evergreen_do_set_base() to dce4_do_set_base() since
it's used on both evergreen and NI asics.

Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=28182

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-14 09:22:53 +10:00
Alex Deucher
619efb1059 drm/radeon/kms: Enable new pll calculation for avivo+ asics
New algo is used for r5xx+ and legacy is used for
r1xx-r4xx, rv515.

I've tested on all relevant GPUs and monitors that I
have access to and have found no problems.

Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=26562
https://bugzilla.kernel.org/show_bug.cgi?id=26552
May fix:
https://bugs.freedesktop.org/show_bug.cgi?id=32556

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-02 12:49:43 +10:00
Alex Deucher
f523f74eac drm/radeon/kms: add new pll algo for avivo asics
Based on the vbios code.  This should hopefully
fix the pll problems on a number of avivo asics
once it's enabled.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-02 12:49:41 +10:00
Alex Deucher
fa6bee46a6 drm/radeon/kms: fix r6xx+ scanout on BE systems
R6xx+ have per-block swappers.  BE content in the
framebuffer will now be swapped properly during scanout.
Untested, however, the same code is reported working in
the UMS ddx.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>
2011-01-27 13:54:13 +10:00
Alex Deucher
b526ce2264 drm/radeon/kms: simplify atom adjust pll setup
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>
2011-01-24 11:05:29 +10:00
Alex Deucher
a572eaa372 drm/radeon/kms: DCE5 atom spread spectrum updates
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-07 14:11:23 +10:00
Alex Deucher
f82b3ddc5f drm/radeon/kms: DCE5 atom SetPixelClock updates
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-07 14:11:22 +10:00
Alex Deucher
a93f344d3c drm/radeon/kms: reorder display resume to avoid problems
On resume, we were attemping to unblank the displays before the
timing and plls had be reprogrammed which led to atom timeouts
waiting for things that are not yet programmed.  Re-program
the mode first, then reset the dpms state.

This fixes the infamous atombios timeouts on resume.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-12-21 12:53:34 +10:00
Alex Deucher
e5fd205f28 drm/radeon/kms: disable ss fixed ref divide
Seems to cause problems on certain laptops

Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=24462

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Tested-by: Luca Tettamanti <kronos.it@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-12-16 10:05:24 +10:00
Jason Wessel
21c74a8ea8 drm, kdb, kms: Change mode_set_base_atomic() enter argument to be an enum
The enter argument as implemented by commit 413d45d362 (drm, kdb, kms:
Add an enter argument to mode_set_base_atomic() API) should be more
descriptive as to what it does vs just passing 1 and 0 around.

There is no runtime behavior change as a result of this patch.

Reported-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
CC: David Airlie <airlied@linux.ie>
CC: dri-devel@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-19 14:13:33 +10:00
Dave Airlie
5480f727dc Revert "drm/radeon/kms: remove some pll algo flags"
This reverts commit f28488c282.

On my rv610 test machine the monitor failed to light up after this.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-19 14:12:22 +10:00
Dave Airlie
26bf62e472 Merge branch 'drm-radeon-next' of ../drm-radeon-next into drm-core-next
* 'drm-radeon-next' of ../drm-radeon-next:
  drm/radeon/kms: add drm blit support for evergreen
  drm/radeon: Modify radeon_pm_in_vbl to use radeon_get_crtc_scanoutpos()
  drm/radeon: Add function for display scanout position query.
  drm/radeon/kms: rework spread spectrum handling
  drm/radeon/kms: remove new pll algo
  drm/radeon/kms: remove some pll algo flags
  drm/radeon/kms: prefer high post dividers in legacy pll algo
  drm/radeon/kms: properly handle 40 bit MC addresses in the cursor code
  drm/radeon: add properties to configure the width of the underscan borders
  drm/radeon/kms/r6xx+: use new style fencing (v3)
  drm/radeon/kms: enable writeback (v2)
  drm/radeon/kms: clean up r6xx/r7xx blit init (v2)
2010-10-06 12:57:54 +10:00
Jason Wessel
413d45d362 drm, kdb, kms: Add an enter argument to mode_set_base_atomic() API
Some devices such as the radeon chips receive information from user
space which needs to be saved when executing an atomic mode set
operation, else the user space would have to be queried again for the
information.

This patch extends the mode_set_base_atomic() call to pass an argument
to indicate if this is an entry or an exit from an atomic kernel mode
set change.  Individual drm drivers can properly save and restore
state accordingly.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
CC: Jesse Barnes <jbarnes@virtuousgeek.org>
CC: David Airlie <airlied@linux.ie>
CC: dri-devel@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-06 11:50:31 +10:00
Chris Ball
4dd19b0dd7 drm/radeon/kms: Implement KDB debug hooks for radeon KMS.
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
CC: Jesse Barnes <jbarnes@virtuousgeek.org>
CC: dri-devel@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-06 11:50:08 +10:00
Alex Deucher
ba032a58d1 drm/radeon/kms: rework spread spectrum handling
This patch reworks spread spectrum handling to enable it
properly on lvds and DP/eDP links.  It also fixes several
bugs in the old spread spectrum code.

- Use the ss recommended reference divider if available
when calculating the pll
- Use the proper ss command tables on pre-DCE3 asics
- Avoid reading past the end of the ss info tables
- Enable ss on evergreen asics (lvds, dp, tmds)
- Enable ss on DP/eDP links

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-06 11:46:26 +10:00
Alex Deucher
48dfaaeb66 drm/radeon/kms: remove new pll algo
The recent changes to the old algo (prefer high post div)
coupled with the range and precision limitations of using
fixed point with the new algo make the new algo less
useful.  So drop the new algo.  This should work as well
or better than the old new/old combinations and simplifies
the code a lot.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=30218
among others.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-06 11:46:25 +10:00
Alex Deucher
f28488c282 drm/radeon/kms: remove some pll algo flags
These shouldn't be needed with the post div changes
in the last patch.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-06 11:46:24 +10:00
Alex Deucher
f90087eea4 drm/radeon/kms: force legacy pll algo for RV620 LVDS
There has been periodic evidence that LVDS, on at least some
panels, prefers the dividers selected by the legacy pll algo.
This patch forces the use of the legacy pll algo on RV620
LVDS panels.  The old behavior (new pll algo) can be selected
by setting the new_pll module parameter to 1.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=30029

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-09-14 20:56:06 +10:00
Alex Deucher
54bfe496ce drm/radeon/kms: fix tv-out on avivo asics
digital underscan support regressed tv-out.

fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=29985

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-09-07 08:02:41 +10:00
Alex Deucher
9534787186 drm/radeon/kms: properly set crtc high base on r7xx
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-09-02 11:29:14 +10:00
Alex Deucher
0d9958b18e drm/radeon/kms: force legacy pll algo for RV515 LVDS
There has been periodic evidence that LVDS, on at least some
panels, prefers the dividers selected by the legacy pll algo.
This patch forces the use of the legacy pll algo on RV515
LVDS panels.  The old behavior (new pll algo) can be selected
by setting the new_pll module parameter to 1.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-09-02 11:28:58 +10:00
Alex Deucher
fbee67a65d drm/radeon/kms: DCE3/4 AdjustPixelPll updates
Add options necessary bits for:
- SS on DP
- SS on LVDS
- set clocks right for DP
- deep color on hdmi (needs additional encoder and edid work as well)

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-08-20 08:43:25 +10:00
Alex Deucher
5b1714d386 drm/radeon/kms: enable underscan option for digital connectors
This connector attribute allows you to enable or disable underscan
on a digital output to compensate for panels that automatically
overscan (e.g., many HDMI TVs).  Valid values for the attribute are:

off - forces underscan off
on - forces underscan on
auto - enables underscan if an HDMI TV is connected, off otherwise

default value is auto.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-08-04 10:03:50 +10:00
Dave Airlie
d9fdaafbe9 drm/radeon/kms: move a bunch of modesetting debug to correct debug usage.
This migrates a bunch of DRM_DEBUG->DRM_DEBUG_KMS so we can get more modesetting related info without all the other ioctl handling easily.

Also the PM code moves to DRM_DEBUG_DRIVER mostly.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-08-02 10:47:07 +10:00
Alex Deucher
97d6632853 drm/radeon/kms: Add crtc tiling setup support for evergreen
Needed for scanning out of a tiled buffer.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-08-02 10:00:02 +10:00
Alex Deucher
40c4ac1c19 drm/radeon/kms: Add crtc tiling setup support for r6xx/r7xx
Needed for scanning out of a tiled buffer.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-08-02 10:00:01 +10:00
Alex Deucher
37f9003bd3 drm/radeon/kms/atom: add crtc disable function
Disables the crts as per dpms and also disables the ppll
associated with the crtc.  This should save additional power.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-07-21 11:27:21 +10:00
Alex Deucher
2ff776cf77 drm/radeon/kms: disable frac fb dividers for rs6xx
Should fix fdo bug 28331:
https://bugs.freedesktop.org/show_bug.cgi?id=28331

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-07-01 11:59:31 +10:00
Stefan Richter
921d98b582 drm/radeon/kms: suppress a build warning (unused variable)
At least 'make CONFIG_DEBUG_SECTION_MISMATCH=y' causes
drivers/gpu/drm/radeon/atombios_crtc.c: In function 'atombios_crtc_set_pll':
drivers/gpu/drm/radeon/atombios_crtc.c:684: warning: 'pll' may be used uninitialized in this function
which has the looks of a falso positive.

Add a default: case so that gcc rests assured that all possible pll_id's are covered.
Keep the present cases that fall through to the default one for self-documentation.

Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-05-26 10:27:44 +10:00
Alex Deucher
d7311171c4 drm/radeon/kms/pm: add support for no display power states
The lowest power states often cause display problems, so only enable
them when all displays are off.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-05-18 18:21:50 +10:00
Ben Skeggs
68adac5e49 drm: move radeon_fixed.h to shared drm_fixed.h header
Will be used by nouveau driver also in the near future.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-05-18 18:21:33 +10:00
Alex Deucher
a48b9b4edb drm/radeon/kms/pm: add asic specific callbacks for getting power state (v2)
This also simplifies the code and enables reclocking with multiple heads
active by tracking whether the power states are single or multi-head
capable.

Eventually, we will want to select a power state based on external
factors (AC/DC state, user selection, etc.).

(v2) Update for evergreen

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-05-18 18:20:58 +10:00
Alex Deucher
03214bd5c6 drm/radeon/kms/pm: move pm state update to crtc functions
crtcs are what we ultimately care about wrt to pm.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-05-18 18:20:55 +10:00
Dave Airlie
153549b8b6 Merge branch 'drm-radeon-evergreen-accel' into drm-core-next
* drm-radeon-evergreen-accel:
  drm/radeon: fix cypress firmware typo.
  drm/radeon/kms/evergreen: add hpd support
  drm/radeon/kms/evergreen: implement irq support
  drm/radeon/kms/evergreen: setup and enable the CP
  drm/radeon/kms/evergreen: implement gfx init
  drm/radeon/kms/evergreen: add soft reset function
  drm/radeon/kms/evergreen: add gart support
  drm/radeon/kms: add support for evergreen power tables
  drm/radeon/kms: update atombios.h power tables for evergreen
2010-04-20 13:16:50 +10:00
Alex Deucher
a1a4b23b66 drm/radeon/kms: adjust pll settings for tv
May fix fdo bug 26582.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-19 13:52:43 +10:00
Alex Deucher
45f9a39bed drm/radeon/kms/evergreen: implement irq support
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-09 10:16:09 +10:00
Alex Deucher
9f998ad7e9 drm/radeon/kms: minor fixes for eDP with LCD* device tags (v2)
Some systems have LCD* rather than DFP* device tags in the bios
for eDP connectors; notably the new apple iMac. This fixes
things up so eDP connectors with either tag will work.

v2: fix typo

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-03-31 13:13:16 +10:00