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854 Commits

Author SHA1 Message Date
Yue Hin Lau
b7901be0ed drm/amd/display: renaming mem input to hubp 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:46:22 -04:00
Charlene Liu
4176664b1f drm/amd/display: audio dynamic resource acquired related 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:46:16 -04:00
Yongqiang Sun
50d4cfdc11 drm/amd/display: Program front end first when set mode. 
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:46:11 -04:00
Tony Cheng
6a2b691f09 drm/amd/display: wrong VM setting cause invalid DF request from DCN 
fix typo in register field.  we are lucky the shift/mask is the same, no behavior change

add globals to experiment with using different VM settings

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:45:53 -04:00
Yongqiang Sun
0fc899b0f1 drm/amd/display: Enable double buffer as per vertical interrupt enabled. 
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:45:48 -04:00
Dmytro Laktyushkin
6d04ee9dc1 drm/amd/display: Restructuring and cleaning up DML 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:45:24 -04:00
Yue Hin Lau
c73b046f86 drm/amd/display: Expose some mem_input functions for reuse 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:44:37 -04:00
Eric Yang
441ad74173 drm/amd/display: Add override for reporting wm ranges 
For verification of watermark select with SMU team, proper
implementation will follow

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:44:26 -04:00
Tony Cheng
6512387a54 drm/amd/display: align DCLK to voltage level 
in past program SMU will use all voltage headroom.  RV does not

if DAL need higher voltage for DCFCLK or DISPCLK, also increase FCLK
to improve stutter as voltage is already

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:44:13 -04:00
Andrew Jiang
8740196935 drm/amd/display: Move power control from link encoder to hwsequencer 
A recent commit moved the backlight control code along with the register
defines, but did not move the power control code. This along with
remnant fields in the dce110_link_enc_registers struct made it so that
the code still compiled, but any attempts to access the
LVTMA_PWRSEQ_STATE register led to reading from an address of 0. This
patch corrects that.

Also, rename blacklight_control to edp_backlight_control (Typo fix).

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:44:08 -04:00
Yue Hin Lau
b87d78d6aa drm/amd/display: moving cursor functions from ipp to mem_input 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:44:03 -04:00
Tony Cheng
966869d07a drm/amd/display: option to maximize lb usage 
experimental change for testing if max line buffer result in better stutter efficiency

for 1080p, LB can hold up to 9 line at 10bpcc, potentially add 10 line time of
latency hiding.

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:43:41 -04:00
Tony Cheng
a32a7708ae drm/amd/display: add option to disable DCC for DCC 128b request 
1. reverts commit e67f51012740 ("dc: temp disable DCC on high res.")
- default still DCC enabled

2. add debug options to decide how DCC is disabled
- disable DCC
- disable DCC if DCC requires 128b (aka. half) request
-- observed compressed data corruption result in screen corruption in
full (256b) request while half (128b) would cause DCN to hang, result in
DF hang

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:43:36 -04:00
Tony Cheng
db64fbe732 drm/amd/display: enable optional pipe split for single display 
also refactor debug option.  now pipe_split_policy are
dynamic = no hack around dcn_calcs.  will split based on HW recommendation
avoid = avoid split if we can support the config with higher voltage
avoid_multi_display = allow split with single display output.

force_single_disp_pipe_split
force single display to pipe split to improve stutter efficiency
by using DET buffers using 2 HUBP.

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:43:30 -04:00
Charlene Liu
e778915c91 drm/amd/display: temp disable DCC on high res. 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:43:24 -04:00
Yongqiang Sun
56e6ed4561 drm/amd/display: Only reset top pipe back end. 
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:43:13 -04:00
SivapiriyanKumarasamy
69b516c91c drm/amd/display: Program stream's csc matrix instead of using default 
Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:43:02 -04:00
Hersen Wu
4f4ee68686 drm/amd/display: screen flickers when connected to ext monitor in clone 
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:42:38 -04:00
Ken Chalmers
5df921d4c0 drm/amd/display: fix ASSERT() caused by missing registers. 
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:42:12 -04:00
Yue Hin Lau
dbaed8037c drm/amd/display: edp backlight regression fix 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:42:07 -04:00
Eric Bernstein
62bf6e9b29 drm/amd/display: update blending mode and set output denorm 
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:41:56 -04:00
Eric Yang
904aa42e77 drm/amd/display: add back removed hack for mpcc add 
A previous changed removed the hack to match mpcc_idd
with mi instance. This causes pstate hang on resume
from hibernate for yet unknown reason. Add the hack
back for now to work around the issue. More debugging
required in init_hw to root cause the hang.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:41:50 -04:00
Yue Hin Lau
d53d7866a7 drm/amd/display: removing remaining register definitions work around 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:41:38 -04:00
Yue Hin Lau
eade83503a drm/amd/display: fixing register includes 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:41:03 -04:00
Eric Bernstein
7f4a7253b1 drm/amd/display: update mpc add/remove functions 
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:40:45 -04:00
Yue Hin Lau
024f0607cf drm/amd/display: Refactor dcn10_dpp_cm_helper to dcn10_cm_common 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:40:33 -04:00
Andrew Jiang
5088cc98f5 drm/amd/display: Force always scale chroma, set always_scaled to false 
This allows us to not always have scaling on, which causes issues with
validation and causes the text to blur slightly.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:40:00 -04:00
Hersen Wu
6bf520280f drm/amd/display: Driver message to SMU to indicate display off 
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-21 16:39:25 -04:00
Dave Airlie
5667ff5c11 amdgpu/dc: fix a bunch of misc whitespace. 
This just aligns a few things with kernel style.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-06 13:04:42 -04:00
Dave Airlie
94de2bbdfa amdgpu/dc: remove pointless return from build_pipe_hw_param 
This never returned anything else.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-29 13:02:41 -04:00
Dave Airlie
c13b408b81 amdgpu/dc: another round of dce/dcn construct cleanups. 
This removes any remaining pointless return codepaths from the
DCE code.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-29 13:02:34 -04:00
Dave Airlie
4dec2aa9eb amdgpu/dc: make program_regamma_pwl return void 
The return value was unused.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-29 13:02:08 -04:00
Dave Airlie
c60ae11201 amdgpu/dc: make link encoder construct void. 
This only ever returned true.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-29 13:01:36 -04:00
Dave Airlie
f29f918f28 amdgpu/dc: make stream encoder constructor return void. 
The checks weren't useful here really.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-29 13:01:29 -04:00
Dave Airlie
395f669eb6 amdgpu/dc: constify a bunch of dc structs. 
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-29 13:01:15 -04:00
Harry Wentland
a2e74cb626 drm/amd/display: Remove DWB 
It's not in a good shape and currently completely unused.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-28 16:53:10 -04:00
Dave Airlie
8c0dc2b989 amdgpu/dc: move filter taps to being static const data (v2) 
This just adds two accessor methods, and moves all the data
to static const.

v2: fix dcn build.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-28 16:49:55 -04:00
Harry Wentland
2004f45ef8 drm/amd/display: Use kernel alloc/free 
Abstractions are frowned upon.

cocci script:
virtual context
virtual patch
virtual org
virtual report

@@
expression ptr;
@@

- dm_alloc(ptr)
+ kzalloc(ptr, GFP_KERNEL)

@@
expression ptr, size;
@@

- dm_realloc(ptr, size)
+ krealloc(ptr, size, GFP_KERNEL)

@@
expression ptr;
@@

- dm_free(ptr)
+ kfree(ptr)

v2: use GFP_KERNEL, not GFP_ATOMIC. add cocci script

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-28 16:46:15 -04:00
Harry Wentland
a6def44598 drm/amd/display: Update include to bring in line with internal tree 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:41 -04:00
Vitaly Prosyak
e338aab03f drm/amd/display: Update DPP registers 
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:38 -04:00
pana
e9475143fb drm/amd/display: Add 2X Cursor Magnification Code 
Signed-off-by: Pandey, Arun <Arun.Pandey@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:37 -04:00
Harry Wentland
21e67d4d52 drm/amd/display: No need to keep track of unreffed clk sources 
This simplifies clock source reprogramming a bit.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:36 -04:00
Yue Hin Lau
e74c6972f8 drm/amd/display: move dwb registers to header file 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:35 -04:00
Eric Bernstein
264efa3183 drm/amd/display: remove output_format from ipp_setup 
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:35 -04:00
Harry Wentland
9d0dcecd93 drm/amd/display: Power down clock source at commit 
Still one more in dc_validate_global

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:34 -04:00
Harry Wentland
4a6295361c drm/amd/display: Don't reset clock source at unref 
Powering down the clock source during unref is unsafe as we might want
to unref during atomic_check

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:33 -04:00
Yue Hin Lau
8352464661 drm/amd/display: seperate dpp_cm_helper functions into new file 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:32 -04:00
Harry Wentland
61a44fc626 drm/amd/display: Enable dcn10_power_on_fe log by default 
This should only happen on full update. If this ever happens
on regular pageflips it needs to be debugged.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:30 -04:00
Hersen Wu
1bb4715440 drm/amd/display: Request to have DCN RV pipe Harvesting 
TODO: Current change only work for sucessive last fused pipe,
like p3, or p3,p2. It does not work for fused p1,p2.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:27 -04:00
Yongqiang Sun
890db270a5 drm/amd/display: Remove sanity check. 
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:17:26 -04:00