Commit Graph

21504 Commits

Author SHA1 Message Date
Tony Lindgren
509b1377eb ARM: OMAP2+: Drop legacy platform data for omap4 usb
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-14 08:41:18 -07:00
Tony Lindgren
c7b72abca6 ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-14 08:41:18 -07:00
Tony Lindgren
0db53013cd ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-14 08:41:18 -07:00
dillon min
2a4117df9b ARM: dts: Fix dcan driver probe failed on am437x platform
Got following d_can probe errors with kernel 5.8-rc1 on am437x

[   10.730822] CAN device driver interface
Starting Wait for Network to be Configured...
[  OK  ] Reached target Network.
[   10.787363] c_can_platform 481cc000.can: probe failed
[   10.792484] c_can_platform: probe of 481cc000.can failed with error -2
[   10.799457] c_can_platform 481d0000.can: probe failed
[   10.804617] c_can_platform: probe of 481d0000.can failed with error -2

actually, Tony has fixed this issue on am335x with the patch [3]

Since am437x has the same clock structure with am335x
[1][2], so reuse the code from Tony Lindgren's patch [3] to fix it.

[1]: https://www.ti.com/lit/pdf/spruh73 Chapter-23, Figure 23-1. DCAN
     Integration
[2]: https://www.ti.com/lit/pdf/spruhl7 Chapter-25, Figure 25-1. DCAN
     Integration
[3]: commit 516f1117d0 ("ARM: dts: Configure osc clock for d_can on
     am335x")

Fixes: 1a5cd7c23c ("bus: ti-sysc: Enable all clocks directly during init to read revision")
Signed-off-by: dillon min <dillon.minfei@gmail.com>
[tony@atomide.com: aligned commit message a bit for readability]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-14 08:03:28 -07:00
Linus Torvalds
e9919e11e2 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull input fixes from Dmitry Torokhov:
 "A few quirks for the Elan touchpad driver, another Thinkpad is being
  switched over from PS/2 to native RMI4 interface, and we gave a brand
  new SW_MACHINE_COVER switch definition"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
  Input: elan_i2c - add more hardware ID for Lenovo laptops
  Input: i8042 - add Lenovo XiaoXin Air 12 to i8042 nomux list
  Revert "Input: elants_i2c - report resolution information for touch major"
  Input: elan_i2c - only increment wakeup count on touch
  Input: synaptics - enable InterTouch for ThinkPad X1E 1st gen
  ARM: dts: n900: remove mmc1 card detect gpio
  Input: add `SW_MACHINE_COVER`
2020-07-13 18:31:15 -07:00
Martin Blumenstingl
d6a3873c7b ARM: dts: meson8b: odroidc1: enable the SDHC controller
Odroid-C1 has an eMMC connector where users can optionally install an
eMMC module. The eMMC modules run off a 1.8V VQMMC supply which means
that HS-200 mode can be used (this is the highest mode that the SDHC
controller supports). Enable the SDHC controller so eMMC modules can be
accessed.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-4-martin.blumenstingl@googlemail.com
2020-07-13 11:58:15 -07:00
Martin Blumenstingl
73501b890a ARM: dts: meson8b: ec100: enable the SDHC controller
EC-100 has built-in eMMC flash which is hard-wired to 3.3V VCC (which
means it's limited to high-speed MMC modes). Enable the SDHC controller
to access the contents of the eMMC flash.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-3-martin.blumenstingl@googlemail.com
2020-07-13 11:58:15 -07:00
Martin Blumenstingl
73106f75bf ARM: dts: meson: add the SDHC MMC controller
Meson6, Meson8, Meson8b and Meson8m2 are using a similar SDHC controller
IP which typically connects to an eMMC chip (because unlike the SDIO
controller the SDHC controller has an 8-bit bus interface).

On Meson8, Meson8b and Meson8m2 the clock inputs are all the same.
However, Meson8m2 seems to have an improved version of the SHDC
controller IP which doesn't require the driver to wait manually for a
flush of a DMA transfer. Thus every SoC has it's own compatible string
so if more difference are discovered they can be implemented.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-2-martin.blumenstingl@googlemail.com
2020-07-13 11:58:15 -07:00
Martin Blumenstingl
9960cacbae ARM: dts: meson8b: add power domain controller
The Meson8b SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-4-martin.blumenstingl@googlemail.com
2020-07-13 11:56:23 -07:00
Martin Blumenstingl
c5d3d3cf00 ARM: dts: meson8m2: add resets for the power domain controller
The Meson8m2 SoCs has introduced additional reset lines for the VPU
compared to Meson8. Also it uses a slightly different VPU clock
frequency compared to Meson8 since it can now achieve 364MHz thanks to
the addition of the GP_PLL.
Add the reset lines, VPU clock configuration and update the compatible
string so the implementation differences can be managed.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-3-martin.blumenstingl@googlemail.com
2020-07-13 11:56:23 -07:00
Martin Blumenstingl
aecc72b14d ARM: dts: meson8: add power domain controller
The Meson8 SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-2-martin.blumenstingl@googlemail.com
2020-07-13 11:56:23 -07:00
Alexander A. Klimov
75f66813e0 Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:25:29 -07:00
Suman Anna
e94828c17c ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSP
The watchdog timers have been added for the IPU and DSP remoteproc
devices for the OMAP5 uEVM board. The following timers (same as the
timers on OMAP4 Panda boards) are used as the watchdog timers,
        DSP : GPT6
        IPU : GPT9 & GPT11 (one for each Cortex-M4 core)

The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.

These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:44 -07:00
Suman Anna
f1c4a33fb8 ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSP
The watchdog timers have been added for the IPU and DSP remoteproc
devices on all the OMAP4-based Panda boards. The following timers
are used as the watchdog timers,
	DSP : GPT6
	IPU : GPT9 & GPT11 (one for each Cortex-M3 core)

The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.

These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:43 -07:00
Suman Anna
f0954943a3 ARM: dts: omap5-uevm: Add system timers to DSP and IPU
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices for the OMAP5 uEVM boards. The following timers
(same as the timers on OMAP4 Panda boards) are chosen:
        IPU : GPT3 (SMP-mode)
        DSP : GPT5

IPU has two Cortex-M4 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.

The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:42 -07:00
Suman Anna
1e48754f2c ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSP
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on the OMAP5 uEVM board. These nodes are assigned
to the respective rproc device nodes, and both the IPU and DSP remote
processors are enabled for this board.

The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.

An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:42 -07:00
Suman Anna
e8661220e1 ARM: dts: omap5: Add aliases for rproc nodes
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP5 boards. The aliases uses
the stem "rproc", and are identical to the values
chosen on OMAP4 boards.

The aliases can be overridden, if needed, in the
respective board files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:41 -07:00
Suman Anna
3026ce4749 ARM: dts: omap5: Add DSP and IPU nodes
OMAP5, like OMAP4, also has two remote processor subsystems,
DSP and IPU. The IPU subsystem though has dual Cortex-M4
processors instead of the dual Cortex-M3 processors in OMAP4,
but otherwise has almost the same set of features. Add the
DT nodes for these two processor sub-systems for all OMAP5
SoCs.

The nodes have the 'iommus', 'clocks', 'resets', 'firmware' and
'mboxes' properties added, and are disabled for now. The IPU node
has its L2 RAM memory specified through the 'reg' and 'reg-names'
properties. The DSP node doesn't have these since it doesn't have
any L2 RAM memories, but has an additional 'ti,bootreg' property
instead as it has a specific boot register that needs to be
programmed for booting.

These nodes should be enabled as per the individual product
configuration in the corresponding board dts files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:41 -07:00
Suman Anna
7f7d771c00 ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. The
following DMTimers are chosen:
	IPU : GPT3 (SMP-mode)
	DSP : GPT5

IPU has two Cortex-M3 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.

The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:40 -07:00
Suman Anna
b4778e787f ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. These nodes
are assigned to the respective rproc device nodes, and both the
IPU and DSP remote processors are enabled for all these boards.

The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.

An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:39 -07:00
Suman Anna
691eb1805f ARM: dts: omap4: Add aliases for rproc nodes
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP4 boards. The aliases uses
the stem "rproc".

The aliases can be overridden, if needed, in the
respective board files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:39 -07:00
Suman Anna
5ce170cdaa ARM: dts: omap4: Add IPU DT node
The DT node for the Dual-Cortex M3 IPU processor sub-system has
been added for OMAP4 SoCs. The L2RAM memory region information
has been added to the node through the 'reg' and 'reg-names'
properties. The node has the 'iommus', 'clocks', 'resets',
'mboxes' and 'firmware' properties also added, and is disabled
for now. It should be enabled as per the individual product
configuration in the corresponding board dts files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:38 -07:00
Suman Anna
9ae60ac13f ARM: dts: omap4: Update the DSP node
The compatible property for the DSP node is updated to match
the OMAP remoteproc bindings. The node is moved from the soc
node to the ocp node to better reflect the connectivity from
MPU side.

The node is updated with the 'ti,bootreg', 'clocks', 'resets',
'iommus', 'mboxes' and 'firmware' properties. Note that the
node does not have any 'reg' or 'reg-names' properties since
it doesn't have any L2 RAM memory, but only Unicaches.

The node is disabled for now, and should be enabled as per
the individual product configuration in the corresponding
board dts files.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:37 -07:00
Suman Anna
52ddb6d914 ARM: dts: omap5: Add timer_sys_ck clocks for timers
The commit d41e530409 ("clk: ti: omap5: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes except for the always-on timers 1 and 12.

This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:37 -07:00
Suman Anna
214ec0319e ARM: dts: omap4: Add timer_sys_ck clocks for timers
The commit 1c7de9f27a ("clk: ti: omap4: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes.

This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:11:36 -07:00
Drew Fustini
abe4e4675d ARM: dts: am335x-pocketbeagle: set default mux for gpio pins
These pins on the PocketBeagle P1 and P2 headers are connected to AM3358
balls with gpio lines, and these pins are not used for any other
peripherals by default. These GPIO lines are unclaimed and could be used
by userspace program through the gpiod ABI.

This patch adds a "default" state in the am33xx_pinmux node and sets the
mux for those pins to gpio (mode 7) and input enable.

The "pinctrl-single,bias-pullup" and "pinctrl-single,bias-pulldown"
pinconf properties are also set for each pin per the ball reset state in
section 4.2 of the datasheet [0].

This is the AM335x pin control register format in Table 9-60 [1]:

 bit     attribute      value
----------------------------------
31-7     reserved       0 on reset
   6     slew           { 0: fast, 1: slow }
   5     rx_active      { 0: rx disable, 1: rx enabled }
   4     pu_typesel     { 0: pulldown select, 1: pullup select }
   3     puden          { 0: pud enable, 1: disabled }
   2     mode           3 bits to selec mode 0 to 7
   1     mode
   0     mode

The values for the bias pinconf properties are derived as follows:

pinctrl-single,bias-pullup   = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pullup   = <  0x10      0x10      0x10   0x18 >;

          2^5    2^4    2^3    2^2    2^1    2^0  |
         0x20   0x10   0x08   0x04   0x02   0x01  |
--------------------------------------------------|
input       x      1      0     x      x      x   | 0x10
enabled     x      1      0     x      x      x   | 0x10
disabled    x      0      0     x      x      x   | 0x00
mask        x      1      1     x      x      x   | 0x18

pinctrl-single,bias-pulldown = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pulldown = <   0x0       0x0      0x10   0x18 >;

          2^5    2^4    2^3    2^2    2^1    2^0  |
         0x20   0x10   0x08   0x04   0x02   0x01  |
--------------------------------------------------|
input       x      0      0     x      x      x   | 0x00
enabled     x      0      0     x      x      x   | 0x00
disabled    x      1      0     x      x      x   | 0x10
mask        x      1      1     x      x      x   | 0x18

[0] http://www.ti.com/lit/ds/symlink/am3358.pdf
[1] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf

Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 11:08:04 -07:00
Tony Lindgren
3c881456b6 ARM: OMAP2+: Drop legacy platform data for am4 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

[tony@atomide.com: fixed typo for am3 vs am4]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 09:59:48 -07:00
Arnd Bergmann
42027dfe59 This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.9 please pull the following:
 
 - Rafal specifies the switch ports for various Luxul devices (XAP-1410,
   XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150)
 
 - Krzysztof fixes the L2 cache controller node name to conform to
   dtschema
 
 - Maxime introduces two new clock providers for Raspberry Pi 4, one to
   support firmware based clocks and another one for the DVP block
   feeding into the two HDMI blocks.
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Merge tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.9 please pull the following:

- Rafal specifies the switch ports for various Luxul devices (XAP-1410,
  XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150)

- Krzysztof fixes the L2 cache controller node name to conform to
  dtschema

- Maxime introduces two new clock providers for Raspberry Pi 4, one to
  support firmware based clocks and another one for the DVP block
  feeding into the two HDMI blocks.

* tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: bcm: Align L2 cache-controller nodename with dtschema
  ARM: dts: BCM5301X: Specify switch ports for Luxul devices
  ARM: dts: bcm2711: Add HDMI DVP
  ARM: dts: bcm2711: Add firmware clocks node

Link: https://lore.kernel.org/r/20200707045759.17562-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13 15:23:07 +02:00
Arnd Bergmann
67b2563855 Device tree changes for omaps for v5.9 merge window
This series of changes configures the GPIO line names for am335x beaglebone
 black and pocketbeagle to make it easier to configure the pins. To make use
 of the pins, we also add the gpio-ranges for am335x.
 
 We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then
 there are two non-urgent dtschema validator warning fixes.
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Merge tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Device tree changes for omaps for v5.9 merge window

This series of changes configures the GPIO line names for am335x beaglebone
black and pocketbeagle to make it easier to configure the pins. To make use
of the pins, we also add the gpio-ranges for am335x.

We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then
there are two non-urgent dtschema validator warning fixes.

* tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x-pocketbeagle: add gpio-line-names
  ARM: dts: am335x-boneblack: add gpio-line-names
  ARM: dts: am33xx-l4: add gpio-ranges
  ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxes
  ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocs
  ARM: dts: am: Align L2 cache-controller nodename with dtschema
  ARM: dts: omap: Align L2 cache-controller nodename with dtschema

Link: https://lore.kernel.org/r/pull-1594402929-762188@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13 15:08:43 +02:00
Arnd Bergmann
056a7ecf47 UniPhier ARM SoC DT updates for v5.9
- add missing interrupts property to support card serial
 
 - fix node names to follow the DT schema
 
 - add PCIe endpoint and PHY nodes for Pro5 SoC
 
 - simplify device hierarchy of support-card.dtsi
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Merge tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt

UniPhier ARM SoC DT updates for v5.9

- add missing interrupts property to support card serial

- fix node names to follow the DT schema

- add PCIe endpoint and PHY nodes for Pro5 SoC

- simplify device hierarchy of support-card.dtsi

* tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  ARM: dts: uniphier: simplify support-card node structure
  ARM: dts: uniphier: Add PCIe endpoint and PHY node for Pro5
  ARM: dts: uniphier: Rename ethphy node to ethernet-phy
  ARM: dts: uniphier: give fixed port number to support card serial
  ARM: dts: uniphier: rename support card serial node to fix schema warning
  ARM: dts: uniphier: add interrupts to support card serial

Link: https://lore.kernel.org/r/CAK7LNARGDcCKxV3-H7WmuZAVe49n0QF+672-KN0tsP0och0a_A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13 15:00:36 +02:00
Parthiban Nallathambi
f9ecf10cb8 ARM: dts: imx6ull: add MYiR MYS-6ULX SBC
Add support for the MYiR imx6ULL based single board computer
equipped with on board 256MB NAND & RAM. The board also
provides expansion header for expansion board, but this
commit adds only support for SBC.

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Chris Healy
93e881e1f1 ARM: dts: vf610-zii-spb4: Add node for switch watchdog
Add I2C child node for switch watchdog present on SPB4

Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Philippe Schenker
c68a1c9253 ARM: dts: colibri-imx6: remove pinctrl-names orphan
This is not necessary without a pinctrl-0 statement. Remove this
orphan.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Uwe Kleine-König
fa28d8212e ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files
The imx-pwm driver supports 3 cells and this is the more flexible setting.
So use it by default and overwrite it back to two for the files that
reference the PWMs with just 2 cells to minimize changes.

This allows to drop explicit setting to 3 cells for the boards that already
depend on this. The boards that are now using 2 cells explicitly can be
converted to 3 individually.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Andrew Lunn
5c73d9acd1 ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseX
The SFF soldered onto the board expect the ports to use 1000BaseX.  It
makes no sense to have the ports set to SGMII, since they don't even
support that mode.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Chris Healy
bcf9d46729 ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseX
The SFF soldered onto the board expects the port to use 1000BaseX.  It
makes no sense to have the port set to SGMII, since it doesn't even
support that mode.

Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Chris Healy
b955387667 ARM: dts: ZII: update MDIO speed and preamble
Update MDIO configuration with ZII devices to fully utilize
MDIO endpoint capabilities.  All devices support 12.5MHz clock and
don't require MDIO preable.

Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Andrey Smirnov
493e873368 ARM: dts: vfxxx: Add node for CAAM
Add node for CAAM device in NXP Vybrid SoC.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Richard Zhu
d4650bd53f ARM: dts: imx6qp-sabresd: enable sata
Enable SATA on iMX6QP SABRESD board.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Richard Zhu
af3eaa4ab0 ARM: dts: imx6qp-sabreauto: enable sata
Enable SATA on iMX6QP SABREAUTO board.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Oleksij Rempel
c90fdc5021 ARM: dts: add Protonic RVT board
Protonic RVT is an internal development platform for a wireless ISObus
Virtual Terminal based on COTS tablets, and the predecessor of the WD2
platform.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Oleksij Rempel
5a1dcf4a6b ARM: dts: add Protonic VT7 board
The Protonic VT7 is a mid-class ISObus Virtual Terminal with a 7 inch
touchscreen display.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Oleksij Rempel
88010b8174 ARM: dts: add Protonic WD2 board
Add support for the Protonic WD2 board, which is an internal development
platform for low-cost agricultural Virtual Terminals based on COTS tablets
and web applications.
It inherits from the PRTI6Q base class.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Oleksij Rempel
0d446a5055 ARM: dts: add Protonic PRTI6Q board
Protonic PRTI6Q is a development board and a base class for different
specific customer application boards based on the i.MX6 family of SoCs,
developed by Protonic Holland.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
7c2b325020 ARM: dts: imx6ul: Add ASRC device node
Add ASRC device node.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Krzysztof Kozlowski
69cc1502a8 ARM: dts: imx: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache@a02000: $nodename:0:
        'l2-cache@a02000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Krzysztof Kozlowski
954809fb53 ARM: dts: vf610: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache@40006000: $nodename:0:
        'l2-cache@40006000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
73691f21e2 ARM: dts: imx6sx-sdb: Add MQS support
Add MQS support. As the pin conflict with usdhc2, then need
to add a separate dts.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Biwen Li
22b6db7831 ARM: dts: ls1021a: add ftm_alarm0 DT node
The patch add ftm_alarm0 DT node
	- add rcpm node
	- add ftm_alarm0 node
	- aliases ftm_alarm0 as rtc1

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
a2e4a60de4 ARM: dts: imx6sx-sabreauto: Add cs42888 sound card support
Complete the ESAI node and Add cs42888 sound card support.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
9ef33df18c ARM: dts: imx6sx-sabreauto: Add SPDIF support
Add SPDIF support.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
903c0ef28b ARM: dts: imx6sx-sdb: Add SPDIF support
Add SPDIF support.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Shengjiu Wang
c3a71ffb6d ARM: dts: imx6sx: Enable ASRC device
Add compatible string, update the clock table,
add fsl,asrc-rate and fsl,asrc-width property.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 19:48:53 +08:00
Ian Ray
8a915ec0c8 ARM: dts: imx53-ppd: alarm LEDs use kernel LED interface
Use kernel LED interface for the alarm LEDs.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Samu Nuutamo <samu.nuutamo@vincit.fi>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Shengjiu Wang
5da1b522cf ARM: dts: imx6sll: Make ssi node name same as other platforms
In imx6sll.dtsi, the ssi node name is different with other
platforms (imx6qdl, imx6sl, imx6sx), but the
sound/soc/fsl/fsl-asoc-card.c machine driver needs to check
ssi node name for audmux configuration, then different ssi
node name causes issue on imx6sll platform.

So we change ssi node name to make all platforms have same
name.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
a6d094403c ARM: dts: imx: Change usdhc node name on i.MX6/i.MX7 SoCs
Change i.MX6/i.MX7 SoCs usdhc node name from usdhc to mmc to be
compliant with yaml schema, it requires the nodename to be "mmc".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
7e4cd9d8f7 ARM: dts: imx: Change esdhc node name on i.MX2/i.MX3/i.MX5 SoCs
Change i.MX2/i.MX3/i.MX5 SoCs esdhc node name from esdhc to mmc to
be compliant with yaml schema, it requires the nodename to be "mmc".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
459ebbee05 ARM: dts: imx: Change sdhci node name on i.MX27/i.MX31 SoCs
Change i.MX27/i.MX31 node name from sdhci to mmc to be compliant
with yaml schema, it requires the nodename to be "mmc".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
c13168a565 ARM: dts: imx6qdl: Remove invalid interrupt for GPC node
In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved,
so remove it from GPC node.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
78b05005e2 ARM: dts: imx: change iim node name on i.MX SoCs
Change IIM node name from iim to efuse to be compliant
with yaml schema, it requires the nodename to be one of
"eeprom|efuse|nvram".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
17a2deb061 ARM: dts: imx: change ocotp node name on MXS SoCs
Change OCOTP node name from ocotp to efuse to be compliant
with yaml schema, it requires the nodename to be one of
"eeprom|efuse|nvram".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
a1abd6777f ARM: dts: imx: change ocotp node name on i.MX6/7 SoCs
Change OCOTP node name from ocotp-ctrl to efuse to be compliant with
yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Yangbo Lu
5656bb3857 ARM: dts: ls1021a: output PPS signal on FIPER2
The timer fixed interval period pulse generator register
is used to generate periodic pulses. The down count
register loads the value programmed in the fixed period
interval (FIPER). At every tick of the timer accumulator
overflow, the counter decrements by the value of
TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down
counter value reaches zero. It reloads the down counter
in the cycle following a pulse.

To use the TMR_FIPER register to generate desired periodic
pulses. The value should programmed is,
desired_period - tclk_period

Current tmr-fiper2 value is to generate 100us periodic pulses.
(But the value should have been 99995, not 99990. The tclk_period is 5.)
This patch is to generate 1 second periodic pulses with value
999999995 programmed which is more desired by user.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Anson Huang
915e19686f ARM: dts: imx: Make tempmon node as child of anatop node
i.MX6/7 SoCs' temperature sensor is inside anatop module from HW
perspective, so it should be a child node of anatop.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13 18:44:42 +08:00
Alexandre Belloni
44f6fa431b ARM: dts: at91: sama5d2: add TCB GCLK
The sama5d2 tcbs take an extra input clock, their gclk.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200710230813.1005150-4-alexandre.belloni@bootlin.com
2020-07-11 18:57:03 +02:00
Tim Harvey
4237c62530 ARM: dts: imx6qdl-gw551x: fix audio SSI
The audio codec on the GW551x routes to ssi1.  It fixes audio capture on
the device.

Cc: stable@vger.kernel.org
Fixes: 3117e851ce ("ARM: dts: imx: Add TDA19971 HDMI Receiver to GW551x")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-11 22:31:30 +08:00
Masahiro Yamada
781865604d ARM: dts: uniphier: simplify support-card node structure
This device hierarchy is needlessly complex.

Remove the support-card node level, and move the ethernet and serial
nodes right under the system-bus node.

This also fixes the following warning from 'make ARCH=arm dtbs_check':

  support-card@1,1f00000: $nodename:0: 'support-card@1,1f00000' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-10 17:13:20 +09:00
Kunihiko Hayashi
c60a5cee6e ARM: dts: uniphier: Add PCIe endpoint and PHY node for Pro5
This adds PCIe endpoint controller and PHY nodes for Pro5 SoC,
and also adds pinctrl node for PCIe.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-10 10:31:44 +09:00
Kunihiko Hayashi
656d648268 ARM: dts: uniphier: Rename ethphy node to ethernet-phy
This renames the node name "ethphy" to "ethernet-phy" according to
Documentation/devicetree/bindings/net/mdio.yaml.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-10 10:31:44 +09:00
Krzysztof Kozlowski
f2b56a6b2b ARM: dts: ste: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200626080552.3627-1-krzk@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 14:45:39 +02:00
Krzysztof Kozlowski
f7f7a8f4eb ARM: dts: arm-realview: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200626080534.3400-1-krzk@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 14:44:35 +02:00
Lee Jones
206c01d1ec ARM: dts: ux500: Supply nodes for the other 2 AB8500 PWM devices
As per 'struct mfd_cell ab8500_devs[]' there are not 1, but 3 PWM
devices on the AB8500.  Until now, each of them have referenced
the same Device Tree node.  This change ensures each device has
their own.

Due to recent `dtc` checks [0], nodes cannot share the same node
name, so we are forced to rename the affected nodes by appending
their associated numeric 'bank ID'.

[0] ste-ab8500.dtsi:210.16-214.7: ERROR (duplicate_node_names):
      /soc/prcmu@80157000/ab8500/ab8500-pwm: Duplicate node name

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20200622083432.1491715-1-lee.jones@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 14:11:24 +02:00
Nick Reitemeyer
6fc1ed271f ARM: dts: ux500: samsung-golden: Add touchkey
Adds support for the back and menu keys on golden.

Signed-off-by: Nick Reitemeyer <nick.reitemeyer@web.de>
Tested-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200621193822.133683-2-nick.reitemeyer@web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 14:09:06 +02:00
Drew Fustini
27c90e5e48 ARM: dts: am33xx-l4: change #pinctrl-cells from 1 to 2
Increase #pinctrl-cells to 2 so that mux and conf be kept separate. This
requires the AM33XX_PADCONF macro in omap.h to also be modified to keep pin
conf and pin mux values separate.

Signed-off-by: Drew Fustini <drew@beagleboard.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Link: https://lore.kernel.org/r/20200701013320.130441-3-drew@beagleboard.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 12:58:20 +02:00
Masahiro Yamada
dec32861da ARM: dts: uniphier: give fixed port number to support card serial
Add this to the aliases node to make it more convenient.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-07 19:45:03 +09:00
Masahiro Yamada
e8b00104ff ARM: dts: uniphier: rename support card serial node to fix schema warning
Since commit e69f5dc623 ("dt-bindings: serial: Convert 8250 to
json-schema"), the schema for "ns16550a" is checked.

'make ARCH=arm dtbs_check' emits the following warning:

  uart@b0000: $nodename:0: 'uart@b0000' does not match '^serial(@[0-9a-f,]+)*$'

Rename the node to follow the pattern defined in
Documentation/devicetree/bindings/serial/serial.yaml

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-07 18:36:04 +09:00
Masahiro Yamada
b5021cf9ce ARM: dts: uniphier: add interrupts to support card serial
Since commit e69f5dc623 ("dt-bindings: serial: Convert 8250 to
json-schema"), the schema for "ns16550a" is checked.

Since then, 'make ARCH=arm dtbs_check' is so noisy because the
required property 'interrupts' is missing.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-07 18:35:42 +09:00
Krzysztof Kozlowski
f2ab263105 ARM: dts: exynos: Define fixed regulators in root node for consistency in SMDK5420
Remove the regulators node and define fixed regulators directly under
the root node.  This makes SMDK5420 board consistent with other Exynos
boards.

Name the fixed regulator nodes consistently.

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-07 08:50:37 +02:00
Krzysztof Kozlowski
93be875989 ARM: dts: exynos: Define fixed regulators in root node for consistency in Arndale
Remove the regulators node and define fixed regulators directly under
the root node.  This makes Exynos5250 Arndale board consistent with
other Exynos boards.

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-07 08:50:37 +02:00
Krzysztof Kozlowski
2999f0a9ef ARM: dts: exynos: Define fixed regulators in root node for consistency in Origen
Remove the regulators node and define fixed regulators directly under
the root node.  This makes Exynos4412 Origen board consistent with other
Exynos boards.

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-07 08:50:36 +02:00
Krzysztof Kozlowski
f91423e9de ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings
There is no need to keep DMA controller nodes under AMBA bus node.
Remove the "amba" node to fix dtschema warnings like:

    amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
2020-07-07 08:48:58 +02:00
Florian Fainelli
aee13efe44 Maxime Ripard introduces two new clock providers into RPi4's device tree:
- The first one based on the enhancements made to clk-raspberrypi, which
   is now registered trough DT and provides control over the whole range
   of firmware based clocks.
 
 - The second one based on the new clk-bcm2711-dvp driver, which gates
   the clocks and reset signals that feed into RPi4's HDMI0/1 blocks.
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Merge tag 'tags/bcm2835-dt-next-2020-07-06' into devicetree/next

Maxime Ripard introduces two new clock providers into RPi4's device tree:

- The first one based on the enhancements made to clk-raspberrypi, which
  is now registered trough DT and provides control over the whole range
  of firmware based clocks.

- The second one based on the new clk-bcm2711-dvp driver, which gates
  the clocks and reset signals that feed into RPi4's HDMI0/1 blocks.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-07-06 21:56:00 -07:00
Krzysztof Kozlowski
c4f294fd2f ARM: dts: bcm: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache@22000: $nodename:0:
        'l2-cache@22000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-07-06 21:55:57 -07:00
Rafał Miłecki
99e5a32902 ARM: dts: BCM5301X: Specify switch ports for Luxul devices
All those devices use standard BCM53011 (rev 5) or BCM53012 (rev 0).

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-07-06 21:55:57 -07:00
Masahiro Yamada
893ab00439 kbuild: remove cc-option test of -fno-stack-protector
Some Makefiles already pass -fno-stack-protector unconditionally.
For example, arch/arm64/kernel/vdso/Makefile, arch/x86/xen/Makefile.

No problem report so far about hard-coding this option. So, we can
assume all supported compilers know -fno-stack-protector.

GCC 4.8 and Clang support this option (https://godbolt.org/z/_HDGzN)

Get rid of cc-option from -fno-stack-protector.

Remove CONFIG_CC_HAS_STACKPROTECTOR_NONE, which is always 'y'.

Note:
arch/mips/vdso/Makefile adds -fno-stack-protector twice, first
unconditionally, and second conditionally. I removed the second one.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
2020-07-07 11:13:10 +09:00
Maxime Ripard
25c6f39607 ARM: dts: bcm2711: Add HDMI DVP
Now that we have a driver for the DVP, let's add its DT node.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/e22222ca7f41b960e9bb1a31e0dd2de95b8c0cd1.1591867332.git-series.maxime@cerno.tech
2020-07-06 18:52:01 +02:00
Maxime Ripard
92025b90f1
ARM: dts sunxi: Relax a bit the CMA pool allocation range
The hardware codec on the A10, A10s, A13 and A20 needs buffer in the
first 256MB of RAM. This was solved by setting the CMA pool at a fixed
address in that range.

However, in recent kernels there's something else that comes in and
reserve some range that end up conflicting with our default pool
requirement, and thus makes its reservation fail.

The video codec will then use buffers from the usual default pool,
outside of the range it can access, and will fail to decode anything.

Since we're only concerned about that 256MB, we can however relax the
allocation to just specify the range that's allowed, and not try to
enforce a specific address.

Fixes: 5949bc5602 ("ARM: dts: sun4i-a10: Add Video Engine and reserved memory nodes")
Fixes: 9604320101 ("ARM: dts: sun5i: Add Video Engine and reserved memory nodes")
Fixes: c2a641a748 ("ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodes")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20200704130829.34297-1-maxime@cerno.tech
2020-07-06 15:09:40 +02:00
Krzysztof Kozlowski
01ff9ff323 ARM: dts: exynos: Fix missing empty reg/ranges property regulators on Trats
Remove the regulators node entirely because its children do not have any
unit addresses.  This fixes DTC warning:

    Warning (simple_bus_reg): /regulators/regulator-0: missing or empty reg/ranges property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
2020-07-03 19:57:51 +02:00
Kuninori Morimoto
eb83aa46dc
ARM: dts: motorola-mapphone-common: remove unneeded "simple-graph-card"
Audio Graph Card is using "audio-graph-card" prefix instead of
"simple-graph-card", and moreover "widgets / routing" doesn't need it.
This patch removes unsupported "simple-graph-card" prefix from
motorola-mapphone-common.dtsi and vendor-prefixes.yaml.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/87r1ub39hq.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-01 17:21:08 +01:00
Merlijn Wajer
ed3e98e919 ARM: dts: n900: remove mmc1 card detect gpio
Instead, expose the key via the input framework, as SW_MACHINE_COVER

The chip-detect GPIO is actually detecting if the cover is closed.
Technically it's possible to use the SD card with open cover. The
only downside is risk of battery falling out and user being able
to physically remove the card.

The behaviour of SD card not being available when the device is
open is unexpected and creates more problems than it solves. There
is a high chance, that more people accidentally break their rootfs
by opening the case without physically removing the card.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Merlijn Wajer <merlijn@wizzup.org>
Link: https://lore.kernel.org/r/20200612125402.18393-3-merlijn@wizzup.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2020-06-30 12:06:51 -07:00
Krzysztof Kozlowski
54320dcaa2 ARM: dts: meson: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
     l2-cache-controller@c4200000: $nodename:0:
         'l2-cache-controller@c4200000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200626080626.4080-1-krzk@kernel.org
2020-06-29 16:08:00 -07:00
Drew Fustini
e14d2c7663 ARM: dts: am335x-pocketbeagle: add gpio-line-names
The BeagleBoard.org PocketBeagle has P1 and P2 headers [0] which expose
many of the TI AM3358 SoC balls to stacking expansion boards called
"capes", or to other external connections like jumper wires connected
to a breadboard.

Note: the AM3358 die is actually embedded inside of the OSD335x-SM
System-in-Package (SiP) [1] but that is irrelevant to the gpio driver.

Many of the P1 and P2 header pins can muxed to a GPIO line.  The
gpio-line-names describe which P1 or P2 pin that line goes to and the
default mux for that P1 or P2 pin if it is not GPIO.

Some GPIO lines are named "[NC]" as the corresponding balls are not
routed to anything on the PCB.

The goal for these names is to make it easier for a user viewing the
output of gpioinfo to determine which P1 or P2 pin is connected to a
GPIO line.  The output of gpioinfo on a PocketBeagle would be:

gpiochip0 - 32 lines:
	line   0:       "[NC]"       unused   input  active-high
	line   1:       "[NC]"       unused   input  active-high
	line   2: "P1.08 [SPI0_CLK]" unused input active-high
	line   3: "P1.10 [SPI0_MISO]" unused input active-high
	line   4: "P1.12 [SPI0_MOSI]" unused input active-high
	line   5: "P1.06 [SPI0_CS]" unused input active-high
	line   6:  "[MMC0_CD]"         "cd"   input   active-low [used]
	line   7: "P2.29 [SPI1_CLK]" unused input active-high
	line   8:  "[SYSBOOT]"       unused   input  active-high
	line   9:  "[SYSBOOT]"       unused   input  active-high
	line  10:  "[SYSBOOT]"       unused   input  active-high
	line  11:  "[SYSBOOT]"       unused   input  active-high
	line  12: "P1.26 [I2C2_SDA]" unused input active-high
	line  13: "P1.28 [I2C2_SCL]" unused input active-high
	line  14: "P2.11 [I2C1_SDA]" unused input active-high
	line  15: "P2.09 [I2C1_SCL]" unused input active-high
	line  16:       "[NC]"       unused   input  active-high
	line  17:       "[NC]"       unused   input  active-high
	line  18:       "[NC]"       unused   input  active-high
	line  19: "P2.31 [SPI1_CS]" unused input active-high
	line  20: "P1.20 [PRU0.16]" unused input active-high
	line  21:       "[NC]"       unused   input  active-high
	line  22:       "[NC]"       unused   input  active-high
	line  23:      "P2.03"       unused   input  active-high
	line  24:       "[NC]"       unused   input  active-high
	line  25:       "[NC]"       unused   input  active-high
	line  26:      "P1.34"       unused   input  active-high
	line  27:      "P2.19"       unused   input  active-high
	line  28:       "[NC]"       unused   input  active-high
	line  29:       "[NC]"       unused   input  active-high
	line  30: "P2.05 [UART4_RX]" unused input active-high
	line  31: "P2.07 [UART4_TX]" unused input active-high
gpiochip1 - 32 lines:
	line   0:       "[NC]"       unused   input  active-high
	line   1:       "[NC]"       unused   input  active-high
	line   2:       "[NC]"       unused   input  active-high
	line   3:       "[NC]"       unused   input  active-high
	line   4:       "[NC]"       unused   input  active-high
	line   5:       "[NC]"       unused   input  active-high
	line   6:       "[NC]"       unused   input  active-high
	line   7:       "[NC]"       unused   input  active-high
	line   8:       "[NC]"       unused   input  active-high
	line   9: "P2.25 [SPI1_MOSI]" unused input active-high
	line  10: "P1.32 [UART0_RX]" unused input active-high
	line  11: "P1.30 [UART0_TX]" unused input active-high
	line  12:      "P2.24"       unused   input  active-high
	line  13:      "P2.33"       unused   input  active-high
	line  14:      "P2.22"       unused   input  active-high
	line  15:      "P2.18"       unused   input  active-high
	line  16:       "[NC]"       unused   input  active-high
	line  17:       "[NC]"       unused   input  active-high
	line  18: "P2.01 [PWM1A]" unused input active-high
	line  19:       "[NC]"       unused   input  active-high
	line  20:      "P2.10"       unused   input  active-high
	line  21: "[USR LED 0]" "beaglebone:green:usr0" output active-high [used]
	line  22: "[USR LED 1]" "beaglebone:green:usr1" output active-high [used]
	line  23: "[USR LED 2]" "beaglebone:green:usr2" output active-high [used]
	line  24: "[USR LED 3]" "beaglebone:green:usr3" output active-high [used]
	line  25:      "P2.06"       unused   input  active-high
	line  26:      "P2.04"       unused   input  active-high
	line  27:      "P2.02"       unused   input  active-high
	line  28:      "P2.08"       unused   input  active-high
	line  29:       "[NC]"       unused   input  active-high
	line  30:       "[NC]"       unused   input  active-high
	line  31:       "[NC]"       unused   input  active-high
gpiochip2 - 32 lines:
	line   0:      "P2.20"       unused   input  active-high
	line   1:      "P2.17"       unused   input  active-high
	line   2:       "[NC]"       unused   input  active-high
	line   3:       "[NC]"       unused   input  active-high
	line   4:       "[NC]"       unused   input  active-high
	line   5: "[EEPROM_WP]" unused input active-high
	line   6:  "[SYSBOOT]"       unused   input  active-high
	line   7:  "[SYSBOOT]"       unused   input  active-high
	line   8:  "[SYSBOOT]"       unused   input  active-high
	line   9:  "[SYSBOOT]"       unused   input  active-high
	line  10:  "[SYSBOOT]"       unused   input  active-high
	line  11:  "[SYSBOOT]"       unused   input  active-high
	line  12:  "[SYSBOOT]"       unused   input  active-high
	line  13:  "[SYSBOOT]"       unused   input  active-high
	line  14:  "[SYSBOOT]"       unused   input  active-high
	line  15:  "[SYSBOOT]"       unused   input  active-high
	line  16:  "[SYSBOOT]"       unused   input  active-high
	line  17:  "[SYSBOOT]"       unused   input  active-high
	line  18:       "[NC]"       unused   input  active-high
	line  19:       "[NC]"       unused   input  active-high
	line  20:       "[NC]"       unused   input  active-high
	line  21:       "[NC]"       unused   input  active-high
	line  22: "P2.35 [AIN5]" unused input active-high
	line  23: "P1.02 [AIN6]" unused input active-high
	line  24: "P1.35 [PRU1.10]" unused input active-high
	line  25: "P1.04 [PRU1.11]" unused input active-high
	line  26: "[MMC0_DAT3]" unused input active-high
	line  27: "[MMC0_DAT2]" unused input active-high
	line  28: "[MMC0_DAT1]" unused input active-high
	line  29: "[MMC0_DAT0]" unused input active-high
	line  30: "[MMC0_CLK]"       unused   input  active-high
	line  31: "[MMC0_CMD]"       unused   input  active-high
gpiochip3 - 32 lines:
	line   0:       "[NC]"       unused   input  active-high
	line   1:       "[NC]"       unused   input  active-high
	line   2:       "[NC]"       unused   input  active-high
	line   3:       "[NC]"       unused   input  active-high
	line   4:       "[NC]"       unused   input  active-high
	line   5: "[I2C0_SDA]"       unused   input  active-high
	line   6: "[I2C0_SCL]"       unused   input  active-high
	line   7:     "[JTAG]"       unused   input  active-high
	line   8:     "[JTAG]"       unused   input  active-high
	line   9:       "[NC]"       unused   input  active-high
	line  10:       "[NC]"       unused   input  active-high
	line  11:       "[NC]"       unused   input  active-high
	line  12:       "[NC]"       unused   input  active-high
	line  13: "P1.03 [USB1]" unused input active-high
	line  14: "P1.36 [PWM0A]" unused input active-high
	line  15: "P1.33 [PRU0.1]" unused input active-high
	line  16: "P2.32 [PRU0.2]" unused input active-high
	line  17: "P2.30 [PRU0.3]" unused input active-high
	line  18: "P1.31 [PRU0.4]" unused input active-high
	line  19: "P2.34 [PRU0.5]" unused input active-high
	line  20: "P2.28 [PRU0.6]" unused input active-high
	line  21: "P1.29 [PRU0.7]" unused input active-high
	line  22:       "[NC]"       unused   input  active-high
	line  23:       "[NC]"       unused   input  active-high
	line  24:       "[NC]"       unused   input  active-high
	line  25:       "[NC]"       unused   input  active-high
	line  26:       "[NC]"       unused   input  active-high
	line  27:       "[NC]"       unused   input  active-high
	line  28:       "[NC]"       unused   input  active-high
	line  29:       "[NC]"       unused   input  active-high
	line  30:       "[NC]"       unused   input  active-high
	line  31:       "[NC]"       unused   input  active-high

[0] https://github.com/beagleboard/pocketbeagle/wiki/System-Reference-Manual#71_Expansion_Header_Connectors
[1] https://octavosystems.com/app_notes/osd335x-family-pin-assignments/

Reviewed-by: Jason Kridner <jason@beagleboard.org>
Reviewed-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29 11:24:27 -07:00
Drew Fustini
aafd897a5a ARM: dts: am335x-boneblack: add gpio-line-names
The BeagleBone Black has P8 and P9 headers [0] which expose many of the
AM3358 ZCZ SoC balls to stacking expansion boards called "capes", or to
other external connections like jumper wires connected to a breadboard.
BeagleBone users will often refer to the "Cape Exanpsion Headers" pin
diagram [1] as it is in the "Bone101" getting started tutorial. [2]

Most of the P8 and P9 header pins can muxed to a GPIO line.  The
gpio-line-names describe which P8 or P9 pin that line goes to and the
default mux for that P8 or P9 pin if it is not GPIO.

For example, gpiochip 1 line 0 is connected to P8 header pin 25 (P8_25)
however the default device tree has the corresponding BGA ball (ZCZ U7)
muxed to mmc1_dat0 as it is used for the on-board eMMC chip.  For that
GPIO line to be used, one would need to modify the device tree to
disable the eMMC and change the pin mux for that ball to GPIO mode.

Some of the AM3358 ZCZ balls corresponding to GPIO lines are not routed
to a P8 or P9 header, but are instead wired to some peripheral device
like on-board eMMC, HDMI framer IC, or status LEDs.  Those names are in
brackets to denote those GPIO lines can not be used.

Some GPIO lines are named "[NC]" as the corresponding balls are not
routed to anything on the PCB.

The goal for these names is to make it easier for a user viewing the
output of gpioinfo to determine which P8 or P9 pin is connected to a
GPIO line.  The output of gpioinfo on a BeagleBone Black would be:

gpiochip0 - 32 lines:
	line   0: "[ethernet]"       unused   input  active-high
	line   1: "[ethernet]"       unused   input  active-high
	line   2: "P9_22 [spi0_sclk]" unused input active-high
	line   3: "P9_21 [spi0_d0]" unused input active-high
	line   4: "P9_18 [spi0_d1]" unused input active-high
	line   5: "P9_17 [spi0_cs0]" unused input active-high
	line   6:  "[sd card]"         "cd"   input   active-low [used]
	line   7: "P9_42A [ecappwm0]" unused input active-high
	line   8: "P8_35 [hdmi]" unused input active-high
	line   9: "P8_33 [hdmi]" unused input active-high
	line  10: "P8_31 [hdmi]" unused input active-high
	line  11: "P8_32 [hdmi]" unused input active-high
	line  12: "P9_20 [i2c2_sda]" unused input active-high
	line  13: "P9_19 [i2c2_scl]" unused input active-high
	line  14: "P9_26 [uart1_rxd]" unused input active-high
	line  15: "P9_24 [uart1_txd]" unused input active-high
	line  16: "[ethernet]"       unused   input  active-high
	line  17: "[ethernet]"       unused   input  active-high
	line  18:      "[usb]"       unused   input  active-high
	line  19:     "[hdmi]"       unused   input  active-high
	line  20:     "P9_41B"       unused   input  active-high
	line  21: "[ethernet]"       unused   input  active-high
	line  22: "P8_19 [ehrpwm2a]" unused input active-high
	line  23: "P8_13 [ehrpwm2b]" unused input active-high
	line  24:       "[NC]"       unused   input  active-high
	line  25:       "[NC]"       unused   input  active-high
	line  26:      "P8_14"       unused   input  active-high
	line  27:      "P8_17"       unused   input  active-high
	line  28: "[ethernet]"       unused   input  active-high
	line  29: "[ethernet]"       unused   input  active-high
	line  30: "P9_11 [uart4_rxd]" unused input active-high
	line  31: "P9_13 [uart4_txd]" unused input active-high
gpiochip1 - 32 lines:
	line   0: "P8_25 [emmc]" unused input active-high
	line   1:     "[emmc]"       unused   input  active-high
	line   2: "P8_5 [emmc]" unused input active-high
	line   3: "P8_6 [emmc]" unused input active-high
	line   4: "P8_23 [emmc]" unused input active-high
	line   5: "P8_22 [emmc]" unused input active-high
	line   6: "P8_3 [emmc]" unused input active-high
	line   7: "P8_4 [emmc]" unused input active-high
	line   8:       "[NC]"       unused   input  active-high
	line   9:       "[NC]"       unused   input  active-high
	line  10:       "[NC]"       unused   input  active-high
	line  11:       "[NC]"       unused   input  active-high
	line  12:      "P8_12"       unused   input  active-high
	line  13:      "P8_11"       unused   input  active-high
	line  14:      "P8_16"       unused   input  active-high
	line  15:      "P8_15"       unused   input  active-high
	line  16:     "P9_15A"       unused   input  active-high
	line  17:      "P9_23"       unused   input  active-high
	line  18: "P9_14 [ehrpwm1a]" unused input active-high
	line  19: "P9_16 [ehrpwm1b]" unused input active-high
	line  20:     "[emmc]"       unused   input  active-high
	line  21: "[usr0 led]" "beaglebone:green:heartbeat" output active-high [used]
	line  22: "[usr1 led]" "beaglebone:green:mmc0" output active-high [used]
	line  23: "[usr2 led]" "beaglebone:green:usr2" output active-high [used]
	line  24: "[usr3 led]" "beaglebone:green:usr3" output active-high [used]
	line  25:     "[hdmi]"  "interrupt"   input  active-high [used]
	line  26:      "[usb]"       unused   input  active-high
	line  27: "[hdmi audio]" "enable" output active-high [used]
	line  28:      "P9_12"       unused   input  active-high
	line  29:      "P8_26"       unused   input  active-high
	line  30: "P8_21 [emmc]" unused input active-high
	line  31: "P8_20 [emmc]" unused input active-high
gpiochip2 - 32 lines:
	line   0:     "P9_15B"       unused   input  active-high
	line   1:      "P8_18"       unused   input  active-high
	line   2:       "P8_7"       unused   input  active-high
	line   3:       "P8_8"       unused   input  active-high
	line   4:      "P8_10"       unused   input  active-high
	line   5:       "P8_9"       unused   input  active-high
	line   6: "P8_45 [hdmi]" unused input active-high
	line   7: "P8_46 [hdmi]" unused input active-high
	line   8: "P8_43 [hdmi]" unused input active-high
	line   9: "P8_44 [hdmi]" unused input active-high
	line  10: "P8_41 [hdmi]" unused input active-high
	line  11: "P8_42 [hdmi]" unused input active-high
	line  12: "P8_39 [hdmi]" unused input active-high
	line  13: "P8_40 [hdmi]" unused input active-high
	line  14: "P8_37 [hdmi]" unused input active-high
	line  15: "P8_38 [hdmi]" unused input active-high
	line  16: "P8_36 [hdmi]" unused input active-high
	line  17: "P8_34 [hdmi]" unused input active-high
	line  18: "[ethernet]"       unused   input  active-high
	line  19: "[ethernet]"       unused   input  active-high
	line  20: "[ethernet]"       unused   input  active-high
	line  21: "[ethernet]"       unused   input  active-high
	line  22: "P8_27 [hdmi]" unused input active-high
	line  23: "P8_29 [hdmi]" unused input active-high
	line  24: "P8_28 [hdmi]" unused input active-high
	line  25: "P8_30 [hdmi]" unused input active-high
	line  26:     "[emmc]"       unused   input  active-high
	line  27:     "[emmc]"       unused   input  active-high
	line  28:     "[emmc]"       unused   input  active-high
	line  29:     "[emmc]"       unused   input  active-high
	line  30:     "[emmc]"       unused   input  active-high
	line  31:     "[emmc]"       unused   input  active-high
gpiochip3 - 32 lines:
	line   0: "[ethernet]"       unused   input  active-high
	line   1: "[ethernet]"       unused   input  active-high
	line   2: "[ethernet]"       unused   input  active-high
	line   3: "[ethernet]"       unused   input  active-high
	line   4: "[ethernet]"       unused   input  active-high
	line   5:     "[i2c0]"       unused   input  active-high
	line   6:     "[i2c0]"       unused   input  active-high
	line   7:      "[emu]"       unused   input  active-high
	line   8:      "[emu]"       unused   input  active-high
	line   9: "[ethernet]"       unused   input  active-high
	line  10: "[ethernet]"       unused   input  active-high
	line  11:       "[NC]"       unused   input  active-high
	line  12:       "[NC]"       unused   input  active-high
	line  13:      "[usb]"       unused   input  active-high
	line  14: "P9_31 [spi1_sclk]" unused input active-high
	line  15: "P9_29 [spi1_d0]" unused input active-high
	line  16: "P9_30 [spi1_d1]" unused input active-high
	line  17: "P9_28 [spi1_cs0]" unused input active-high
	line  18: "P9_42B [ecappwm0]" unused input active-high
	line  19:      "P9_27"       unused   input  active-high
	line  20:     "P9_41A"       unused   input  active-high
	line  21:      "P9_25"       unused   input  active-high
	line  22:       "[NC]"       unused   input  active-high
	line  23:       "[NC]"       unused   input  active-high
	line  24:       "[NC]"       unused   input  active-high
	line  25:       "[NC]"       unused   input  active-high
	line  26:       "[NC]"       unused   input  active-high
	line  27:       "[NC]"       unused   input  active-high
	line  28:       "[NC]"       unused   input  active-high
	line  29:       "[NC]"       unused   input  active-high
	line  30:       "[NC]"       unused   input  active-high
	line  31:       "[NC]"       unused   input  active-high

[0] https://git.io/JfgOd
[1] https://beagleboard.org/capes
[1] https://beagleboard.org/Support/bone101
[2] https://beagleboard.org/static/images/cape-headers.png

Reviewed-by: Jason Kridner <jason@beagleboard.org>
Reviewed-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29 11:24:27 -07:00
Drew Fustini
ff82009fcc ARM: dts: am33xx-l4: add gpio-ranges
Add gpio-ranges properties to the gpio controller nodes.

These gpio-ranges were created based on "Table 9-10. CONTROL_MODULE
REGISTERS" in the  "AM335x Technical Reference Manual" [0] and "Table
4-2. Pin Attributes" in the "AM335x Sitara Processor datasheet" [1].
A csv file with this data is available for reference [2].

These mappings are valid for all SoC's that are using am33xx-l4.dtsi.
In addition, the only TI AM33xx parts that actually exist are [0]:
AM3351, AM3352, AM3354, AM3356, AM3357, AM3358, AM3359

These gpio-ranges properties should be added as they describe the
relationship between a gpio line and pin control register that exists
in the hardware.  For example, GPMC_A0 pin has mode 7 which is labeled
gpio1_16. conf_gpmc_a0 register is at offset 840h which makes it pin 16.

[0] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf
[1] http://www.ti.com/lit/ds/symlink/am3358.pdf
[2] https://gist.github.com/pdp7/6ffaddc8867973c1c3e8612cfaf72020
[3] http://www.ti.com/processors/sitara-arm/am335x-cortex-a8/overview.html

Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29 11:24:26 -07:00
Suman Anna
96cafa00c5 ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxes
The IPU and DSP remote processors use sub-mailbox nodes only from a
limited set of System Mailboxes 5 and 6 to achieve the Remote Processor
Messaging (RPMsg) communication stack between the MPU host processor
and the respective remote processor. These are all defined and enabled
through the inherited common dra74-ipu-dsp-common.dtsi file.

The other System Mailboxes do not define any actual sub-mailboxes, so
they serve no purpose and can all be safely dropped.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29 11:24:23 -07:00
Suman Anna
4873b668d6 ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocs
Assign the previously added CMA reserved memory nodes to the respective
IPU and DSP rproc device nodes, and enable these rproc nodes so that
these remote processors can be booted on the AM5729 BeagleBone AI board.

The addresses and sizes of the CMA pools are identical to those used on
various other TI AM572x/AM574x based boards. The mailboxes, timers and
watchdog-timers for all these remoteprocs are inherited by including the
common dra72-ipu-dsp-common.dtsi file.

An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29 11:24:23 -07:00
Krzysztof Kozlowski
2d62edd65e ARM: dts: am: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache-controller@48242000: $nodename:0: 'l2-cache-controller@48242000'
        does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29 11:13:49 -07:00
Krzysztof Kozlowski
01df6238fa ARM: dts: omap: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
    l2-cache-controller@48242000: $nodename:0:
        'l2-cache-controller@48242000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29 11:13:43 -07:00
Adam Ford
c312f06631 ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2
Various OMAP3 boards have two AES blocks, but only one is currently
available, because the hwmods are only configured for one.

This patch migrates the hwmods for the AES engine to sysc-omap2
which allows the second AES crypto engine to become available.

  omap-aes 480a6000.aes1: OMAP AES hw accel rev: 2.6
  omap-aes 480a6000.aes1: will run requests pump with realtime priority
  omap-aes 480c5000.aes2: OMAP AES hw accel rev: 2.6
  omap-aes 480c5000.aes2: will run requests pump with realtime priority

Signed-off-by: Adam Ford <aford173@gmail.com>
[tony@atomide.com: updated to disable both aes_targets on hs boards]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29 10:22:47 -07:00
Ulrich Hecht
b7f13b9147 ARM: dts: r8a7778: Enable IRLM setup via DT
Make use of the IRLM setup feature in the renesas-intc-irqpin driver.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/1441726946-30131-3-git-send-email-ulrich.hecht+renesas@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-29 10:21:54 +02:00
Linus Torvalds
f7db192b2d ARM: OMAP fixes for v5.8
The OMAP developers are particularly active at hunting down regressions,
 so this is a separate branch with OMAP specific fixes for the v5.8:
 
 As Tony explains
  "The recent display subsystem (DSS) related platform data changes
   caused display related regressions for suspend and resume. Looks like
   I only tested suspend and resume before dropping the legacy platform
   data, and forgot to test it after dropping it. Turns out the main issue
   was that we no longer have platform code calling pm_runtime_suspend
   for DSS like we did for the legacy platform data case, and that fix
   is still being discussed on the dri-devel list and will get merged
   separately. The DSS related testing exposed a pile other other display
   related issues that also need fixing though":
 
  - Fix ti-sysc optional clock handling and reset status checks
    for devices that reset automatically in idle like DSS
 
  - Ignore ti-sysc clockactivity bit unless separately requested
    to avoid unexpected performance issues
 
  - Init ti-sysc framedonetv_irq to true and disable for am4
 
  - Avoid duplicate DSS reset for legacy mode with dts data
 
  - Remove LCD timings for am4 as they cause warnings now that we're
    using generic panels
 
 Other OMAP changes from Tony include:
 
  - Fix omap_prm reset deassert as we still have drivers setting the
    pm_runtime_irq_safe() flag
 
  - Flush posted write for ti-sysc enable and disable
 
  - Fix droid4 spi related errors with spi flags
 
  - Fix am335x USB range and a typo for softreset
 
  - Fix dra7 timer nodes for clocks for IPU and DSP
 
  - Drop duplicate mailboxes after mismerge for dra7
 
  - Prevent pocketgeagle header line signal from accidentally setting
    micro-SD write protection signal by removing the default mux
 
  - Fix NFSroot flakeyness after resume for duover by switching the
    smsc911x gpio interrupt to back to level sensitive
 
  - Fix regression for omap4 clockevent source after recent system
    timer changes
 
  - Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid"
    phy-mode
 
  - One patch to convert am3/am4 DT files to use the regular sdhci-omap
    driver instead of the old hsmmc driver, this was meant for the
    merge window but got lost in the process.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-omap-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM OMAP fixes from Arnd Bergmann:
 "The OMAP developers are particularly active at hunting down
  regressions, so this is a separate branch with OMAP specific
  fixes for v5.8:

  As Tony explains
    "The recent display subsystem (DSS) related platform data changes
     caused display related regressions for suspend and resume. Looks
     like I only tested suspend and resume before dropping the legacy
     platform data, and forgot to test it after dropping it. Turns out
     the main issue was that we no longer have platform code calling
     pm_runtime_suspend for DSS like we did for the legacy platform data
     case, and that fix is still being discussed on the dri-devel list
     and will get merged separately. The DSS related testing exposed a
     pile other other display related issues that also need fixing
     though":

   - Fix ti-sysc optional clock handling and reset status checks for
     devices that reset automatically in idle like DSS

   - Ignore ti-sysc clockactivity bit unless separately requested to
     avoid unexpected performance issues

   - Init ti-sysc framedonetv_irq to true and disable for am4

   - Avoid duplicate DSS reset for legacy mode with dts data

   - Remove LCD timings for am4 as they cause warnings now that we're
     using generic panels

  Other OMAP changes from Tony include:

   - Fix omap_prm reset deassert as we still have drivers setting the
     pm_runtime_irq_safe() flag

   - Flush posted write for ti-sysc enable and disable

   - Fix droid4 spi related errors with spi flags

   - Fix am335x USB range and a typo for softreset

   - Fix dra7 timer nodes for clocks for IPU and DSP

   - Drop duplicate mailboxes after mismerge for dra7

   - Prevent pocketgeagle header line signal from accidentally setting
     micro-SD write protection signal by removing the default mux

   - Fix NFSroot flakeyness after resume for duover by switching the
     smsc911x gpio interrupt to back to level sensitive

   - Fix regression for omap4 clockevent source after recent system
     timer changes

   - Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid"
     phy-mode

   - One patch to convert am3/am4 DT files to use the regular sdhci-omap
     driver instead of the old hsmmc driver, this was meant for the
     merge window but got lost in the process"

* tag 'arm-omap-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (21 commits)
  ARM: dts: am5729: beaglebone-ai: fix rgmii phy-mode
  ARM: dts: Fix omap4 system timer source clocks
  ARM: dts: Fix duovero smsc interrupt for suspend
  ARM: dts: am335x-pocketbeagle: Fix mmc0 Write Protect
  Revert "bus: ti-sysc: Increase max softreset wait"
  ARM: dts: am437x-epos-evm: remove lcd timings
  ARM: dts: am437x-gp-evm: remove lcd timings
  ARM: dts: am437x-sk-evm: remove lcd timings
  ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes
  ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks
  ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag
  ARM: dts: Fix am33xx.dtsi USB ranges length
  bus: ti-sysc: Increase max softreset wait
  ARM: OMAP2+: Fix legacy mode dss_reset
  bus: ti-sysc: Fix uninitialized framedonetv_irq
  bus: ti-sysc: Ignore clockactivity unless specified as a quirk
  bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit
  ARM: dts: omap4-droid4: Fix spi configuration and increase rate
  bus: ti-sysc: Flush posted write on enable and disable
  soc: ti: omap-prm: use atomic iopoll instead of sleeping one
  ...
2020-06-28 14:57:14 -07:00
Arnd Bergmann
42d3f7e8da i.MX fixes for 5.8:
- Fix LDO1 and LDO2 voltage range for a couple of i.MX8M board device
   trees.
 - Fix i.MX8MP UID fuse offset in i.MX8M SoC driver.
 - Fix watchdog configuration in imx6ul-kontron device tree.
 - Fix one build warning seen on building soc-imx8m driver with
   x86_64-randconfig.
 - Add missing put_device() call for a couple of mach-imx PM functions.
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Merge tag 'imx-fixes-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.8:

- Fix LDO1 and LDO2 voltage range for a couple of i.MX8M board device
  trees.
- Fix i.MX8MP UID fuse offset in i.MX8M SoC driver.
- Fix watchdog configuration in imx6ul-kontron device tree.
- Fix one build warning seen on building soc-imx8m driver with
  x86_64-randconfig.
- Add missing put_device() call for a couple of mach-imx PM functions.

* tag 'imx-fixes-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx8m: fix build warning
  ARM: imx6: add missing put_device() call in imx6q_suspend_init()
  ARM: imx5: add missing put_device() call in imx_suspend_alloc_ocram()
  soc: imx8m: Correct i.MX8MP UID fuse offset
  ARM: dts: imx6ul-kontron: Change WDOG_ANY signal from push-pull to open-drain
  ARM: dts: imx6ul-kontron: Move watchdog from Kontron i.MX6UL/ULL board to SoM
  arm64: dts: imx8mm-beacon: Fix voltages on LDO1 and LDO2
  arm64: dts: imx8mn-ddr4-evk: correct ldo1/ldo2 voltage range
  arm64: dts: imx8mm-evk: correct ldo1/ldo2 voltage range

Link: https://lore.kernel.org/r/20200624111725.GA24312@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28 14:48:19 +02:00
Arnd Bergmann
275087fc3e This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.8, please pull the following:
 
 - Rafal adds a missing 'device_type' property to the Luxul XWC-2000
   required for the memory nodes to be correctly parsed by Linux
 
 - Matthew provides two fixes for the NSP SoCs, one to disable the PL330
   DMA controller by default since it can be left in reset by the
   bootloader and the second to correct the flow accelerator mailbox node
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Merge tag 'arm-soc/for-5.8/devicetree-fixes' of https://github.com/Broadcom/stblinux into arm/fixes

This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.8, please pull the following:

- Rafal adds a missing 'device_type' property to the Luxul XWC-2000
  required for the memory nodes to be correctly parsed by Linux

- Matthew provides two fixes for the NSP SoCs, one to disable the PL330
  DMA controller by default since it can be left in reset by the
  bootloader and the second to correct the flow accelerator mailbox node

* tag 'arm-soc/for-5.8/devicetree-fixes' of https://github.com/Broadcom/stblinux:
  ARM: dts: NSP: Correct FA2 mailbox node
  ARM: dts: NSP: Disable PL330 by default, add dma-coherent property
  ARM: dts: BCM5301X: Add missing memory "device_type" for Luxul XWC-2000

Link: https://lore.kernel.org/r/20200619202250.19029-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28 14:47:24 +02:00
Arnd Bergmann
d528945d77 Few dts fixes for omaps for v5.8
Few fixes for various devices:
 
 - Prevent pocketgeagle header line signal from accidentally setting
   micro-SD write protection signal by removing the default mux
 
 - Fix NFSroot flakeyness after resume for duover by switching the
   smsc911x gpio interrupt to back to level sensitive
 
 - Fix regression for omap4 clockevent source after recent system
   timer changes
 
 - Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid"
   phy-mode
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Merge tag 'omap-for-v5.8/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/omap-fixes

Few dts fixes for omaps for v5.8

Few fixes for various devices:

- Prevent pocketgeagle header line signal from accidentally setting
  micro-SD write protection signal by removing the default mux

- Fix NFSroot flakeyness after resume for duover by switching the
  smsc911x gpio interrupt to back to level sensitive

- Fix regression for omap4 clockevent source after recent system
  timer changes

- Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid"
  phy-mode

* tag 'omap-for-v5.8/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am5729: beaglebone-ai: fix rgmii phy-mode
  ARM: dts: Fix omap4 system timer source clocks
  ARM: dts: Fix duovero smsc interrupt for suspend
  ARM: dts: am335x-pocketbeagle: Fix mmc0 Write Protect

Link: https://lore.kernel.org/r/pull-1592499282-121092@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28 14:45:08 +02:00
Arnd Bergmann
8705ed2f72 Missed sdhci patch for am3 and am4
I forgot to send a pull request earlier for converting am3 and am4 to
 use sdhci-omap driver instead of the old omap_hsmmc driver.
 
 There was a display subsystem related suspend and resume regression found
 recently and looks like I forgot to send a pull request for this patch
 while debugging the regression. This patch has been tested without the
 display subsystem, and has been in Linux next for several weeks now, so
 would be good to have merged for v5.8.
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Merge tag 'omap-for-v5.8/dt-missed-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/omap-fixes

Missed sdhci patch for am3 and am4

I forgot to send a pull request earlier for converting am3 and am4 to
use sdhci-omap driver instead of the old omap_hsmmc driver.

There was a display subsystem related suspend and resume regression found
recently and looks like I forgot to send a pull request for this patch
while debugging the regression. This patch has been tested without the
display subsystem, and has been in Linux next for several weeks now, so
would be good to have merged for v5.8.

* tag 'omap-for-v5.8/dt-missed-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: Move am33xx and am43xx mmc nodes to sdhci-omap driver

Link: https://lore.kernel.org/r/pull-1591637467-607254@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28 14:44:41 +02:00
Arnd Bergmann
5b75f16f13 Fixes for omaps for v5.8
The recent display subsystem (DSS) related platform data changes caused
 display related regressions for suspend and resume. Looks like I only
 tested suspend and resume before dropping the legacy platform data, and
 forgot to test it after dropping it. Turns out the main issue was that
 we no longer have platform code calling pm_runtime_suspend for DSS like
 we did for the legacy platform data case, and that fix is still being
 discussed on the dri-devel list and will get merged separately. The DSS
 related testing exposed a pile other other display related issues that
 also need fixing though:
 
 - Fix ti-sysc optional clock handling and reset status checks
   for devices that reset automatically in idle like DSS
 
 - Ignore ti-sysc clockactivity bit unless separately requested
   to avoid unexpected performance issues
 
 - Init ti-sysc framedonetv_irq to true and disable for am4
 
 - Avoid duplicate DSS reset for legacy mode with dts data
 
 - Remove LCD timings for am4 as they cause warnings now that we're
   using generic panels
 
 Then there is a pile of other fixes not related to the DSS:
 
 - Fix omap_prm reset deassert as we still have drivers setting the
   pm_runtime_irq_safe() flag
 
 - Flush posted write for ti-sysc enable and disable
 
 - Fix droid4 spi related errors with spi flags
 
 - Fix am335x USB range and a typo for softreset
 
 - Fix dra7 timer nodes for clocks for IPU and DSP
 
 - Drop duplicate mailboxes after mismerge for dra7
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Merge tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.8

The recent display subsystem (DSS) related platform data changes caused
display related regressions for suspend and resume. Looks like I only
tested suspend and resume before dropping the legacy platform data, and
forgot to test it after dropping it. Turns out the main issue was that
we no longer have platform code calling pm_runtime_suspend for DSS like
we did for the legacy platform data case, and that fix is still being
discussed on the dri-devel list and will get merged separately. The DSS
related testing exposed a pile other other display related issues that
also need fixing though:

- Fix ti-sysc optional clock handling and reset status checks
  for devices that reset automatically in idle like DSS

- Ignore ti-sysc clockactivity bit unless separately requested
  to avoid unexpected performance issues

- Init ti-sysc framedonetv_irq to true and disable for am4

- Avoid duplicate DSS reset for legacy mode with dts data

- Remove LCD timings for am4 as they cause warnings now that we're
  using generic panels

Then there is a pile of other fixes not related to the DSS:

- Fix omap_prm reset deassert as we still have drivers setting the
  pm_runtime_irq_safe() flag

- Flush posted write for ti-sysc enable and disable

- Fix droid4 spi related errors with spi flags

- Fix am335x USB range and a typo for softreset

- Fix dra7 timer nodes for clocks for IPU and DSP

- Drop duplicate mailboxes after mismerge for dra7

* tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  Revert "bus: ti-sysc: Increase max softreset wait"
  ARM: dts: am437x-epos-evm: remove lcd timings
  ARM: dts: am437x-gp-evm: remove lcd timings
  ARM: dts: am437x-sk-evm: remove lcd timings
  ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes
  ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks
  ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag
  ARM: dts: Fix am33xx.dtsi USB ranges length
  bus: ti-sysc: Increase max softreset wait
  ARM: OMAP2+: Fix legacy mode dss_reset
  bus: ti-sysc: Fix uninitialized framedonetv_irq
  bus: ti-sysc: Ignore clockactivity unless specified as a quirk
  bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit
  ARM: dts: omap4-droid4: Fix spi configuration and increase rate
  bus: ti-sysc: Flush posted write on enable and disable
  soc: ti: omap-prm: use atomic iopoll instead of sleeping one

Link: https://lore.kernel.org/r/pull-1591889257-410830@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28 14:41:55 +02:00
Arnd Bergmann
d68ec1644d ARMv8 Juno/Vexpress/Fast Models fix for v5.8
Partial revert of some recent fixes to silence DTC warning which broke
 clocks on some Vexpress platforms resulting in boot issues.
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Merge tag 'juno-fix-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes

ARMv8 Juno/Vexpress/Fast Models fix for v5.8

Partial revert of some recent fixes to silence DTC warning which broke
clocks on some Vexpress platforms resulting in boot issues.

* tag 'juno-fix-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm: dts: vexpress: Move mcc node back into motherboard node

Link: https://lore.kernel.org/r/20200609180447.GB5732@bogus
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-27 00:16:44 +02:00
Codrin Ciubotariu
51139cc82c ARM: dts: at91: sama5d2_xplained: Remove pdmic node
The PDMIC needs PDM microphones to work. sama5d2 xplained doesn't have
such microphones, so there is no reason to enable PDMIC and take the
pins since there is no-one using them.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200618152845.682723-1-codrin.ciubotariu@microchip.com
2020-06-26 22:44:57 +02:00
Claudiu Beznea
5f6b33f463 ARM: dts: sam9x60: add rtt
Add RTT. Allong with it enable GBPR as it is requested by RTT.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/1591779936-18577-4-git-send-email-claudiu.beznea@microchip.com
2020-06-26 22:40:22 +02:00
Lad Prabhakar
4b0ee283de ARM: dts: r8a7742: Add MSIOF[0123] support
Add the DT nodes needed by MSIOF[0123] interfaces to the SoC dtsi.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1591736054-568-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-26 11:40:37 +02:00
Anand Moon
a184ea9f41 ARM: dts: exynos: Align L2 cache-controller nodename with dtschema
Fix dtschema warning message by changing nodename to 'cache-controller':

    DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/l2c2x0.yaml
    arch/arm/boot/dts/exynos4210-i9100.dt.yaml: l2-cache-controller@10502000:
	$nodename:0: 'l2-cache-controller@10502000' does not match '
	^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-06-26 09:11:12 +02:00
Maxime Ripard
63e58f2bb9 ARM: dts: bcm2711: Add firmware clocks node
Now that we have a clock driver for the clocks exposed by the firmware,
let's add the device tree nodes for it.

Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/9a6f113140b3115150bfb18ecb248a48d58562cf.1592210452.git-series.maxime@cerno.tech
2020-06-25 10:16:08 +02:00
Thierry Reding
f3de06b4fa ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
The SDHCI on Tegra30 is in fact not backwards-compatible with the
instantiation found on earlier SoCs. Drop the misleading compatible
string.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:46 +02:00
Thierry Reding
06227e3a0b ARM: tegra: The Tegra30 DC is not backwards-compatible
The display controller on Tegra30 is in fact not backwards-compatible
with the instantiation found on earlier SoCs. Drop the misleading
compatible string.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:46 +02:00
Thierry Reding
2f49988154 ARM: tegra: Remove spurious comma from node name
This was probably left there by mistake or perhaps was a typo in the
first place. Remove it.

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:46 +02:00
Thierry Reding
eb6563a681 ARM: tegra: Add parent clock to DSI output
The DSI output needs to specify a parent clock that will be used to
drive both the output and the display controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:46 +02:00
Thierry Reding
7fb099528b ARM: tegra: Use standard names for SRAM nodes
SRAM nodes should be named sram@<unit-address> to match the bindings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:45 +02:00
Thierry Reding
cea37ffc82 ARM: tegra: seaboard: Use standard battery bindings
Seaboard uses a non-existing, possibly obsoleted, binding for the
battery. Move to the standard binding which seems to be a super-
set of the odl binding.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:45 +02:00
Thierry Reding
eb711490c4 ARM: tegra: Use standard names for LED nodes
LED nodes should be named led-* to match the bindings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:45 +02:00
Thierry Reding
86b224beea ARM: tegra: Use numeric unit-addresses
Unit-addresses should be numeric. This fixes a validation failure seen
using the json-schema tooling.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:45 +02:00
Thierry Reding
90b1307ac5 ARM: tegra: medcom-wide: Remove extra panel power supply
Simple panels can only have a single power supply. The second listed
supply is not needed because it is also the input supply of the first
supply and therefore will always be on at the same time.

In retrospect the panel probably doesn't qualify as simple since it
apparently does need both of these supplies, even if in the case of the
Medcom Wide it isn't necessary to explicitly hook them up.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:44 +02:00
Thierry Reding
417668bcb0 ARM: tegra: Use proper unit-addresses for OPPs
Use commas rather than underscores to separate the various parts of the
unit-address in CPU OPPs to make them properly validate under the json-
schema bindings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:44 +02:00
Thierry Reding
f538588bdb ARM: tegra: Add missing clock-names for SDHCI controllers
The Tegra SDHCI controllers need to have a clock-names property
according to the bindings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:44 +02:00
Thierry Reding
5b66a2b43f ARM: tegra: Fix order of XUSB controller clocks
This is purely to make the json-schema validation tools happy because
they cannot deal with string arrays that may be in arbitrary order.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:44 +02:00
Thierry Reding
571c3d37ee ARM: tegra: Add #reset-cells to Tegra124 memory controller
The memory controller exposes a set of memory client resets and needs to
specify the #reset-cells property in order to advertise the number of
cells needed to describe each of the resets.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:43 +02:00
Thierry Reding
9061a80566 ARM: tegra: Add missing panel power supplies
Both Nyan boards as well as Venice2 are missing panel power supplies.
Add them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:43 +02:00
Thierry Reding
839d9bda2f ARM: tegra: Add micro-USB A/B port on Jetson TK1
Run the micro-USB A/B port on Jetson TK1 in host mode by default.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:43 +02:00
Thierry Reding
9482a17008 ARM: tegra: Use proper tuple notation
Tuple boundaries should be marked by < and > to make it clear which
cells are part of the same tuple. This also helps the json-schema based
validation tooling to properly parse this data.

While at it, also remove the "immovable" bit from PCI addresses. All of
these addresses are in fact "movable".

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:43 +02:00
Thierry Reding
cc761754f4 ARM: tegra: Use standard name for Ethernet devices
Ethernet device should be named "ethernet@<unit-address>".

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:43 +02:00
Thierry Reding
1bc5af2b36 ARM: tegra: Add missing #sound-dai-cells property to codecs
Audio codecs need a #sound-dai-cells property, so add one to the audio
codecs on various Tegra-based boards that don't have one.

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:42 +02:00
Thierry Reding
4c0bb8caad ARM: tegra: Add missing #phy-cells property to USB PHYs
USB PHYs must have a #phy-cells property, so add one to the Tegra USB
PHYs which don't have one.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:42 +02:00
Thierry Reding
704818a1ac ARM: tegra: Tegra114 SDHCI is not backwards-compatible
The SDHCI controller instantiated on Tegra114 is not backwards-
compatible with the version on Tegra30, so remove the corresponding
compatible string.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:42 +02:00
Thierry Reding
32c096c227 ARM: tegra: Rename sdhci nodes to mmc
The new json-schema based validation tools require SD/MMC controller
nodes to be named mmc. Rename all references to them.

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:41 +02:00
Thierry Reding
afd92390fc ARM: tegra: Drop display controller parent clocks on Tegra124
The parent clocks are determined by the output that will be used, not by
the display controller that drives the output. On previous generations a
simple RGB output used to be part of the display controller and hence an
explicit parent clock needed to be assigned to the display controller to
drive the RGB output. Starting with Tegra124, that RGB output has been
dropped and the parent clock can therefore be removed from the display
controller device tree nodes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:26:14 +02:00
Thierry Reding
9d304b0721 ARM: tegra: The Tegra114 DC is not backwards-compatible
The display controller on Tegra114 is in fact not backwards-compatible
with the instantiation found on earlier SoCs. Drop the misleading
compatible string.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:21:57 +02:00
Thierry Reding
ff32afae58 ARM: tegra: gr3d is not backwards-compatible
The instantiation of gr3d in Tegra114 is not backwards-compatible with
the version found on earlier chips. Remove the misleading compatible
string.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:21:57 +02:00
Thierry Reding
46d36c40f5 ARM: tegra: gr2d is not backwards-compatible
The instantiation of gr2d in Tegra114 is not backwards-compatible with
the version found on earlier chips. While the hardware IP is identical,
the compatible string also describes the integration of the IP, which
in the case of Tegra114 is slightly different in that it's part of the
HEG power partition, whereas it wasn't previously.

Drop the misleading compatible string so that drivers that support the
older integrations cannot match on it. Since they wouldn't be able to
control the power partition, such driver wouldn't be able to access any
of the registers of the IP.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:16:28 +02:00
Thierry Reding
6cc05ba2e2 ARM: tegra: Add missing host1x properties
The host1x device tree bindings require the clock- and interrupt-names
properties to be present, so add them where missing.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:16:22 +02:00
Thierry Reding
f0fd20a54f ARM: tegra: Do not mark host1x as simple bus
The host1x is not a simple bus, so drop the corresponding compatible
string.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:16:20 +02:00
Thierry Reding
6768e43d61 ARM: tegra: tn7: Use the correct DSI/CSI supply
The correct DSI/CSI supply property is called vdd-dsi-csi-supply, so use
that instead of the wrong vdd-supply property.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:16:19 +02:00
Thierry Reding
da2ebcfd9a ARM: tegra: roth: Use the correct DSI/CSI supply
The correct DSI/CSI supply property is called vdd-dsi-csi-supply, so use
that instead of the wrong vdd-supply property.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:16:19 +02:00
Thierry Reding
19ed4866f8 ARM: tegra: Remove battery-name property
This property is not documented and will cause a validation failure.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:16:18 +02:00
Thierry Reding
1cf17aa67a ARM: tegra: Remove simple regulators bus
The standard way to do this is to list out the regulators at the top
level. Adopt the standard way to fix validation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:16:18 +02:00
Thierry Reding
901c865340 ARM: tegra: Remove simple clocks bus
The standard way to do this is to list out the clocks at the top-level.
Adopt the standard way to fix validation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:16:17 +02:00
Thierry Reding
578bd8e08f ARM: tegra: Add missing clock-names for SDHCI on Tegra114
The Tegra SDHCI controller bindings state that the clock-names property
is required, so add the missing properties on Tegra114.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:16:16 +02:00
Frieder Schrempf
d22a16cc92 ARM: dts: imx6ul-kontron: Change WDOG_ANY signal from push-pull to open-drain
The WDOG_ANY signal is connected to the RESET_IN signal of the SoM
and baseboard. It is currently configured as push-pull, which means
that if some external device like a programmer wants to assert the
RESET_IN signal by pulling it to ground, it drives against the high
level WDOG_ANY output of the SoC.

To fix this we set the WDOG_ANY signal to open-drain configuration.
That way we make sure that the RESET_IN can be asserted by the
watchdog as well as by external devices.

Fixes: 1ea4b76cdf ("ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23 11:39:35 +08:00
Frieder Schrempf
04a2c05179 ARM: dts: imx6ul-kontron: Move watchdog from Kontron i.MX6UL/ULL board to SoM
The watchdog's WDOG_ANY signal is used to trigger a POR of the SoC,
if a soft reset is issued. As the SoM hardware connects the WDOG_ANY
and the POR signals, the watchdog node itself and the pin
configuration should be part of the common SoM devicetree.
Let's move it from the baseboard's devicetree to its proper place.

Fixes: 1ea4b76cdf ("ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23 11:39:21 +08:00
Jonathan McDowell
5de47779cf ARM: dts: qcom: add qfprom definition to ipq806x
Add missing qfprom definition for ipq806x SoC

Signed-off-by: Jonathan McDowell <noodles@earth.li>
Link: https://lore.kernel.org/r/20200616171554.GA5632@earth.li
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21 00:31:15 -07:00
Codrin Ciubotariu
008e6fad76 ARM: dts: at91: sam9x60ek: classd: pull-down the L1 and L3 lines
The L1 and L3 lines drive NMOS transistors that are OFF with a low level.
On the SAM9X60 EK board, if the pins corresponding to L1 and L3
have pull-ups enabled, there is an extra 2 x 30uA power consumption.
Use pull-downs for these 2 lines to remove the unnecessary power
consumption.

Fixes: 1e5f532c27 ("ARM: dts: at91: sam9x60: add device tree for soc and board")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200615095525.43414-2-codrin.ciubotariu@microchip.com
2020-06-17 23:24:50 +02:00
Codrin Ciubotariu
07e324d4df ARM: dts: at91: sama5d2_xplained: classd: pull-down the R1 and R3 lines
The R1 and R3 lines drive NMOS transistors that are OFF with a low level.
On the SAMA5D2 Xplained board, if the pins corresponding to R1 and R3
have pull-ups enabled, there is an extra 2 x 30uA power consumption.
Use pull-downs for these 2 lines to remove the unnecessary power
consumption.

Fixes: b133ca7a65 ("ARM: dts: at91: sama5d2_xplained: add pin muxing and enable classd")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200615095525.43414-1-codrin.ciubotariu@microchip.com
2020-06-17 23:24:50 +02:00
Matthew Hagan
ac4e106d89 ARM: dts: NSP: Correct FA2 mailbox node
The FA2 mailbox is specified at 0x18025000 but should actually be
0x18025c00, length 0x400 according to socregs_nsp.h and board_bu.c. Also
the interrupt was off by one and should be GIC SPI 151 instead of 150.

Fixes: 17d5171723 ("ARM: dts: NSP: Add mailbox (PDC) to NSP")
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-06-17 13:40:42 -07:00
Abhishek Pandit-Subedi
6c2b99a2e7 ARM: dts: rockchip: Add marvell BT irq config
Veyron Jaq and Mighty both use the Marvel 8897 WiFi+BT chip. Add wakeup
and pinctrl block to devicetree so the btmrvl driver can correctly
configure the wakeup interrupt.

Signed-off-by: Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200612130219.v2.1.I66864be898aa835ccb66b6cd5220d0b082338a81@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-06-17 10:41:08 +02:00
Johan Jonker
fff987e732 ARM: dts: rockchip: rename label and nodename pinctrl subnodes that end with gpio
A test with the command below gives for example this error:

arch/arm/boot/dts/rk3288-tinker.dt.yaml: tsadc: otp-gpio:
{'phandle': [[54]], 'rockchip,pins': [[0, 10, 0, 118]]}
is not of type 'array'

'gpio' is a sort of reserved nodename and should not be used
for pinctrl in combination with 'rockchip,pins', so change
nodes that end with 'gpio' to end with 'pin' or 'pins'.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/
dtschema/schemas/gpio/gpio.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200524160636.16547-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-06-17 10:39:33 +02:00
Tony Lindgren
a352fe3710 Merge branch 'omap-for-v5.8/fixes-rc1' into fixes 2020-06-16 09:26:03 -07:00
Tony Lindgren
07c7b547a7 Linux 5.8-rc1
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Merge tag 'v5.8-rc1' into fixes

Linux 5.8-rc1
2020-06-16 09:25:03 -07:00
Drew Fustini
80bf725986 ARM: dts: am5729: beaglebone-ai: fix rgmii phy-mode
Since commit cd28d1d6e5 ("net: phy: at803x: Disable phy delay for
RGMII mode") the networking is broken on the BeagleBone AI which has
the AR8035 PHY for Gigabit Ethernet [0].  The fix is to switch from
phy-mode = "rgmii" to phy-mode = "rgmii-rxid".

Note: Grygorii made a similar DT fix for other AM57xx boards with a
different phy in commit 820f8a870f ("ARM: dts: am57xx: fix networking
on boards with ksz9031 phy").

[0] https://git.io/Jf7PX

Fixes: 520557d485 ("ARM: dts: am5729: beaglebone-ai: adding device tree")
Cc: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-16 09:11:52 -07:00
Tony Lindgren
c030688d44 ARM: dts: Fix omap4 system timer source clocks
I accidentally flipped the system timer to use system clock instead of
the 32k source clock.

Fixes: 14b1925a72 ("ARM: dts: Configure system timers for omap4")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-16 09:11:28 -07:00
Tony Lindgren
9cf28e41f9 ARM: dts: Fix duovero smsc interrupt for suspend
While testing the recent suspend and resume regressions I noticed that
duovero can still end up losing edge gpio interrupts on runtime
suspend. This causes NFSroot easily stopping working after resume on
duovero.

Let's fix the issue by using gpio level interrupts for smsc as then
the gpio interrupt state is seen by the gpio controller on resume.

Fixes: 731b409878 ("ARM: dts: Configure duovero for to allow core retention during idle")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-16 09:11:06 -07:00
Drew Fustini
d7af722344 ARM: dts: am335x-pocketbeagle: Fix mmc0 Write Protect
AM3358 pin mcasp0_aclkr (ZCZ ball B13) [0] is routed to P1.31 header [1]
Mode 4 of this pin is mmc0_sdwp (SD Write Protect).  A signal connected
to P1.31 may accidentally trigger mmc0 write protection.  To avoid this
situation, do not put mcasp0_aclkr in mode 4 (mmc0_sdwp) by default.

[0] http://www.ti.com/lit/ds/symlink/am3358.pdf
[1] https://github.com/beagleboard/pocketbeagle/wiki/System-Reference-Manual#531_Expansion_Headers

Fixes: 047905376a (ARM: dts: Add am335x-pocketbeagle)
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-16 09:08:50 -07:00
Diego Rondini
21a827bf1c
ARM: dts: orange-pi-zero-plus2: add leds configuration
Add pwr and status leds configuration and turn on pwr led by default for Orange
Pi Zero Plus 2 (both H3 and H5 variants).

Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
Link: https://lore.kernel.org/r/20200615130223.34464-2-diego.rondini@kynetics.com
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-06-16 12:35:37 +02:00
Diego Rondini
43aad09c79
ARM: dts: orange-pi-zero-plus2: enable USB OTG port
Enable support for USB OTG port on Orange Pi Zero Plus 2 (both H3 and H5
variants). As, according to the board schematics, the USB OTG port cannot
provide power to external devices, we set dr_mode to peripheral.

Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
Link: https://lore.kernel.org/r/20200615130223.34464-1-diego.rondini@kynetics.com
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-06-16 12:35:33 +02:00
Matthew Hagan
b9dbe0101e ARM: dts: NSP: Disable PL330 by default, add dma-coherent property
Currently the PL330 is enabled by default. However if left in IDM reset, as is
the case with the Meraki and Synology NSP devices, the system will hang when
probing for the PL330's AMBA peripheral ID. We therefore should be able to
disable it in these cases.

The PL330 is also included among of the list of peripherals put into coherent
mode, so "dma-coherent" has been added here as well.

Fixes: 5fa1026a3e ("ARM: dts: NSP: Add PL330 support")
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-06-15 21:17:31 -07:00
Erwan Le Ray
391e437eed ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl
Fix uart7_pins_a comments to indicate UART7 pins instead of UART4 pins.

Fixes: bf4b5f379f ("ARM: dts: stm32: Add missing pinctrl definitions for STM32MP157")

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 12:37:31 +02:00
Erwan Le Ray
f6b43d89d3 ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl
Fix usart and uart nodes ordering. Several usart nodes didn't respect
expecting ordering.

Fixes: 077e0638fc ("ARM: dts: stm32: Add alternate pinmux for USART2 pins on stm32mp15")

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 12:37:31 +02:00
Erwan Le Ray
a5f8a58c6a ARM: dts: stm32: Update UART4 pin states on stm32mp15xx-dkx
Add sleep and idle states to uart4 pin configuration.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 12:10:13 +02:00
Erwan Le Ray
f3f2604ae9 ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
Add sleep and idle states to uart4 pin configuration.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 12:10:13 +02:00
Erwan Le Ray
251fe9a533 ARM: dts: stm32: update uart4 pin configuration for low power on stm32mp157
Sleep pin configuration is refined for low power modes:
- "sleep" (no wakeup & console suspend enabled): put pins in analog state
  to optimize power
- "idle" (wakeup capability): keep Rx pin in alternate function

Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 12:10:13 +02:00
Benjamin Gaignard
ab349759cd ARM: dts: stm32: update led nodes names for stm32f746-eval
Update led nodes names to be aligned with yaml description

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:10 +02:00
Benjamin Gaignard
e810e2d880 ARM: dts: stm32: Add missing #address and #size cells on spi node for stm32mp151
Add the missing #address-cells and #size-cells to spi node.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:10 +02:00
Benjamin Gaignard
96f8d30a7c ARM: dts: stm32: Update nodes names for stm32h743 pinctrl
Fix the nodes names to be aligned with yaml description

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:09 +02:00
Benjamin Gaignard
2151761a92 ARM: dts: stm32: remove useless interrupt-names property on stm32f743
Driver doesn't use interrupt's name to get it so remove it from
the node.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:09 +02:00
Benjamin Gaignard
2c11de97e0 ARM: dts: stm32: update led nodes names for stm32f746-eval
Update led nodes names to be aligned with yaml description

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:09 +02:00
Benjamin Gaignard
7cf1acae22 ARM: dts: stm32: update led nodes names for stm32f769-disco
Update led nodes names to be aligned with yaml description

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:09 +02:00
Benjamin Gaignard
5f014cb81e ARM: dts: stm32: update led nodes names for stm32f429-eval
Update led nodes names to be aligned with yaml description

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:09 +02:00
Benjamin Gaignard
e83b9a4afe ARM: dts: stm32: remove useless interrupt-names property on stm32f746
Driver doesn't use interrupt's name to get it so remove it from
the node.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:09 +02:00
Benjamin Gaignard
f85b1b9137 ARM: dts: stm32: update led nodes names for stm32f469-disco
Update led nodes names to be aligned with yaml description

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:09 +02:00
Benjamin Gaignard
2a61f1168b ARM: dts: stm32: update led nodes names for stm32f249-disco
Update led nodes names to be aligned with yaml description

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:09 +02:00
Benjamin Gaignard
52107e8d6e ARM: dts: stm32: update pwm pinctrl node names for stm32f4
Rename pwm pinctrl nodes name to matching with yaml bindings
requirements.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:09 +02:00
Benjamin Gaignard
70d4301e1a ARM: dts: stm32: remove useless interrupt-names property on stm32f429
Driver doesn't use interrupt's name to get it so remove it from
the node.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:09 +02:00
dillon min
1c9aa67762 ARM: dts: stm32: enable stmpe811 on stm32429-disco board
Enable the stmpe811 touch screen on stm32429-disco board.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:27:21 +02:00
dillon min
4409aeae98 ARM: dts: stm32: Add pin map for I2C3 controller on stm32f4
This patch adds the pin configuration for I2C3 controller on
stm32f4.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:27:18 +02:00
dillon min
4db36ed45b ARM: dts: stm32: add I2C3 support on STM32F429 SoC
This patch adds I2C3 instances of the STM32F429 SoC

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:27:12 +02:00
dillon min
a726e2f000 ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on stm32429-disco board
Enable the ltdc & ili9341, gyro l3gd20 on stm32429-disco board.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:27:01 +02:00
dillon min
27e6b725b4 ARM: dts: stm32: Add pin map for ltdc & spi5 on stm32f429-disco board
This patch adds the pin configuration for ltdc and spi5 controller
on stm32f429-disco board.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:25:11 +02:00
dillon min
fd88760b88 ARM: dts: stm32: Add dma config for spi5 on stm32f429
Enable spi5's dma configuration for graphics data output to
ilitek ili9341 panel via mipi dbi interface.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 10:42:35 +02:00
Lad Prabhakar
91cebe35d1 ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add device tree for camera DB
Add support for the camera daughter board which is connected to
iWave's RZ/G1H Qseven carrier board. Also enable ttySC[0135] and
ethernet1 interfaces.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1591552659-21314-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:33:46 +02:00
Lad Prabhakar
5818cc37e7 ARM: dts: r8a7742: Add CMT SoC specific support
Add CMT[01] support to r8a7742 SoC DT.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590614320-30160-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
937c9ebddc ARM: dts: r8a7742: Add thermal device to DT
This patch instantiates the thermal sensor module with thermal-zone
support.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590614320-30160-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
fc3a1b2763 ARM: dts: r8a7742-iwg21d-q7: Sound DMA support via DVC on DTS
Enable sound with DMA support on carrier board.

DMA transfer uses DVC

     DMA               DMApp
[MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI]

     DMA               DMApp
[MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI]

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590611013-26029-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
436765010f ARM: dts: r8a7742-iwg21d-q7: Enable SGTL5000 audio codec
This patch enables SGTL5000 audio codec on the carrier board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590611013-26029-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
3816124fd0 ARM: dts: r8a7742: Add audio support
Add sound support for the RZ/G1H SoC (a.k.a. R8A7742).

This work is based on similar work done on the R8A7744 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/1590526904-13855-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
5a07fe33b8 ARM: dts: r8a7742-iwg21d-q7: Add RWDT support
Enable RWDT and use 60 seconds as default timeout.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590420129-7531-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
8a8c81aa60 ARM: dts: r8a7742-iwg21d-q7: Enable Ethernet AVB
Enable Ethernet AVB on iWave RZ/G1H carrier board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590420129-7531-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
b3850cd90e ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller
Enable the SDHI2 controller on iWave RZ/G1H carrier board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590420129-7531-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
73e44613f6 ARM: dts: r8a7742-iwg21d-q7: Enable SCIFB2 node
Enable SCIFB2 interface on iWave RZ/G1H carrier board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590420129-7531-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
ab586be87e ARM: dts: r8a7742: Add XHCI support
Add XHCI support to R8A7742 SoC DT.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590356277-19993-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
b861874582 ARM: dts: r8a7742: Add USB-DMAC and HSUSB device nodes
Add USB DMAC and HSUSB device nodes on RZ/G1H SoC dtsi.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590356277-19993-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
4bb19c91d3 ARM: dts: r8a7742: Add USB 2.0 host support
Describe internal PCI bridge devices, USB phy device and
link PCI USB devices to USB phy.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590356277-19993-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Lad Prabhakar
72d1a34e3c ARM: dts: r8a7742: Add RWDT node
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G1H (r8a7742) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1590172641-1556-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-15 10:28:46 +02:00
Geert Uytterhoeven
b06424ceec ARM: dts: r9a06g032: Correct GIC compatible value order
According to commit 61efb56e30 ("dt-bindings: arm: gic: Allow
combining arm,gic-400 compatible strings"), "arm,gic-400" should be
listed first.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20200519095431.5650-1-geert+renesas@glider.be
2020-06-15 10:28:46 +02:00