Rainier uses GPIO B6 as the checkstop GPIO. Define the line-name
so that this GPIO can be found by name.
Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The attention handler will monitor the checkstop gpio via the character
device interface so it needs to not be defined.
Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add a reserved memory node for the VGA memory. Add the XDMA engine node,
enable it, and point it's memory region to the VGA memory.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add a reserved memory node for the VGA memory. Add the XDMA engine node,
enable it, and point it's memory region to the VGA memory.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add the PCI-E root complex reset, correct the pcie-device property, and
add the Aspeed SCU interrupt controller include.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Correct the pcie-device property, and add the Aspeed SCU interrupt
controller include.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The current pin muxing scheme muxes GPIO_1 pad for USB_OTG_ID
because of which when card is inserted, usb otg is enumerated
and the card is never detected.
[ 64.492645] cfg80211: failed to load regulatory.db
[ 64.492657] imx-sdma 20ec000.sdma: external firmware not found, using ROM firmware
[ 76.343711] ci_hdrc ci_hdrc.0: EHCI Host Controller
[ 76.349742] ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 2
[ 76.388862] ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
[ 76.396650] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.08
[ 76.405412] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 76.412763] usb usb2: Product: EHCI Host Controller
[ 76.417666] usb usb2: Manufacturer: Linux 5.8.0-rc1-next-20200618 ehci_hcd
[ 76.424623] usb usb2: SerialNumber: ci_hdrc.0
[ 76.431755] hub 2-0:1.0: USB hub found
[ 76.435862] hub 2-0:1.0: 1 port detected
The TRM mentions GPIO_1 pad should be muxed/assigned for card detect
and ENET_RX_ER pad for USB_OTG_ID for proper operation.
This patch fixes pin muxing as per TRM and is tested on a
i.Core 1.5 MX6 DL SOM.
[ 22.449165] mmc0: host does not support reading read-only switch, assuming write-enable
[ 22.459992] mmc0: new high speed SDHC card at address 0001
[ 22.469725] mmcblk0: mmc0:0001 EB1QT 29.8 GiB
[ 22.478856] mmcblk0: p1 p2
Fixes: 6df11287f7 ("ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual initial support")
Cc: stable@vger.kernel.org
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
esdhc0 is connected to an eMMC, so it is safe to pass the "no-sdio"/"no-sd"
properties.
esdhc1 is wired to a standard SD socket, so pass the "no-sdio" property.
Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Commit 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode") fixed the
phy-mode for fec1, but missed to fix it for the fec2 node.
Fix fec2 to also use "rgmii-id" as the phy-mode.
Cc: <stable@vger.kernel.org>
Fixes: 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Commit 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode") fixed the
phy-mode for fec1, but missed to fix it for the fec2 node.
Fix fec2 to also use "rgmii-id" as the phy-mode.
Cc: <stable@vger.kernel.org>
Fixes: 0672d22a19 ("ARM: dts: imx: Fix the AR803X phy-mode")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the AR8035 datasheet:
"When using crystal, the clock is generated internally after power is
stable. For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms
requirement is satisfied."
Pass the 'reset-assert-us' property to describe such requirement.
While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6q-tbs2910 has an Atheros AR8035 Ethernet PHY at address 4.
The AR8035 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
Improve the Ethernet representation by adding an mdio node with such
information.
This fixes an Ethernet regression in U-Boot as U-Boot AR803X driver now
expects the 'qca,clk-out-frequency' property to be passed via
device tree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Tested-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the AR8031 datasheet:
"When using crystal, clock is generated internally after the power is
stable. In order to get reliable power-on-reset, it is recommended to
keep asserting the reset low signal long enough (10 ms) to ensure the
clock is stable and clock-to-reset (1 ms) requirement is satisfied."
Pass the 'reset-assert-us' property to describe such requirement.
While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1.
The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
Improve the Ethernet representation by adding an mdio node with such
information.
An advantage of adding the mdio node is that the AR8031 initialization
code in the mx6sabresd board file in U-Boot can totally be removed.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add Gateworks System Controller support to Gateworks Ventana boards:
- add dt bindings for GSC mfd driver and hwmon driver for ADC's and
fan controllers.
- add dt bindings for gpio-keys driver for push-button and interrupt events
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The marvell PHY reg-init registers for the D-Link DNS-327L are wrong.
Currently the first field is used to set the page 2, but this is
pointless. The usage is not correct, and we are setting the wrong
registers.
Fix it.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Connect the voltage regulator of vbus to the otg connector.
Depending on the current mode this is enabled (in "host" mode")
or disabled (in "peripheral" mode). The regulator must be updated
if the controller is configured in "otg" mode and the status changes
between "host" and "peripheral".
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200707101214.2301768-1-michael@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-8-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-7-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Some of gmac, sdmmc node properties are common across rk3288 and
rk3399pro SOM's so move them into Carrier dtsi.
Chosen node is specific to rk3399pro configure SBC, so move it into
RockPI N10 dts.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-5-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Supply regulators are common across different variants of vmarc SOM's
since the Type C power controller IC is part of the carrier board.
So, move the supply regulators into carrier board dtsi.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-4-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
I2C nodes and associated slave devices defined in Carrier board
are specific to rk3399pro vmrac SOM.
So, move them into SOM dtsi.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-2-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This time there are a number of actual code fixes, plus
a small set of device tree issues getting addressed:
- Renesas:
- one defconfig cleanup to allow a later Kconfig change
- Intel socfpga:
- enable QSPI devices on some machines
- fix DTC validation warnings
- TI OMAP:
- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
driver
- A regression fix for ti-sysc no-idle handling that caused issues
compared to earlier platform data based booting
- A fix for memory leak for omap_hwmod_allocate_module
- Fix d_can driver probe for am437x
- NXP i.MX
- A couple of fixes on i.MX platform device registration code to stop
the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
- Amlogic Meson
- misc DT fixes
- SoC ID fixes to detect all chips correctly
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into master
Pull ARM SoC fixes from Arnd Bergmann:
"This time there are a number of actual code fixes, plus a small set of
device tree issues getting addressed:
Renesas:
- one defconfig cleanup to allow a later Kconfig change
Intel socfpga:
- enable QSPI devices on some machines
- fix DTC validation warnings
TI OMAP:
- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target
module driver
- A regression fix for ti-sysc no-idle handling that caused issues
compared to earlier platform data based booting
- A fix for memory leak for omap_hwmod_allocate_module
- Fix d_can driver probe for am437x
NXP i.MX:
- A couple of fixes on i.MX platform device registration code to
stop the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
Amlogic Meson:
- misc DT fixes
- SoC ID fixes to detect all chips correctly"
* tag 'arm-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema
ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema
arm64: dts: stratix10: increase QSPI reg address in nand dts file
arm64: dts: stratix10: add status to qspi dts node
arm64: dts: agilex: add status to qspi dts node
ARM: dts: Fix dcan driver probe failed on am437x platform
ARM: OMAP2+: Fix possible memory leak in omap_hwmod_allocate_module
arm64: defconfig: Enable CONFIG_PCIE_RCAR_HOST
soc: imx: check ls1021a
ARM: imx: Remove imx_add_imx_dma() unused irq_err argument
ARM: imx: Provide correct number of resources when registering gpio devices
ARM: dts: imx6qdl-gw551x: fix audio SSI
bus: ti-sysc: Do not disable on suspend for no-idle
bus: ti-sysc: Fix sleeping function called from invalid context for RTC quirk
bus: ti-sysc: Fix wakeirq sleeping function called from invalid context
ARM: dts: meson: Align L2 cache-controller nodename with dtschema
arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
arm64: dts: meson: add missing gxl rng clock
soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's
This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.
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Merge tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.9-rc1
This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.
* tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (38 commits)
ARM: tegra: Add device-tree for ASUS Google Nexus 7
ARM: tegra: Add device-tree for Acer Iconia Tab A500
ARM: tegra: Add HDMI supplies on Nyan boards
ARM: tegra: Add missing DSI controller on Tegra30
ARM: tegra: Add i2c-bus subnode for DPAUX controllers
ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
ARM: tegra: The Tegra30 DC is not backwards-compatible
ARM: tegra: Remove spurious comma from node name
ARM: tegra: Add parent clock to DSI output
ARM: tegra: Use standard names for SRAM nodes
ARM: tegra: seaboard: Use standard battery bindings
ARM: tegra: Use standard names for LED nodes
ARM: tegra: Use numeric unit-addresses
ARM: tegra: medcom-wide: Remove extra panel power supply
ARM: tegra: Use proper unit-addresses for OPPs
ARM: tegra: Add missing clock-names for SDHCI controllers
ARM: tegra: Fix order of XUSB controller clocks
ARM: tegra: Add #reset-cells to Tegra124 memory controller
ARM: tegra: Add missing panel power supplies
ARM: tegra: Add micro-USB A/B port on Jetson TK1
...
Link: https://lore.kernel.org/r/20200717161300.1661002-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The device node for the FIFO-buffered Serial Interface sound node lacks
the "clocks" property, as the DTS file didn't describe any clocks yet at
its introduction.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200519075525.24742-1-geert+renesas@glider.be
Fix dtschema validator warnings like:
l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
A series of changes to configure IPU and DSP remoteproc for omap4 & 5.
And a change to configure the default mux for am335x-pocketbeagle, and
a change to use https for external links.
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Merge tag 'omap-for-v5.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
More dts changes for omaps for v5.9
A series of changes to configure IPU and DSP remoteproc for omap4 & 5.
And a change to configure the default mux for am335x-pocketbeagle, and
a change to use https for external links.
* tag 'omap-for-v5.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT
ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSP
ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSP
ARM: dts: omap5-uevm: Add system timers to DSP and IPU
ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSP
ARM: dts: omap5: Add aliases for rproc nodes
ARM: dts: omap5: Add DSP and IPU nodes
ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU
ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP
ARM: dts: omap4: Add aliases for rproc nodes
ARM: dts: omap4: Add IPU DT node
ARM: dts: omap4: Update the DSP node
ARM: dts: omap5: Add timer_sys_ck clocks for timers
ARM: dts: omap4: Add timer_sys_ck clocks for timers
ARM: dts: am335x-pocketbeagle: set default mux for gpio pins
Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A series of changes to drop remaining USB platform data for omap4/5,
and am4, and dra7.
And a patch to drop AES platform data for omap3.
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Merge tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Drop more legacy platform data for omaps for v5.9
A series of changes to drop remaining USB platform data for omap4/5,
and am4, and dra7.
And a patch to drop AES platform data for omap3.
* tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Drop legacy platform data for omap5 usb host
ARM: OMAP2+: Drop legacy platform data for omap4 usb
ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
ARM: OMAP2+: Drop legacy platform data for am4 dwc3
bus: ti-sysc: Add missing quirk flags for usb_host_hs
ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2
Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Few fixes for issues noticed during testing:
- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
driver
- A regression fix for ti-sysc no-idle handling that caused issues
compared to earlier platform data based booting
- A fix for memory leak for omap_hwmod_allocate_module
- Fix d_can driver probe for am437x
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Merge tag 'omap-for-v5.8/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.8-rc cycle
Few fixes for issues noticed during testing:
- Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
driver
- A regression fix for ti-sysc no-idle handling that caused issues
compared to earlier platform data based booting
- A fix for memory leak for omap_hwmod_allocate_module
- Fix d_can driver probe for am437x
* tag 'omap-for-v5.8/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Fix dcan driver probe failed on am437x platform
ARM: OMAP2+: Fix possible memory leak in omap_hwmod_allocate_module
bus: ti-sysc: Do not disable on suspend for no-idle
bus: ti-sysc: Fix sleeping function called from invalid context for RTC quirk
bus: ti-sysc: Fix wakeirq sleeping function called from invalid context
Link: https://lore.kernel.org/r/pull-1594840100-132735@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A couple of fixes on i.MX platform device registration code to stop
the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
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Merge tag 'imx-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.8, round 2:
- A couple of fixes on i.MX platform device registration code to stop
the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
* tag 'imx-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: check ls1021a
ARM: imx: Remove imx_add_imx_dma() unused irq_err argument
ARM: imx: Provide correct number of resources when registering gpio devices
ARM: dts: imx6qdl-gw551x: fix audio SSI
Link: https://lore.kernel.org/r/20200714145649.GP15718@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There are few hardware variants of NVIDIA Tegra30-based Nexus 7 device:
1. WiFi-only (named Grouper)
2. GSM (named Tilapia)
3. Using Maxim PMIC (E1565 board ID)
4. Using Ti PMIC (PM269 board ID)
This patch adds device-trees for known and tested variants.
Link: https://wiki.postmarketos.org/wiki/Google_Nexus_7_2012_(asus-grouper)
Tested-by: Pedro Ângelo <pangelo@void.io>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Tested-by: Zack Pearsall <zpearsall@yahoo.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix dtschema validator warnings like:
l2-cache@fffff000: $nodename:0:
'l2-cache@fffff000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Fixes: 475dc86d08 ("arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The SOR controller needs the AVDD I/O and VDD HDMI PLL supplies in order
to operate correctly. Make sure to specify them for Nyan boards.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra30 has a DSI controller, although it is never used on any of the
devices supported by the upstream Linux kernel.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The DPAUX controller device tree bindings require the bus to have an
i2c-bus subnode to distinguish between I2C clients and pinmux groups.
Signed-off-by: Thierry Reding <treding@nvidia.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Got following d_can probe errors with kernel 5.8-rc1 on am437x
[ 10.730822] CAN device driver interface
Starting Wait for Network to be Configured...
[ OK ] Reached target Network.
[ 10.787363] c_can_platform 481cc000.can: probe failed
[ 10.792484] c_can_platform: probe of 481cc000.can failed with error -2
[ 10.799457] c_can_platform 481d0000.can: probe failed
[ 10.804617] c_can_platform: probe of 481d0000.can failed with error -2
actually, Tony has fixed this issue on am335x with the patch [3]
Since am437x has the same clock structure with am335x
[1][2], so reuse the code from Tony Lindgren's patch [3] to fix it.
[1]: https://www.ti.com/lit/pdf/spruh73 Chapter-23, Figure 23-1. DCAN
Integration
[2]: https://www.ti.com/lit/pdf/spruhl7 Chapter-25, Figure 25-1. DCAN
Integration
[3]: commit 516f1117d0 ("ARM: dts: Configure osc clock for d_can on
am335x")
Fixes: 1a5cd7c23c ("bus: ti-sysc: Enable all clocks directly during init to read revision")
Signed-off-by: dillon min <dillon.minfei@gmail.com>
[tony@atomide.com: aligned commit message a bit for readability]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Pull input fixes from Dmitry Torokhov:
"A few quirks for the Elan touchpad driver, another Thinkpad is being
switched over from PS/2 to native RMI4 interface, and we gave a brand
new SW_MACHINE_COVER switch definition"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
Input: elan_i2c - add more hardware ID for Lenovo laptops
Input: i8042 - add Lenovo XiaoXin Air 12 to i8042 nomux list
Revert "Input: elants_i2c - report resolution information for touch major"
Input: elan_i2c - only increment wakeup count on touch
Input: synaptics - enable InterTouch for ThinkPad X1E 1st gen
ARM: dts: n900: remove mmc1 card detect gpio
Input: add `SW_MACHINE_COVER`
Odroid-C1 has an eMMC connector where users can optionally install an
eMMC module. The eMMC modules run off a 1.8V VQMMC supply which means
that HS-200 mode can be used (this is the highest mode that the SDHC
controller supports). Enable the SDHC controller so eMMC modules can be
accessed.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-4-martin.blumenstingl@googlemail.com
EC-100 has built-in eMMC flash which is hard-wired to 3.3V VCC (which
means it's limited to high-speed MMC modes). Enable the SDHC controller
to access the contents of the eMMC flash.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-3-martin.blumenstingl@googlemail.com
Meson6, Meson8, Meson8b and Meson8m2 are using a similar SDHC controller
IP which typically connects to an eMMC chip (because unlike the SDIO
controller the SDHC controller has an 8-bit bus interface).
On Meson8, Meson8b and Meson8m2 the clock inputs are all the same.
However, Meson8m2 seems to have an improved version of the SHDC
controller IP which doesn't require the driver to wait manually for a
flush of a DMA transfer. Thus every SoC has it's own compatible string
so if more difference are discovered they can be implemented.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-2-martin.blumenstingl@googlemail.com
The Meson8b SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-4-martin.blumenstingl@googlemail.com
The Meson8m2 SoCs has introduced additional reset lines for the VPU
compared to Meson8. Also it uses a slightly different VPU clock
frequency compared to Meson8 since it can now achieve 364MHz thanks to
the addition of the GP_PLL.
Add the reset lines, VPU clock configuration and update the compatible
string so the implementation differences can be managed.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-3-martin.blumenstingl@googlemail.com
The Meson8 SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-2-martin.blumenstingl@googlemail.com
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The watchdog timers have been added for the IPU and DSP remoteproc
devices for the OMAP5 uEVM board. The following timers (same as the
timers on OMAP4 Panda boards) are used as the watchdog timers,
DSP : GPT6
IPU : GPT9 & GPT11 (one for each Cortex-M4 core)
The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.
These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The watchdog timers have been added for the IPU and DSP remoteproc
devices on all the OMAP4-based Panda boards. The following timers
are used as the watchdog timers,
DSP : GPT6
IPU : GPT9 & GPT11 (one for each Cortex-M3 core)
The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.
These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices for the OMAP5 uEVM boards. The following timers
(same as the timers on OMAP4 Panda boards) are chosen:
IPU : GPT3 (SMP-mode)
DSP : GPT5
IPU has two Cortex-M4 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.
The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on the OMAP5 uEVM board. These nodes are assigned
to the respective rproc device nodes, and both the IPU and DSP remote
processors are enabled for this board.
The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.
An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP5 boards. The aliases uses
the stem "rproc", and are identical to the values
chosen on OMAP4 boards.
The aliases can be overridden, if needed, in the
respective board files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP5, like OMAP4, also has two remote processor subsystems,
DSP and IPU. The IPU subsystem though has dual Cortex-M4
processors instead of the dual Cortex-M3 processors in OMAP4,
but otherwise has almost the same set of features. Add the
DT nodes for these two processor sub-systems for all OMAP5
SoCs.
The nodes have the 'iommus', 'clocks', 'resets', 'firmware' and
'mboxes' properties added, and are disabled for now. The IPU node
has its L2 RAM memory specified through the 'reg' and 'reg-names'
properties. The DSP node doesn't have these since it doesn't have
any L2 RAM memories, but has an additional 'ti,bootreg' property
instead as it has a specific boot register that needs to be
programmed for booting.
These nodes should be enabled as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. The
following DMTimers are chosen:
IPU : GPT3 (SMP-mode)
DSP : GPT5
IPU has two Cortex-M3 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.
The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. These nodes
are assigned to the respective rproc device nodes, and both the
IPU and DSP remote processors are enabled for all these boards.
The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.
An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP4 boards. The aliases uses
the stem "rproc".
The aliases can be overridden, if needed, in the
respective board files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DT node for the Dual-Cortex M3 IPU processor sub-system has
been added for OMAP4 SoCs. The L2RAM memory region information
has been added to the node through the 'reg' and 'reg-names'
properties. The node has the 'iommus', 'clocks', 'resets',
'mboxes' and 'firmware' properties also added, and is disabled
for now. It should be enabled as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The compatible property for the DSP node is updated to match
the OMAP remoteproc bindings. The node is moved from the soc
node to the ocp node to better reflect the connectivity from
MPU side.
The node is updated with the 'ti,bootreg', 'clocks', 'resets',
'iommus', 'mboxes' and 'firmware' properties. Note that the
node does not have any 'reg' or 'reg-names' properties since
it doesn't have any L2 RAM memory, but only Unicaches.
The node is disabled for now, and should be enabled as per
the individual product configuration in the corresponding
board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The commit d41e530409 ("clk: ti: omap5: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes except for the always-on timers 1 and 12.
This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The commit 1c7de9f27a ("clk: ti: omap4: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes.
This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These pins on the PocketBeagle P1 and P2 headers are connected to AM3358
balls with gpio lines, and these pins are not used for any other
peripherals by default. These GPIO lines are unclaimed and could be used
by userspace program through the gpiod ABI.
This patch adds a "default" state in the am33xx_pinmux node and sets the
mux for those pins to gpio (mode 7) and input enable.
The "pinctrl-single,bias-pullup" and "pinctrl-single,bias-pulldown"
pinconf properties are also set for each pin per the ball reset state in
section 4.2 of the datasheet [0].
This is the AM335x pin control register format in Table 9-60 [1]:
bit attribute value
----------------------------------
31-7 reserved 0 on reset
6 slew { 0: fast, 1: slow }
5 rx_active { 0: rx disable, 1: rx enabled }
4 pu_typesel { 0: pulldown select, 1: pullup select }
3 puden { 0: pud enable, 1: disabled }
2 mode 3 bits to selec mode 0 to 7
1 mode
0 mode
The values for the bias pinconf properties are derived as follows:
pinctrl-single,bias-pullup = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pullup = < 0x10 0x10 0x10 0x18 >;
2^5 2^4 2^3 2^2 2^1 2^0 |
0x20 0x10 0x08 0x04 0x02 0x01 |
--------------------------------------------------|
input x 1 0 x x x | 0x10
enabled x 1 0 x x x | 0x10
disabled x 0 0 x x x | 0x00
mask x 1 1 x x x | 0x18
pinctrl-single,bias-pulldown = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pulldown = < 0x0 0x0 0x10 0x18 >;
2^5 2^4 2^3 2^2 2^1 2^0 |
0x20 0x10 0x08 0x04 0x02 0x01 |
--------------------------------------------------|
input x 0 0 x x x | 0x00
enabled x 0 0 x x x | 0x00
disabled x 1 0 x x x | 0x10
mask x 1 1 x x x | 0x18
[0] http://www.ti.com/lit/ds/symlink/am3358.pdf
[1] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
[tony@atomide.com: fixed typo for am3 vs am4]
Signed-off-by: Tony Lindgren <tony@atomide.com>
for 5.9 please pull the following:
- Rafal specifies the switch ports for various Luxul devices (XAP-1410,
XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150)
- Krzysztof fixes the L2 cache controller node name to conform to
dtschema
- Maxime introduces two new clock providers for Raspberry Pi 4, one to
support firmware based clocks and another one for the DVP block
feeding into the two HDMI blocks.
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Merge tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.9 please pull the following:
- Rafal specifies the switch ports for various Luxul devices (XAP-1410,
XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150)
- Krzysztof fixes the L2 cache controller node name to conform to
dtschema
- Maxime introduces two new clock providers for Raspberry Pi 4, one to
support firmware based clocks and another one for the DVP block
feeding into the two HDMI blocks.
* tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm: Align L2 cache-controller nodename with dtschema
ARM: dts: BCM5301X: Specify switch ports for Luxul devices
ARM: dts: bcm2711: Add HDMI DVP
ARM: dts: bcm2711: Add firmware clocks node
Link: https://lore.kernel.org/r/20200707045759.17562-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This series of changes configures the GPIO line names for am335x beaglebone
black and pocketbeagle to make it easier to configure the pins. To make use
of the pins, we also add the gpio-ranges for am335x.
We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then
there are two non-urgent dtschema validator warning fixes.
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Merge tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Device tree changes for omaps for v5.9 merge window
This series of changes configures the GPIO line names for am335x beaglebone
black and pocketbeagle to make it easier to configure the pins. To make use
of the pins, we also add the gpio-ranges for am335x.
We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then
there are two non-urgent dtschema validator warning fixes.
* tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-pocketbeagle: add gpio-line-names
ARM: dts: am335x-boneblack: add gpio-line-names
ARM: dts: am33xx-l4: add gpio-ranges
ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxes
ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocs
ARM: dts: am: Align L2 cache-controller nodename with dtschema
ARM: dts: omap: Align L2 cache-controller nodename with dtschema
Link: https://lore.kernel.org/r/pull-1594402929-762188@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- add missing interrupts property to support card serial
- fix node names to follow the DT schema
- add PCIe endpoint and PHY nodes for Pro5 SoC
- simplify device hierarchy of support-card.dtsi
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Merge tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt
UniPhier ARM SoC DT updates for v5.9
- add missing interrupts property to support card serial
- fix node names to follow the DT schema
- add PCIe endpoint and PHY nodes for Pro5 SoC
- simplify device hierarchy of support-card.dtsi
* tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: simplify support-card node structure
ARM: dts: uniphier: Add PCIe endpoint and PHY node for Pro5
ARM: dts: uniphier: Rename ethphy node to ethernet-phy
ARM: dts: uniphier: give fixed port number to support card serial
ARM: dts: uniphier: rename support card serial node to fix schema warning
ARM: dts: uniphier: add interrupts to support card serial
Link: https://lore.kernel.org/r/CAK7LNARGDcCKxV3-H7WmuZAVe49n0QF+672-KN0tsP0och0a_A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add support for the MYiR imx6ULL based single board computer
equipped with on board 256MB NAND & RAM. The board also
provides expansion header for expansion board, but this
commit adds only support for SBC.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This is not necessary without a pinctrl-0 statement. Remove this
orphan.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx-pwm driver supports 3 cells and this is the more flexible setting.
So use it by default and overwrite it back to two for the files that
reference the PWMs with just 2 cells to minimize changes.
This allows to drop explicit setting to 3 cells for the boards that already
depend on this. The boards that are now using 2 cells explicitly can be
converted to 3 individually.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The SFF soldered onto the board expect the ports to use 1000BaseX. It
makes no sense to have the ports set to SGMII, since they don't even
support that mode.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The SFF soldered onto the board expects the port to use 1000BaseX. It
makes no sense to have the port set to SGMII, since it doesn't even
support that mode.
Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Protonic RVT is an internal development platform for a wireless ISObus
Virtual Terminal based on COTS tablets, and the predecessor of the WD2
platform.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Protonic VT7 is a mid-class ISObus Virtual Terminal with a 7 inch
touchscreen display.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for the Protonic WD2 board, which is an internal development
platform for low-cost agricultural Virtual Terminals based on COTS tablets
and web applications.
It inherits from the PRTI6Q base class.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Protonic PRTI6Q is a development board and a base class for different
specific customer application boards based on the i.MX6 family of SoCs,
developed by Protonic Holland.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix dtschema validator warnings like:
l2-cache@a02000: $nodename:0:
'l2-cache@a02000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix dtschema validator warnings like:
l2-cache@40006000: $nodename:0:
'l2-cache@40006000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add MQS support. As the pin conflict with usdhc2, then need
to add a separate dts.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use kernel LED interface for the alarm LEDs.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Samu Nuutamo <samu.nuutamo@vincit.fi>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In imx6sll.dtsi, the ssi node name is different with other
platforms (imx6qdl, imx6sl, imx6sx), but the
sound/soc/fsl/fsl-asoc-card.c machine driver needs to check
ssi node name for audmux configuration, then different ssi
node name causes issue on imx6sll platform.
So we change ssi node name to make all platforms have same
name.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change i.MX6/i.MX7 SoCs usdhc node name from usdhc to mmc to be
compliant with yaml schema, it requires the nodename to be "mmc".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change i.MX2/i.MX3/i.MX5 SoCs esdhc node name from esdhc to mmc to
be compliant with yaml schema, it requires the nodename to be "mmc".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change i.MX27/i.MX31 node name from sdhci to mmc to be compliant
with yaml schema, it requires the nodename to be "mmc".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved,
so remove it from GPC node.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change IIM node name from iim to efuse to be compliant
with yaml schema, it requires the nodename to be one of
"eeprom|efuse|nvram".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change OCOTP node name from ocotp to efuse to be compliant
with yaml schema, it requires the nodename to be one of
"eeprom|efuse|nvram".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Change OCOTP node name from ocotp-ctrl to efuse to be compliant with
yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The timer fixed interval period pulse generator register
is used to generate periodic pulses. The down count
register loads the value programmed in the fixed period
interval (FIPER). At every tick of the timer accumulator
overflow, the counter decrements by the value of
TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down
counter value reaches zero. It reloads the down counter
in the cycle following a pulse.
To use the TMR_FIPER register to generate desired periodic
pulses. The value should programmed is,
desired_period - tclk_period
Current tmr-fiper2 value is to generate 100us periodic pulses.
(But the value should have been 99995, not 99990. The tclk_period is 5.)
This patch is to generate 1 second periodic pulses with value
999999995 programmed which is more desired by user.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6/7 SoCs' temperature sensor is inside anatop module from HW
perspective, so it should be a child node of anatop.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The audio codec on the GW551x routes to ssi1. It fixes audio capture on
the device.
Cc: stable@vger.kernel.org
Fixes: 3117e851ce ("ARM: dts: imx: Add TDA19971 HDMI Receiver to GW551x")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This device hierarchy is needlessly complex.
Remove the support-card node level, and move the ethernet and serial
nodes right under the system-bus node.
This also fixes the following warning from 'make ARCH=arm dtbs_check':
support-card@1,1f00000: $nodename:0: 'support-card@1,1f00000' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This adds PCIe endpoint controller and PHY nodes for Pro5 SoC,
and also adds pinctrl node for PCIe.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This renames the node name "ethphy" to "ethernet-phy" according to
Documentation/devicetree/bindings/net/mdio.yaml.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
As per 'struct mfd_cell ab8500_devs[]' there are not 1, but 3 PWM
devices on the AB8500. Until now, each of them have referenced
the same Device Tree node. This change ensures each device has
their own.
Due to recent `dtc` checks [0], nodes cannot share the same node
name, so we are forced to rename the affected nodes by appending
their associated numeric 'bank ID'.
[0] ste-ab8500.dtsi:210.16-214.7: ERROR (duplicate_node_names):
/soc/prcmu@80157000/ab8500/ab8500-pwm: Duplicate node name
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20200622083432.1491715-1-lee.jones@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Adds support for the back and menu keys on golden.
Signed-off-by: Nick Reitemeyer <nick.reitemeyer@web.de>
Tested-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200621193822.133683-2-nick.reitemeyer@web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Increase #pinctrl-cells to 2 so that mux and conf be kept separate. This
requires the AM33XX_PADCONF macro in omap.h to also be modified to keep pin
conf and pin mux values separate.
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Link: https://lore.kernel.org/r/20200701013320.130441-3-drew@beagleboard.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since commit e69f5dc623 ("dt-bindings: serial: Convert 8250 to
json-schema"), the schema for "ns16550a" is checked.
'make ARCH=arm dtbs_check' emits the following warning:
uart@b0000: $nodename:0: 'uart@b0000' does not match '^serial(@[0-9a-f,]+)*$'
Rename the node to follow the pattern defined in
Documentation/devicetree/bindings/serial/serial.yaml
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Since commit e69f5dc623 ("dt-bindings: serial: Convert 8250 to
json-schema"), the schema for "ns16550a" is checked.
Since then, 'make ARCH=arm dtbs_check' is so noisy because the
required property 'interrupts' is missing.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Remove the regulators node and define fixed regulators directly under
the root node. This makes SMDK5420 board consistent with other Exynos
boards.
Name the fixed regulator nodes consistently.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Remove the regulators node and define fixed regulators directly under
the root node. This makes Exynos5250 Arndale board consistent with
other Exynos boards.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Remove the regulators node and define fixed regulators directly under
the root node. This makes Exynos4412 Origen board consistent with other
Exynos boards.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
There is no need to keep DMA controller nodes under AMBA bus node.
Remove the "amba" node to fix dtschema warnings like:
amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
- The first one based on the enhancements made to clk-raspberrypi, which
is now registered trough DT and provides control over the whole range
of firmware based clocks.
- The second one based on the new clk-bcm2711-dvp driver, which gates
the clocks and reset signals that feed into RPi4's HDMI0/1 blocks.
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Merge tag 'tags/bcm2835-dt-next-2020-07-06' into devicetree/next
Maxime Ripard introduces two new clock providers into RPi4's device tree:
- The first one based on the enhancements made to clk-raspberrypi, which
is now registered trough DT and provides control over the whole range
of firmware based clocks.
- The second one based on the new clk-bcm2711-dvp driver, which gates
the clocks and reset signals that feed into RPi4's HDMI0/1 blocks.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Fix dtschema validator warnings like:
l2-cache@22000: $nodename:0:
'l2-cache@22000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
All those devices use standard BCM53011 (rev 5) or BCM53012 (rev 0).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Some Makefiles already pass -fno-stack-protector unconditionally.
For example, arch/arm64/kernel/vdso/Makefile, arch/x86/xen/Makefile.
No problem report so far about hard-coding this option. So, we can
assume all supported compilers know -fno-stack-protector.
GCC 4.8 and Clang support this option (https://godbolt.org/z/_HDGzN)
Get rid of cc-option from -fno-stack-protector.
Remove CONFIG_CC_HAS_STACKPROTECTOR_NONE, which is always 'y'.
Note:
arch/mips/vdso/Makefile adds -fno-stack-protector twice, first
unconditionally, and second conditionally. I removed the second one.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
The hardware codec on the A10, A10s, A13 and A20 needs buffer in the
first 256MB of RAM. This was solved by setting the CMA pool at a fixed
address in that range.
However, in recent kernels there's something else that comes in and
reserve some range that end up conflicting with our default pool
requirement, and thus makes its reservation fail.
The video codec will then use buffers from the usual default pool,
outside of the range it can access, and will fail to decode anything.
Since we're only concerned about that 256MB, we can however relax the
allocation to just specify the range that's allowed, and not try to
enforce a specific address.
Fixes: 5949bc5602 ("ARM: dts: sun4i-a10: Add Video Engine and reserved memory nodes")
Fixes: 9604320101 ("ARM: dts: sun5i: Add Video Engine and reserved memory nodes")
Fixes: c2a641a748 ("ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodes")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20200704130829.34297-1-maxime@cerno.tech
Remove the regulators node entirely because its children do not have any
unit addresses. This fixes DTC warning:
Warning (simple_bus_reg): /regulators/regulator-0: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Audio Graph Card is using "audio-graph-card" prefix instead of
"simple-graph-card", and moreover "widgets / routing" doesn't need it.
This patch removes unsupported "simple-graph-card" prefix from
motorola-mapphone-common.dtsi and vendor-prefixes.yaml.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/87r1ub39hq.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Instead, expose the key via the input framework, as SW_MACHINE_COVER
The chip-detect GPIO is actually detecting if the cover is closed.
Technically it's possible to use the SD card with open cover. The
only downside is risk of battery falling out and user being able
to physically remove the card.
The behaviour of SD card not being available when the device is
open is unexpected and creates more problems than it solves. There
is a high chance, that more people accidentally break their rootfs
by opening the case without physically removing the card.
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Merlijn Wajer <merlijn@wizzup.org>
Link: https://lore.kernel.org/r/20200612125402.18393-3-merlijn@wizzup.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Fix dtschema validator warnings like:
l2-cache-controller@c4200000: $nodename:0:
'l2-cache-controller@c4200000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200626080626.4080-1-krzk@kernel.org
The BeagleBoard.org PocketBeagle has P1 and P2 headers [0] which expose
many of the TI AM3358 SoC balls to stacking expansion boards called
"capes", or to other external connections like jumper wires connected
to a breadboard.
Note: the AM3358 die is actually embedded inside of the OSD335x-SM
System-in-Package (SiP) [1] but that is irrelevant to the gpio driver.
Many of the P1 and P2 header pins can muxed to a GPIO line. The
gpio-line-names describe which P1 or P2 pin that line goes to and the
default mux for that P1 or P2 pin if it is not GPIO.
Some GPIO lines are named "[NC]" as the corresponding balls are not
routed to anything on the PCB.
The goal for these names is to make it easier for a user viewing the
output of gpioinfo to determine which P1 or P2 pin is connected to a
GPIO line. The output of gpioinfo on a PocketBeagle would be:
gpiochip0 - 32 lines:
line 0: "[NC]" unused input active-high
line 1: "[NC]" unused input active-high
line 2: "P1.08 [SPI0_CLK]" unused input active-high
line 3: "P1.10 [SPI0_MISO]" unused input active-high
line 4: "P1.12 [SPI0_MOSI]" unused input active-high
line 5: "P1.06 [SPI0_CS]" unused input active-high
line 6: "[MMC0_CD]" "cd" input active-low [used]
line 7: "P2.29 [SPI1_CLK]" unused input active-high
line 8: "[SYSBOOT]" unused input active-high
line 9: "[SYSBOOT]" unused input active-high
line 10: "[SYSBOOT]" unused input active-high
line 11: "[SYSBOOT]" unused input active-high
line 12: "P1.26 [I2C2_SDA]" unused input active-high
line 13: "P1.28 [I2C2_SCL]" unused input active-high
line 14: "P2.11 [I2C1_SDA]" unused input active-high
line 15: "P2.09 [I2C1_SCL]" unused input active-high
line 16: "[NC]" unused input active-high
line 17: "[NC]" unused input active-high
line 18: "[NC]" unused input active-high
line 19: "P2.31 [SPI1_CS]" unused input active-high
line 20: "P1.20 [PRU0.16]" unused input active-high
line 21: "[NC]" unused input active-high
line 22: "[NC]" unused input active-high
line 23: "P2.03" unused input active-high
line 24: "[NC]" unused input active-high
line 25: "[NC]" unused input active-high
line 26: "P1.34" unused input active-high
line 27: "P2.19" unused input active-high
line 28: "[NC]" unused input active-high
line 29: "[NC]" unused input active-high
line 30: "P2.05 [UART4_RX]" unused input active-high
line 31: "P2.07 [UART4_TX]" unused input active-high
gpiochip1 - 32 lines:
line 0: "[NC]" unused input active-high
line 1: "[NC]" unused input active-high
line 2: "[NC]" unused input active-high
line 3: "[NC]" unused input active-high
line 4: "[NC]" unused input active-high
line 5: "[NC]" unused input active-high
line 6: "[NC]" unused input active-high
line 7: "[NC]" unused input active-high
line 8: "[NC]" unused input active-high
line 9: "P2.25 [SPI1_MOSI]" unused input active-high
line 10: "P1.32 [UART0_RX]" unused input active-high
line 11: "P1.30 [UART0_TX]" unused input active-high
line 12: "P2.24" unused input active-high
line 13: "P2.33" unused input active-high
line 14: "P2.22" unused input active-high
line 15: "P2.18" unused input active-high
line 16: "[NC]" unused input active-high
line 17: "[NC]" unused input active-high
line 18: "P2.01 [PWM1A]" unused input active-high
line 19: "[NC]" unused input active-high
line 20: "P2.10" unused input active-high
line 21: "[USR LED 0]" "beaglebone:green:usr0" output active-high [used]
line 22: "[USR LED 1]" "beaglebone:green:usr1" output active-high [used]
line 23: "[USR LED 2]" "beaglebone:green:usr2" output active-high [used]
line 24: "[USR LED 3]" "beaglebone:green:usr3" output active-high [used]
line 25: "P2.06" unused input active-high
line 26: "P2.04" unused input active-high
line 27: "P2.02" unused input active-high
line 28: "P2.08" unused input active-high
line 29: "[NC]" unused input active-high
line 30: "[NC]" unused input active-high
line 31: "[NC]" unused input active-high
gpiochip2 - 32 lines:
line 0: "P2.20" unused input active-high
line 1: "P2.17" unused input active-high
line 2: "[NC]" unused input active-high
line 3: "[NC]" unused input active-high
line 4: "[NC]" unused input active-high
line 5: "[EEPROM_WP]" unused input active-high
line 6: "[SYSBOOT]" unused input active-high
line 7: "[SYSBOOT]" unused input active-high
line 8: "[SYSBOOT]" unused input active-high
line 9: "[SYSBOOT]" unused input active-high
line 10: "[SYSBOOT]" unused input active-high
line 11: "[SYSBOOT]" unused input active-high
line 12: "[SYSBOOT]" unused input active-high
line 13: "[SYSBOOT]" unused input active-high
line 14: "[SYSBOOT]" unused input active-high
line 15: "[SYSBOOT]" unused input active-high
line 16: "[SYSBOOT]" unused input active-high
line 17: "[SYSBOOT]" unused input active-high
line 18: "[NC]" unused input active-high
line 19: "[NC]" unused input active-high
line 20: "[NC]" unused input active-high
line 21: "[NC]" unused input active-high
line 22: "P2.35 [AIN5]" unused input active-high
line 23: "P1.02 [AIN6]" unused input active-high
line 24: "P1.35 [PRU1.10]" unused input active-high
line 25: "P1.04 [PRU1.11]" unused input active-high
line 26: "[MMC0_DAT3]" unused input active-high
line 27: "[MMC0_DAT2]" unused input active-high
line 28: "[MMC0_DAT1]" unused input active-high
line 29: "[MMC0_DAT0]" unused input active-high
line 30: "[MMC0_CLK]" unused input active-high
line 31: "[MMC0_CMD]" unused input active-high
gpiochip3 - 32 lines:
line 0: "[NC]" unused input active-high
line 1: "[NC]" unused input active-high
line 2: "[NC]" unused input active-high
line 3: "[NC]" unused input active-high
line 4: "[NC]" unused input active-high
line 5: "[I2C0_SDA]" unused input active-high
line 6: "[I2C0_SCL]" unused input active-high
line 7: "[JTAG]" unused input active-high
line 8: "[JTAG]" unused input active-high
line 9: "[NC]" unused input active-high
line 10: "[NC]" unused input active-high
line 11: "[NC]" unused input active-high
line 12: "[NC]" unused input active-high
line 13: "P1.03 [USB1]" unused input active-high
line 14: "P1.36 [PWM0A]" unused input active-high
line 15: "P1.33 [PRU0.1]" unused input active-high
line 16: "P2.32 [PRU0.2]" unused input active-high
line 17: "P2.30 [PRU0.3]" unused input active-high
line 18: "P1.31 [PRU0.4]" unused input active-high
line 19: "P2.34 [PRU0.5]" unused input active-high
line 20: "P2.28 [PRU0.6]" unused input active-high
line 21: "P1.29 [PRU0.7]" unused input active-high
line 22: "[NC]" unused input active-high
line 23: "[NC]" unused input active-high
line 24: "[NC]" unused input active-high
line 25: "[NC]" unused input active-high
line 26: "[NC]" unused input active-high
line 27: "[NC]" unused input active-high
line 28: "[NC]" unused input active-high
line 29: "[NC]" unused input active-high
line 30: "[NC]" unused input active-high
line 31: "[NC]" unused input active-high
[0] https://github.com/beagleboard/pocketbeagle/wiki/System-Reference-Manual#71_Expansion_Header_Connectors
[1] https://octavosystems.com/app_notes/osd335x-family-pin-assignments/
Reviewed-by: Jason Kridner <jason@beagleboard.org>
Reviewed-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The BeagleBone Black has P8 and P9 headers [0] which expose many of the
AM3358 ZCZ SoC balls to stacking expansion boards called "capes", or to
other external connections like jumper wires connected to a breadboard.
BeagleBone users will often refer to the "Cape Exanpsion Headers" pin
diagram [1] as it is in the "Bone101" getting started tutorial. [2]
Most of the P8 and P9 header pins can muxed to a GPIO line. The
gpio-line-names describe which P8 or P9 pin that line goes to and the
default mux for that P8 or P9 pin if it is not GPIO.
For example, gpiochip 1 line 0 is connected to P8 header pin 25 (P8_25)
however the default device tree has the corresponding BGA ball (ZCZ U7)
muxed to mmc1_dat0 as it is used for the on-board eMMC chip. For that
GPIO line to be used, one would need to modify the device tree to
disable the eMMC and change the pin mux for that ball to GPIO mode.
Some of the AM3358 ZCZ balls corresponding to GPIO lines are not routed
to a P8 or P9 header, but are instead wired to some peripheral device
like on-board eMMC, HDMI framer IC, or status LEDs. Those names are in
brackets to denote those GPIO lines can not be used.
Some GPIO lines are named "[NC]" as the corresponding balls are not
routed to anything on the PCB.
The goal for these names is to make it easier for a user viewing the
output of gpioinfo to determine which P8 or P9 pin is connected to a
GPIO line. The output of gpioinfo on a BeagleBone Black would be:
gpiochip0 - 32 lines:
line 0: "[ethernet]" unused input active-high
line 1: "[ethernet]" unused input active-high
line 2: "P9_22 [spi0_sclk]" unused input active-high
line 3: "P9_21 [spi0_d0]" unused input active-high
line 4: "P9_18 [spi0_d1]" unused input active-high
line 5: "P9_17 [spi0_cs0]" unused input active-high
line 6: "[sd card]" "cd" input active-low [used]
line 7: "P9_42A [ecappwm0]" unused input active-high
line 8: "P8_35 [hdmi]" unused input active-high
line 9: "P8_33 [hdmi]" unused input active-high
line 10: "P8_31 [hdmi]" unused input active-high
line 11: "P8_32 [hdmi]" unused input active-high
line 12: "P9_20 [i2c2_sda]" unused input active-high
line 13: "P9_19 [i2c2_scl]" unused input active-high
line 14: "P9_26 [uart1_rxd]" unused input active-high
line 15: "P9_24 [uart1_txd]" unused input active-high
line 16: "[ethernet]" unused input active-high
line 17: "[ethernet]" unused input active-high
line 18: "[usb]" unused input active-high
line 19: "[hdmi]" unused input active-high
line 20: "P9_41B" unused input active-high
line 21: "[ethernet]" unused input active-high
line 22: "P8_19 [ehrpwm2a]" unused input active-high
line 23: "P8_13 [ehrpwm2b]" unused input active-high
line 24: "[NC]" unused input active-high
line 25: "[NC]" unused input active-high
line 26: "P8_14" unused input active-high
line 27: "P8_17" unused input active-high
line 28: "[ethernet]" unused input active-high
line 29: "[ethernet]" unused input active-high
line 30: "P9_11 [uart4_rxd]" unused input active-high
line 31: "P9_13 [uart4_txd]" unused input active-high
gpiochip1 - 32 lines:
line 0: "P8_25 [emmc]" unused input active-high
line 1: "[emmc]" unused input active-high
line 2: "P8_5 [emmc]" unused input active-high
line 3: "P8_6 [emmc]" unused input active-high
line 4: "P8_23 [emmc]" unused input active-high
line 5: "P8_22 [emmc]" unused input active-high
line 6: "P8_3 [emmc]" unused input active-high
line 7: "P8_4 [emmc]" unused input active-high
line 8: "[NC]" unused input active-high
line 9: "[NC]" unused input active-high
line 10: "[NC]" unused input active-high
line 11: "[NC]" unused input active-high
line 12: "P8_12" unused input active-high
line 13: "P8_11" unused input active-high
line 14: "P8_16" unused input active-high
line 15: "P8_15" unused input active-high
line 16: "P9_15A" unused input active-high
line 17: "P9_23" unused input active-high
line 18: "P9_14 [ehrpwm1a]" unused input active-high
line 19: "P9_16 [ehrpwm1b]" unused input active-high
line 20: "[emmc]" unused input active-high
line 21: "[usr0 led]" "beaglebone:green:heartbeat" output active-high [used]
line 22: "[usr1 led]" "beaglebone:green:mmc0" output active-high [used]
line 23: "[usr2 led]" "beaglebone:green:usr2" output active-high [used]
line 24: "[usr3 led]" "beaglebone:green:usr3" output active-high [used]
line 25: "[hdmi]" "interrupt" input active-high [used]
line 26: "[usb]" unused input active-high
line 27: "[hdmi audio]" "enable" output active-high [used]
line 28: "P9_12" unused input active-high
line 29: "P8_26" unused input active-high
line 30: "P8_21 [emmc]" unused input active-high
line 31: "P8_20 [emmc]" unused input active-high
gpiochip2 - 32 lines:
line 0: "P9_15B" unused input active-high
line 1: "P8_18" unused input active-high
line 2: "P8_7" unused input active-high
line 3: "P8_8" unused input active-high
line 4: "P8_10" unused input active-high
line 5: "P8_9" unused input active-high
line 6: "P8_45 [hdmi]" unused input active-high
line 7: "P8_46 [hdmi]" unused input active-high
line 8: "P8_43 [hdmi]" unused input active-high
line 9: "P8_44 [hdmi]" unused input active-high
line 10: "P8_41 [hdmi]" unused input active-high
line 11: "P8_42 [hdmi]" unused input active-high
line 12: "P8_39 [hdmi]" unused input active-high
line 13: "P8_40 [hdmi]" unused input active-high
line 14: "P8_37 [hdmi]" unused input active-high
line 15: "P8_38 [hdmi]" unused input active-high
line 16: "P8_36 [hdmi]" unused input active-high
line 17: "P8_34 [hdmi]" unused input active-high
line 18: "[ethernet]" unused input active-high
line 19: "[ethernet]" unused input active-high
line 20: "[ethernet]" unused input active-high
line 21: "[ethernet]" unused input active-high
line 22: "P8_27 [hdmi]" unused input active-high
line 23: "P8_29 [hdmi]" unused input active-high
line 24: "P8_28 [hdmi]" unused input active-high
line 25: "P8_30 [hdmi]" unused input active-high
line 26: "[emmc]" unused input active-high
line 27: "[emmc]" unused input active-high
line 28: "[emmc]" unused input active-high
line 29: "[emmc]" unused input active-high
line 30: "[emmc]" unused input active-high
line 31: "[emmc]" unused input active-high
gpiochip3 - 32 lines:
line 0: "[ethernet]" unused input active-high
line 1: "[ethernet]" unused input active-high
line 2: "[ethernet]" unused input active-high
line 3: "[ethernet]" unused input active-high
line 4: "[ethernet]" unused input active-high
line 5: "[i2c0]" unused input active-high
line 6: "[i2c0]" unused input active-high
line 7: "[emu]" unused input active-high
line 8: "[emu]" unused input active-high
line 9: "[ethernet]" unused input active-high
line 10: "[ethernet]" unused input active-high
line 11: "[NC]" unused input active-high
line 12: "[NC]" unused input active-high
line 13: "[usb]" unused input active-high
line 14: "P9_31 [spi1_sclk]" unused input active-high
line 15: "P9_29 [spi1_d0]" unused input active-high
line 16: "P9_30 [spi1_d1]" unused input active-high
line 17: "P9_28 [spi1_cs0]" unused input active-high
line 18: "P9_42B [ecappwm0]" unused input active-high
line 19: "P9_27" unused input active-high
line 20: "P9_41A" unused input active-high
line 21: "P9_25" unused input active-high
line 22: "[NC]" unused input active-high
line 23: "[NC]" unused input active-high
line 24: "[NC]" unused input active-high
line 25: "[NC]" unused input active-high
line 26: "[NC]" unused input active-high
line 27: "[NC]" unused input active-high
line 28: "[NC]" unused input active-high
line 29: "[NC]" unused input active-high
line 30: "[NC]" unused input active-high
line 31: "[NC]" unused input active-high
[0] https://git.io/JfgOd
[1] https://beagleboard.org/capes
[1] https://beagleboard.org/Support/bone101
[2] https://beagleboard.org/static/images/cape-headers.png
Reviewed-by: Jason Kridner <jason@beagleboard.org>
Reviewed-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add gpio-ranges properties to the gpio controller nodes.
These gpio-ranges were created based on "Table 9-10. CONTROL_MODULE
REGISTERS" in the "AM335x Technical Reference Manual" [0] and "Table
4-2. Pin Attributes" in the "AM335x Sitara Processor datasheet" [1].
A csv file with this data is available for reference [2].
These mappings are valid for all SoC's that are using am33xx-l4.dtsi.
In addition, the only TI AM33xx parts that actually exist are [0]:
AM3351, AM3352, AM3354, AM3356, AM3357, AM3358, AM3359
These gpio-ranges properties should be added as they describe the
relationship between a gpio line and pin control register that exists
in the hardware. For example, GPMC_A0 pin has mode 7 which is labeled
gpio1_16. conf_gpmc_a0 register is at offset 840h which makes it pin 16.
[0] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf
[1] http://www.ti.com/lit/ds/symlink/am3358.pdf
[2] https://gist.github.com/pdp7/6ffaddc8867973c1c3e8612cfaf72020
[3] http://www.ti.com/processors/sitara-arm/am335x-cortex-a8/overview.html
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IPU and DSP remote processors use sub-mailbox nodes only from a
limited set of System Mailboxes 5 and 6 to achieve the Remote Processor
Messaging (RPMsg) communication stack between the MPU host processor
and the respective remote processor. These are all defined and enabled
through the inherited common dra74-ipu-dsp-common.dtsi file.
The other System Mailboxes do not define any actual sub-mailboxes, so
they serve no purpose and can all be safely dropped.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Assign the previously added CMA reserved memory nodes to the respective
IPU and DSP rproc device nodes, and enable these rproc nodes so that
these remote processors can be booted on the AM5729 BeagleBone AI board.
The addresses and sizes of the CMA pools are identical to those used on
various other TI AM572x/AM574x based boards. The mailboxes, timers and
watchdog-timers for all these remoteprocs are inherited by including the
common dra72-ipu-dsp-common.dtsi file.
An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix dtschema validator warnings like:
l2-cache-controller@48242000: $nodename:0: 'l2-cache-controller@48242000'
does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix dtschema validator warnings like:
l2-cache-controller@48242000: $nodename:0:
'l2-cache-controller@48242000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Various OMAP3 boards have two AES blocks, but only one is currently
available, because the hwmods are only configured for one.
This patch migrates the hwmods for the AES engine to sysc-omap2
which allows the second AES crypto engine to become available.
omap-aes 480a6000.aes1: OMAP AES hw accel rev: 2.6
omap-aes 480a6000.aes1: will run requests pump with realtime priority
omap-aes 480c5000.aes2: OMAP AES hw accel rev: 2.6
omap-aes 480c5000.aes2: will run requests pump with realtime priority
Signed-off-by: Adam Ford <aford173@gmail.com>
[tony@atomide.com: updated to disable both aes_targets on hs boards]
Signed-off-by: Tony Lindgren <tony@atomide.com>
