Commit Graph

574227 Commits

Author SHA1 Message Date
Olof Johansson
d16073d385 Assorted bunch of 32bit Rockchip devicetree changes. More clocks,
nodes and fixes like the increased drive-strength on the firefly.
 Most interesting is maybe the enablement of the pl330 option
 for handling the broken flushp operation that is present on the
 current Rockchip SoCs. Together with the driver-side enablement
 this should give us working dma finally.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJWvGKWAAoJEPOmecmc0R2B2j4IAKSBKgak7uASVfvycAnJ/E7a
 jNjcz9s/SAWGAu+ES36rX23r1/u/UlkdDX0yS0vCFR4eHNn35uUrl3lQdqjFEDXZ
 f/c9gCrHsfvQQJPLGRzkhFIrQ6L/Anrgk5nq75+C4GvMFRDsDo5qqRnS0iP3wIZP
 VALc9PFqq9kJnnrdFymHVgc9ETCR+kTM9YGqDTzHYT2pHKxkBTAANx+Pr7/1Ib0b
 BM/he5i7/K+NVb9pjw6t8JbyT2JgST+UcNFeGn6jYylYdW4awFzFvJN0Q9pp989y
 7mjJe6Suh36tjp0kX0DnOvBCWYXB2i62cSsjFxsf8rZGjCbZ3YtXS15EWwXsxto=
 =wj5r
 -----END PGP SIGNATURE-----

Merge tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Assorted bunch of 32bit Rockchip devicetree changes. More clocks,
nodes and fixes like the increased drive-strength on the firefly.
Most interesting is maybe the enablement of the pl330 option
for handling the broken flushp operation that is present on the
current Rockchip SoCs. Together with the driver-side enablement
this should give us working dma finally.

* tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (30 commits)
  ARM: dts: cros-ec-keyboard: Add LOCK key to keyboard matrix
  ARM: dts: rockchip: replace gpio-key,wakeup with wakeup-source property
  ARM: dts: rockchip: add arm,pl330-broken-no-flushp quirk for rk3036 SoCs
  ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3xxx platform
  ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3288 platform
  dt-bindings: rockchip-dw-mshc: add RK3036 dw-mshc description
  ARM: dts: rockchip: increase the mclk_fs to 512 for kylin board
  ARM: dts: rockchip: support the spi for rk3036
  ARM: dts: rockchip: add mclk for rt5616 on rk3036 kylin board
  ARM: dts: rockchip: add the leds control for rk3036-kylin board
  ARM: dts: rockchip: add tsadc node
  clk: rockchip: Add new id for rk3066 tsadc clock
  ARM: dts: rockchip: add clock-cells for usb phy nodes
  ARM: dts: rockchip: Assign RK3288 EDP_24M input centrally
  ARM: dts: rockchip: add soc-specific compatibles for rk3036 SoCs
  ARM: dts: rockchip: Bump sd card pin drive strength up on firefly boards
  dt-bindings: rockchip-dw-mshc: add RK3368 dw-mshc description
  ARM: dts: rockchip: Add the SDIO wifi on Radxa Rock2 square
  ARM: dts: rockchip: Add the iodomains for the Rock2 SOM
  ARM: dts: rockchip: add rk3288 mipi_dsi nodes
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:52:42 -08:00
Olof Johansson
4d66fb810a Highlights:
-----------
  - Add DMA controller node to stm32f429 MCU
  - Add pinctrl & gpio nodes to stm32f429 MCU
  - Remap stm32429-eval board SD-Ram to 0x0 for performance boost
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWvINRAAoJEMo4jShGhw+JVb4P/3d4IzEqBAtG/MPmFv/htev9
 jH98flRic0a1KWYhUcHjGYc4klALodof2aj3h6yWkm70dYNYonP99wBWrN/PieMi
 wMPwMBlBP++ufnsghnlbTqOHGXPxEgv7NMNvWukqD18MUkS1aLAqLo6CDtCRuEIH
 fTuhF+ONcrXEdYbjzx3G4lAm96DNWYCecfNCdnTn+XXE+q+M0eTSQYcVDZ4xkvBO
 qo89o1XexgXZhTySxbD9xIob82g3fnflwD7CG6EyKV3URAH3OF72JzwiFwt5hjXJ
 E6BT529LQ0krO4nkSVxhiwuTWn2eeIYoYfJph3ja+117EaDcPahMYQJ+/JT7+mx4
 4fe7Jxwj6KdHRQktJ8hVyZHqroqcFLy+EknuLXjgezVFn58H4m11lJ6WuQVrWjqK
 FuEqVxwNwmC96VXWo+fcimECV3r0QeduDwLqxDzEaFwvwbMzccb+t8F5Qo9TXvzz
 GT99Q4FJ2yVWDwukpZrk7z0wxfCYiyZNHCwiqaz8RsSgxTADBijTM0yUzkCNJftZ
 tBjAJqLHbrjc1IMTccoyYVoaN5/NPImrbglaxAvogTg3Kemi2QziWijniG1bBF1U
 0xW0zb2qFbQCvKwKnn5dBx5jjcUySJwnVvQFsV6veDrhZJP3J/4305tJPvB1z7fM
 +TUUTqOx4GjtHimlgc1U
 =j6TZ
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32 into next/dt

Highlights:
-----------
 - Add DMA controller node to stm32f429 MCU
 - Add pinctrl & gpio nodes to stm32f429 MCU
 - Remap stm32429-eval board SD-Ram to 0x0 for performance boost

* tag 'stm32-dt-for-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32:
  ARM: dts: stm32f429: Boost perfs by remapping SDRAM Bank 1 to 0x0
  ARM: dts: Add leds support to STM32F429 boards
  ARM: dts: Add USART1 pin config to STM32F429 boards
  ARM: dts: Add pinctrl node to STM32F429
  includes: dt-bindings: Add STM32F429 pinctrl DT bindings
  ARM: dts: Add STM32 DMA support for STM32F429 MCU

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:46:41 -08:00
Olof Johansson
7fa12181b0 Few updates for ARM VExpress/Juno platforms
1. GICv3 support on Foundation models
 
 2. Support for Juno R2 board
 
 3. Support for ARM HDLCD on all Juno platforms
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJWuxfzAAoJEABBurwxfuKYF3cP/0rJX1WsVPtJZthVoA0+elTp
 ruRl2vnzxnlrGG93dpWH3HKx4o56En9AIwKHacHkVKcfoSsC3YSTFS3KD34eweFy
 GYJQxtK+eEXZnR3zxbDpyaj2bo/VqFHULB1o8WXJWSs5IAhS4eKeWLoDe/38AsV7
 GXKjoL7Gxi3znS+fZObUwBKrLSUGEgEMJp4I0tX7T1GE0sCPg5aW+ApoHfD4HYC6
 LgKaRuKfaJNrjDETIQ2TqSUuwJobT/xoYjSGPr2cMthBfPUvACXu7+fBFwpfmHct
 EAmNnxBI6f3RuuDuxCFATIMfPPOrEslyFCYBcWhwOtl0r1Y6rq+J/P9AYB3xRqYG
 KzYN33Wo87wwn8y0TULXkRrs9s0WddtulgmH/IrSKby7w7U4sCGmMcNv37kjCRGJ
 oKsSKSAag3g7kBAJEFP4X7tMwG2tl4koUmWvyZO2ihsXt1tHUYQcBLzUdw1N/pNk
 hkQjOr1BRLgEYh451QdBDzcV+QBTgDe3DaG6WpI6RNFuGnKYsqaCyh5qiZGCbvD4
 7dGquR+EBakaEEKjzVIqTva77SB0ZwVAsNgPbgXK0ibqfGuWSQq58GqwWh4Nv0cf
 Xzfihicwsak6swohmn6n5/u3gywekOsoHd1OVrb24cfFHLXcqaLOz7Rs+sFZp93v
 bxHKj68IUAhzU+awmPB9
 =r0q6
 -----END PGP SIGNATURE-----

Merge tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt

Few updates for ARM VExpress/Juno platforms

1. GICv3 support on Foundation models

2. Support for Juno R2 board

3. Support for ARM HDLCD on all Juno platforms

* tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: Add HDLCD support on Juno platforms
  Documentation: drm: Add DT bindings for ARM HDLCD
  arm64: dts: Add support for Juno r2 board
  arm64: dts: move juno pcie-controller to base file
  arm64: dts: add .dts for GICv3 Foundation model
  arm64: dts: split Foundation model dts to put the GIC separately
  arm64: dts: Foundation model: increase GICC region to allow EOImode=1
  arm64: dts: prepare foundation-v8.dts to cope with GICv3

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:40:18 -08:00
Olof Johansson
9a9f182606 Merge branch 'lpc32xx/dt' of https://github.com/vzapolskiy/linux into next/dt
Merge DT changes for lpc32xx from Vladimir Zapolskiy:

"The changes add description of clock providers and clock consumers,
define default irq types of SoC controllers and add PHY3250 board
regulators.

I'm adding an official LPC32xx maintainer Roland to Cc, however he seems
to be unresponsive for a quite long time (since 2014)."

* 'lpc32xx/dt' of https://github.com/vzapolskiy/linux:
  arm: dts: phy3250: add SD fixed regulator
  arm: dts: phy3250: add lcd and backlight fixed regulators
  arm: dts: lpc32xx: assign interrupt types
  arm: dts: lpc32xx: remove clock frequency property from UART device nodes
  arm: dts: lpc32xx: add USB clock controller
  arm: dts: lpc32xx: add clock properties to device nodes
  arm: dts: lpc32xx: add clock controller device node
  arm: dts: lpc32xx: add device nodes for external oscillators
  dt-bindings: create arm/nxp folder and move LPC32xx SoC description to it

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:38:58 -08:00
Sudeep Holla
a6b1786897 ARM: dts: spear: replace gpio-key,wakeup with wakeup-source property
Keyboard driver for GPIO buttons(gpio-keys) checks for the legacy
"gpio-key,wakeup" boolean property to enable gpio buttons as wakeup
source.

Few dts files assign value "1" to gpio-key,wakeup which is incorrect.
Since the presence of the boolean property indicates it is enabled,
value of "0" or "1" have no significance.

This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property which inturn fixes the above mentioned issue.

Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 12:20:26 -08:00
Olof Johansson
53a7aa0b49 mvebu dt for 4.6 (part 1)
- Improve Armada 38x device tree (SATA and XHCI)
 - Fix SD Card and audio support for OpenRD board
 - Provide template for RS-232/485 configuration for the same board
 - Use a common dtsi file for linkstation boards
 - Add support for Buffalo Linkstation LS-QVL
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAla5uQgACgkQCwYYjhRyO9V6zQCeKOzw/m1ORr7JskrQjovaz4Ni
 AIoAoJ9+/Gqa4sS6J+ZggH2oQnN+aeww
 =wcTq
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-dt-4.6-1' of git://git.infradead.org/linux-mvebu into next/dt

mvebu dt for 4.6 (part 1)

- Improve Armada 38x device tree (SATA and XHCI)
- Fix SD Card and audio support for OpenRD board
- Provide template for RS-232/485 configuration for the same board
- Use a common dtsi file for linkstation boards
- Add support for Buffalo Linkstation LS-QVL

* tag 'mvebu-dt-4.6-1' of git://git.infradead.org/linux-mvebu:
  ARM: dts: kirkwood: add device tree for buffalo linkstation ls-qvl
  ARM: dts: kirkwood: fix audio for OpenRD clients
  ARM: dts: kirkwood: provide template for RS-232/485 configuration for OpenRD
  ARM: dts: kirkwood: split lswvl dts to linkstation lsvl and lswvl
  ARM: dts: kirkwood: split lswxl dts to linkstation lswsxl and lswxl
  ARM: dts: kirkwood: relicense dts of ls-wvl/vl and ls-wxl/wsxl under GPLv2/X11
  ARM: dts: kirkwood: fix SD slot default configuration for OpenRD
  ARM: dts: kirkwood: fix pin names for UART/SD selection for OpenRD
  ARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370
  ARM: dts: armada-38x: use usb-nop-xceiv PHY for the xhci nodes on Armada 388 GP
  ARM: dts: armada-38x: use regulator-boot-on for SATA regulators on Armada 388 GP
  ARM: dts: armada-38x: adjust board name and compatible for Armada 388 GP

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 12:18:36 -08:00
Maxime Coquelin
b2aa7f7741 ARM: dts: stm32f429: Boost perfs by remapping SDRAM Bank 1 to 0x0
STM32F429 allows to remap FMC SDRAM Bank 1 from 0xc0000000 to 0x0,
by writing 0x4 to SYSCFG_MEMRMP register.

As mentionned in the reference manual (see chapter 9.3.1), the performance
gain is really interresting:
"In remap mode at address 0x0000 0000, the CPU can access the external
memory via ICode bus instead of System bus which boosts up the
performance."

These are the dhrystone results with and without the remap enabled:
Default (SDRAM in 0xc0000000):
---------------------------------
Microseconds for one run through Dhrystone:   31.8
Dhrystones per Second:                      31416.9

Remap (SDRAM in 0x0000000):
-----------------------------
Microseconds for one run through Dhrystone:   20.6
Dhrystones per Second:                      48520.1

This patch first change the SDRAM start address to 0x0 for STM32429i-EVAL
board, and also set the dma-range property as the other masters than the M4
CPU still see SDRAM in 0xc0000000.

Note that the Discovery board cannot benefit from this feature, since the
SDRAM is connected to Bank 2.

Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2016-02-11 12:02:59 +01:00
Maxime Coquelin
b690172f72 ARM: dts: Add leds support to STM32F429 boards
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2016-02-11 12:02:59 +01:00
Maxime Coquelin
521df6f56d ARM: dts: Add USART1 pin config to STM32F429 boards
This patch selects USART1 pin configuration on PA9/PA10 pins
for both Eval and Disco boards.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2016-02-11 12:02:58 +01:00
Maxime Coquelin
2dbd0593e8 ARM: dts: Add pinctrl node to STM32F429
The STM32F429 MCU has 11 GPIO banks, with 16 pins per bank.

Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2016-02-11 12:02:57 +01:00
Maxime Coquelin
c9eaeead95 includes: dt-bindings: Add STM32F429 pinctrl DT bindings
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2016-02-11 12:02:46 +01:00
Vladimir Zapolskiy
d06670e962 arm: dts: phy3250: add SD fixed regulator
The change adds fixed voltage regulator for SD controller, ARM MMCI
controller driver uses it to control card power management.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:36 +02:00
Vladimir Zapolskiy
f6d4434916 arm: dts: phy3250: add lcd and backlight fixed regulators
Phytec PHY3250 board has GPIO controlled regulators for LCD and
backlight, add their descriptions to board DTS file.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:32 +02:00
Vladimir Zapolskiy
b715802f23 arm: dts: lpc32xx: assign interrupt types
LPC32xx interrupt controller has two cells, instead of zero
specify proper irq types for all consumers.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:27 +02:00
Vladimir Zapolskiy
c82e688a33 arm: dts: lpc32xx: remove clock frequency property from UART device nodes
If clock-frequency property is given, then it substitutes calculation
of supplying clock frequency from parent clock, this may break UART,
if parent clock is given and managed by common clock framework.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:21 +02:00
Vladimir Zapolskiy
865e90093a arm: dts: lpc32xx: add USB clock controller
The change adds device node of LPC32xx USB clock controller and adds
clock properties to USB OHCI, USB device and I2C controller to USB phy
device nodes.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:16 +02:00
Vladimir Zapolskiy
93898eb775 arm: dts: lpc32xx: add clock properties to device nodes
The change adds clock properties to all described peripheral devices,
clock ids are taken from dt-bindings/clock/lpc32xx-clock.h

Some existing drivers expect to get clock names, in those cases
clock-names are added as well.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:11 +02:00
Vladimir Zapolskiy
fe86131f9e arm: dts: lpc32xx: add clock controller device node
NXP LPC32xx SoC has a clocking and power control unit (CPC) as a part
of system control block (SCB). CPC is supplied by two external
oscillators and it manages core and most of peripheral clocks, the
change adds SCB and CPC descriptions to shared LPC32xx dtsi file.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:05 +02:00
Vladimir Zapolskiy
ef5f885ec9 arm: dts: lpc32xx: add device nodes for external oscillators
NXP LPC32xx SoC has two external oscillators - one is mandatory and
always on 32768 Hz oscillator and one optional 10-20MHz oscillator,
which is practically always present on LPC32xx boards, because its
presence is needed to supply USB controller clock and by default it
supplies ARM and most of the peripheral clocks, LPC32xx User's Manual
references it as a main oscillator.

The change adds device nodes for both oscillators, frequency of
the main oscillator is selected to be 13MHz by default, this variant
is found on all LPC32xx reference boards.

The device nodes for external oscillators are needed to describe input
clocks of LPC32xx clock controller.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:05:59 +02:00
Vladimir Zapolskiy
ad94bd4774 dt-bindings: create arm/nxp folder and move LPC32xx SoC description to it
Create a separate folder for device tree bindings of NXP SoCs devices,
and move lpc32xx.txt to it.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:05:54 +02:00
James Chao
741d3b0c1f ARM: dts: cros-ec-keyboard: Add LOCK key to keyboard matrix
The LOCK key is at KSO9/KSI3 for Chromebook Flip and other devices
that use the Chrome OS EC keyboard matrix.

Signed-off-by: James Chao <james_chao@asus.com>
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-10 22:41:53 +01:00
Liviu Dudau
9fd9288ed0 arm64: dts: Add HDLCD support on Juno platforms
ARM's Juno platforms have two HDLCD controllers, each linked to an NXP
TDA19988 HDMI transmitter that provides output encoding. Add them
to the device tree.

Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
2016-02-10 10:58:33 +00:00
Liviu Dudau
a6356f9302 Documentation: drm: Add DT bindings for ARM HDLCD
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
2016-02-10 10:58:33 +00:00
Sudeep Holla
4f66f247f7 ARM: dts: rockchip: replace gpio-key,wakeup with wakeup-source property
Keyboard driver for GPIO buttons(gpio-keys) checks for the legacy
"gpio-key,wakeup" boolean property to enable gpio buttons as wakeup
source.

Few dts files assign value "1" to gpio-key,wakeup and in one instance a
value "0" is assigned probably assuming it won't be enabled as a wakeup
source. Since the presence of the boolean property indicates it is
enabled, value of "0" have no value.

This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property which inturn fixes the above mentioned issue.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-10 00:19:41 +01:00
Sudeep Holla
e6d7f6dc85 arm64: dts: Add support for Juno r2 board
Juno r2 is identical to Juno r1 with Cortex A57 cores replaced by
Cortex A72 cores.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2016-02-09 10:46:31 +00:00
Sudeep Holla
36582c60de arm64: dts: move juno pcie-controller to base file
The PCIe controller is found on all Juno SoC version. However it's not
functional on R0 due to some hardware bug.

In preparation to add Juno R2 support, this patch moves the
pcie-controller defination to base DTS file. It's marked as disabled by
default and is enabled for Juno R1 explicitly.

Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2016-02-09 10:46:31 +00:00
Andre Przywara
6ba29e916e arm64: dts: add .dts for GICv3 Foundation model
The ARMv8 Foundation model sports a command line parameter to use
a GICv3 emulation instead of the default GICv2 interrupt controller.
Add a new .dts file which reuses most of the definitions of the
existing model while just adding the required properties for the
GICv3 node.

This allows the public Foundation model to run with a GICv3.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2016-02-09 10:46:31 +00:00
Andre Przywara
d11a897966 arm64: dts: split Foundation model dts to put the GIC separately
The ARMv8 Foundation model can be run with a GICv2 or a GICv3.
To prepare for the GICv3 version of the .dts without code duplication,
move most of the nodes of the existing DT (except the GIC) into an
include file and just keep that include statement and the GIC node in
the current foundation-v8.dts.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2016-02-09 10:46:31 +00:00
Andre Przywara
e6b512285a arm64: dts: Foundation model: increase GICC region to allow EOImode=1
The Foundation model GIC mapping is wrong, as the GICC region should
be 8kB instead of 4kB (the model implements the GICv2 architecture).
This defect prevents the driver from switching to EOImode==1.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2016-02-09 10:46:31 +00:00
Andre Przywara
26447231fe arm64: dts: prepare foundation-v8.dts to cope with GICv3
To prepare the ARM foundation model to support GICv3, we adjust
the #address-cells property of the current GICv2 node to be
compatible with the two cells required for GICv3 later.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2016-02-09 10:46:31 +00:00
Mario Lange
5dda254d0c ARM: dts: kirkwood: add device tree for buffalo linkstation ls-qvl
Add dts file to support Buffalo Linkstation LS-QVL,
which is marvell kirkwood based 4-bay 3.5" HDD NAS.
Product info:
  - (JPN) http://buffalo.jp/product/hdd/network/ls-qvl_r5/
  - (ENG) http://www.buffalotech.com/products/network-storage/home-and-small-office/linkstation-pro-quad

Signed-off-by: Mario Lange <mario_lange@gmx.net>
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:26 +01:00
Aaro Koskinen
34cabc2a58 ARM: dts: kirkwood: fix audio for OpenRD clients
Fix audio on kirkwood-openrd-client:

1) The audio-controller was left disabled.

2) The probe fails because cs42l51 is missing #sound-dai-cells.

	/sound/simple-audio-card,codec: could not get #sound-dai-cells for /ocp@f1000000/i2c@11000/cs42l51@4a
	asoc-simple-card sound: parse error -22
	asoc-simple-card: probe of sound failed with error -22

3) The mapping is incorrect:

	asoc-simple-card sound: cs42l51-hifi <-> spdif mapping ok

   should be:

	asoc-simple-card sound: cs42l51-hifi <-> i2s mapping ok

Reported-by: Rick Thomas <rbthomas@pobox.com>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Rick Thomas <rbthomas@pobox.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:26 +01:00
Aaro Koskinen
39ac0979de ARM: dts: kirkwood: provide template for RS-232/485 configuration for OpenRD
Some OpenRD boards have RS-232 and RS-486 connectors wired, but using them
needs a custom DTB as the current DTB configures SD card slot instead.

This patch adds documentation into the DTS on how to change
the configuration.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:25 +01:00
Roger Shimizu
60ff189ca0 ARM: dts: kirkwood: split lswvl dts to linkstation lsvl and lswvl
LS-WVL/VL are both kirkwood-6282 based NAS devices, which share
many MPP pins. However they are slightly different:
  - LS-WVL is 2-Bay NAS, and LS-VL is only 1-Bay.
  - There're two red LED indicator on LS-WVL to show when HDD fails,
    which is similar to LS-WXL, but there's no such on LS-VL.

So after the split, common part goes into .dtsi file:
  - kirkwood-linkstation-6282.dtsi
while all rest part goes into device specific .dts file:
  - kirkwood-linkstation-lsvl.dts
  - kirkwood-linkstation-lswvl.dts

Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:24 +01:00
Roger Shimizu
b05465ff5b ARM: dts: kirkwood: split lswxl dts to linkstation lswsxl and lswxl
LS-WXL/WSXL are both kirkwood-6281 based 2-Bay NAS devices, which share
many MPP pins. However they are slightly different:
  - There're two red LED indicator on LS-WXL to show when HDD fails,
    but there's no such on LS-WSXL.
  - There's 4-level speed adjustable FAN on LS-WXL, but not LS-WSXL.

So after the split, common part goes into .dtsi file:
  - kirkwood-linkstation.dtsi
  - kirkwood-linkstation-duo-6281.dtsi
while all rest part goes into device specific .dts file:
  - kirkwood-linkstation-lswsxl.dts
  - kirkwood-linkstation-lswxl.dts

Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:24 +01:00
Roger Shimizu
3e2f2db885 ARM: dts: kirkwood: relicense dts of ls-wvl/vl and ls-wxl/wsxl under GPLv2/X11
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:23 +01:00
Aaro Koskinen
28c494d0c5 ARM: dts: kirkwood: fix SD slot default configuration for OpenRD
The SD card slot was enabled by default with legacy booting.
It does not work anymore with DT boot. Fix by providing GPIO configuration
that matches the old default.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:22 +01:00
Aaro Koskinen
2b1fd39864 ARM: dts: kirkwood: fix pin names for UART/SD selection for OpenRD
The UART/SD pin names are swapped, fix that.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:22 +01:00
Gregory CLEMENT
ce5cad51f3 ARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370
Since the commit a526973e02 ("pinctrl: mvebu: Fix mapping of pin
63 (gpo -> gpio)"), the mpp63 is no more declared as a GPO but is a
GPIO. Even if in the datasheet this pin is described as GPO, the
experience of the D-Link DNS-327L board shows that it can be used as a
GPIO.

This commits generated warnings for the board using this pin as gpo, with
this patch the dts are fixed by using the new function (gpio) instead of
the old one.

The binding documentation has also been updated accordingly.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
2016-02-09 11:00:16 +01:00
Gregory CLEMENT
96c78e2b77 ARM: dts: armada-38x: use usb-nop-xceiv PHY for the xhci nodes on Armada 388 GP
Using the usb-nop-xceiv PHY for the xhci nodes allows a better
representation of the hardware but also a better handling of the
regulator. By linking the regulator to the PHY there is no more need to
use the regulator-always-on property, then it allows a better power
management.

The remaining usb node uses the ehci-orion driver which can't be used
with the usb-nop-xceiv PHY and must keeps the direct link to the
regulator with the regulator-always-on property.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:10 +01:00
Thomas Petazzoni
a8409c65df ARM: dts: armada-38x: use regulator-boot-on for SATA regulators on Armada 388 GP
Really, what we meant by regulator-always-on is that the regulators
are already turned on by the bootloader, for which regulator-boot-on
is a better description.

A net advantage of using regulator-boot-on is that the regulator is
not touched at boot time by the kernel, which avoids having the hard
drives spinning down and then up again, taking several (~5) seconds of
additional boot time.

In addition, there is no need to have such properties on the child
regulators used for SATA. Having it on the parent regulator that
really controls the GPIO is sufficient.

Without the patch:

[    3.945866] ata2: SATA link down (SStatus 0 SControl 300)
[    3.995862] ata3: SATA link down (SStatus 0 SControl 300)
[    4.005863] ata4: SATA link down (SStatus 0 SControl 300)
[    9.125861] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[    9.144575] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[    9.151471] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)

 (and you can hear the disk spinning down and up during this 5.1
 seconds delay)

With the patch:

[    3.945988] ata2: SATA link down (SStatus 0 SControl 300)
[    4.005980] ata4: SATA link down (SStatus 0 SControl 300)
[    4.011404] ata3: SATA link down (SStatus 0 SControl 300)
[    4.145978] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[    4.153701] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[    4.160597] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 10:59:58 +01:00
Thomas Petazzoni
05abb9754b ARM: dts: armada-38x: adjust board name and compatible for Armada 388 GP
As the name of the Device Tree file name suggests, the Armada 388 GP
really contains an Armada 388 SoC, so this commit updates the board
name and compatible string in the Device Tree file.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 10:53:06 +01:00
Caesar Wang
29f12bbab4 ARM: dts: rockchip: add arm,pl330-broken-no-flushp quirk for rk3036 SoCs
Pl330 integrated in rk3036 platform that doesn't support
DMAFLUSHP function. So we add 'arm,pl330-broken-no-flushp' quirk
for rk3036.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-09 08:43:20 +01:00
Shawn Lin
9bed8b41d8 ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3xxx platform
Pl330 integrated in rk3xxx platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-09 08:41:50 +01:00
Addy Ke
e7d6c9b116 ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3288 platform
Pl330 integrated in rk3288 platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.

Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-09 08:41:02 +01:00
Linus Torvalds
388f7b1d6e Linux 4.5-rc3 2016-02-07 15:38:30 -08:00
Linus Torvalds
c17dfb019d ARM: SoC fixes for v4.5-rc
The first real batch of fixes for this release cycle, so there are a few more
 than usual.
 
 Most of these are fixes and tweaks to board support (DT bugfixes, etc). I've
 also picked up a couple of small cleanups that seemed innocent enough that
 there was little reason to wait (const/__initconst and Kconfig deps).
 
 Quite a bit of the changes on OMAP were due to fixes to no longer write to
 rodata from assembly when ARM_KERNMEM_PERMS was enabled, but there were also
 other fixes.
 
 Kirkwood had a bunch of gpio fixes for some boards. OMAP had RTC fixes
 on OMAP5, and Nomadik had changes to MMC parameters in DT.
 
 All in all, mostly the usual mix of various fixes.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWt8K0AAoJEIwa5zzehBx3HxsQAJMqKkTCr/2hzHTw5V8sTgDf
 zrVYEi5WF5IGLR4eON31rF31tbEmQd0bqVlsTLy/yK3hu1gTQwDyqBJqoEQBMQUW
 lBShtVERP3mNUm0yICeupaWIhoRqaymlwFKKfq93f+YTn27pEDQ1ImEHuARlbAKa
 3zCd91ClRRm3WxrBXj9srt/NyMX7BlcHLjcN1BurpVkR0aciW1B692Lb8LotEP4k
 D1CLNZeQEwV+uOHcJsvjEdB/Uh42+dpsxbIAaBW2cFB0iuX3BsnmferoFe0cXmpC
 wO5ffvzr0LCMsrUzUsbvn0RgRtMDi2RxrS1n0cXrAVPP6OEeOaMLwGdPUGvQ2EVI
 cvCHpw3qXRz7CTERpy7bv0YugIY3vZPukJrne2ZEH7cpA/JLsuqlKm/cOmPRB7gJ
 tC2mXlP5jHbbGRiq/Kk3QB7QsKIxHfIalCZMMiRe0ldWSDW6jDpvrv4Nsfzs3etN
 LaB0iIm3f5DqOFjjZi+LVUJUGE3M8/3Fs2f70rCdPKDGq9fTqD3+2mK7l80ZaYXG
 J3wPKM+9WXGISakS/biQzvYA9iDnbDZCTUxBIM6VlvcHmARJEH3TS5ZjR0eaIb7w
 Sqx7e2ufm/2wpGINDoT1qms14cI8ayj7iq+8fDnI3R9XSXxeKk5J5jo9fKnbnDWP
 4A4Ai+NYBv/rDWjkg19s
 =1iBu
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "The first real batch of fixes for this release cycle, so there are a
  few more than usual.

  Most of these are fixes and tweaks to board support (DT bugfixes,
  etc).  I've also picked up a couple of small cleanups that seemed
  innocent enough that there was little reason to wait (const/
  __initconst and Kconfig deps).

  Quite a bit of the changes on OMAP were due to fixes to no longer
  write to rodata from assembly when ARM_KERNMEM_PERMS was enabled, but
  there were also other fixes.

  Kirkwood had a bunch of gpio fixes for some boards.  OMAP had RTC
  fixes on OMAP5, and Nomadik had changes to MMC parameters in DT.

  All in all, mostly the usual mix of various fixes"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (46 commits)
  ARM: multi_v7_defconfig: enable DW_WATCHDOG
  ARM: nomadik: fix up SD/MMC DT settings
  ARM64: tegra: Add chosen node for tegra132 norrin
  ARM: realview: use "depends on" instead of "if" after prompt
  ARM: tango: use "depends on" instead of "if" after prompt
  ARM: tango: use const and __initconst for smp_operations
  ARM: realview: use const and __initconst for smp_operations
  bus: uniphier-system-bus: revive tristate prompt
  arm64: dts: Add missing DMA Abort interrupt to Juno
  bus: vexpress-config: Add missing of_node_put
  ARM: dts: am57xx: sbc-am57x: correct Eth PHY settings
  ARM: dts: am57xx: cl-som-am57x: fix CPSW EMAC pinmux
  ARM: dts: am57xx: sbc-am57x: fix UART3 pinmux
  ARM: dts: am57xx: cl-som-am57x: update SPI Flash frequency
  ARM: dts: am57xx: cl-som-am57x: set HOST mode for USB2
  ARM: dts: am57xx: sbc-am57x: fix SB-SOM EEPROM I2C address
  ARM: dts: LogicPD Torpedo: Revert Duplicative Entries
  ARM: dts: am437x: pixcir_tangoc: use correct flags for irq types
  ARM: dts: am4372: fix irq type for arm twd and global timer
  ARM: dts: at91: sama5d4 xplained: fix phy0 IRQ type
  ...
2016-02-07 15:23:20 -08:00
Linus Torvalds
63fee123da Merge branch 'mailbox-devel' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox fixes from Jassi Brar:

 - fix getting element from the pcc-channels array by simply indexing
   into it

 - prevent building mailbox-test driver for archs that don't have IOMEM

* 'mailbox-devel' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: Fix dependencies for !HAS_IOMEM archs
  mailbox: pcc: fix channel calculation in get_pcc_channel()
2016-02-07 15:17:47 -08:00
Linus Torvalds
46df55ceea USB fixes for 4.5-rc3
Here are some USB fixes for 4.5-rc3.
 
 The usual, xhci fixes for reported issues, combined with some small
 gadget driver fixes, and a MAINTAINERS file update.  All have been in
 linux-next with no reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iEYEABECAAYFAla205wACgkQMUfUDdst+ymVcACgksg9fcSsphvjo4ruxN79QrjW
 GaEAn3VmLc2WyLf13on9cXmBi8KrS+WY
 =sFPR
 -----END PGP SIGNATURE-----

Merge tag 'usb-4.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB fixes from Greg KH:
 "Here are some USB fixes for 4.5-rc3.

  The usual, xhci fixes for reported issues, combined with some small
  gadget driver fixes, and a MAINTAINERS file update.  All have been in
  linux-next with no reported issues"

* tag 'usb-4.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb:
  xhci: harden xhci_find_next_ext_cap against device removal
  xhci: Fix list corruption in urb dequeue at host removal
  usb: host: xhci-plat: fix NULL pointer in probe for device tree case
  usb: xhci-mtk: fix AHB bus hang up caused by roothubs polling
  usb: xhci-mtk: fix bpkts value of LS/HS periodic eps not behind TT
  usb: xhci: apply XHCI_PME_STUCK_QUIRK to Intel Broxton-M platforms
  usb: xhci: set SSIC port unused only if xhci_suspend succeeds
  usb: xhci: add a quirk bit for ssic port unused
  usb: xhci: handle both SSIC ports in PME stuck quirk
  usb: dwc3: gadget: set the OTG flag in dwc3 gadget driver.
  Revert "xhci: don't finish a TD if we get a short-transfer event mid TD"
  MAINTAINERS: fix my email address
  usb: dwc2: Fix probe problem on bcm2835
  Revert "usb: dwc2: Move reset into dwc2_get_hwparams()"
  usb: musb: ux500: Fix NULL pointer dereference at system PM
  usb: phy: mxs: declare variable with initialized value
  usb: phy: msm: fix error handling in probe.
2016-02-06 22:14:46 -08:00
Linus Torvalds
dacd53c805 Staging / IIO driver fixes for 4.5-rc3
Here are some IIO and staging driver fixes for 4.5-rc3.  All of them,
 except one, are for IIO drivers, and one is for a speakup driver fix
 caused by some earlier patches, to resolve a reported build failure.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iEYEABECAAYFAla21D8ACgkQMUfUDdst+ykHiQCgqYizz86HYi3ZR0LRgGwm3Gws
 4sEAn2x230E41WXDhLTLT3N6fAaetYl9
 =wa/Y
 -----END PGP SIGNATURE-----

Merge tag 'staging-4.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging and IIO driver fixes from Greg KH:
 "Here are some IIO and staging driver fixes for 4.5-rc3.

  All of them, except one, are for IIO drivers, and one is for a speakup
  driver fix caused by some earlier patches, to resolve a reported build
  failure"

* tag 'staging-4.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
  Staging: speakup: Fix allyesconfig build on mn10300
  iio: dht11: Use boottime
  iio: ade7753: avoid uninitialized data
  iio: pressure: mpl115: fix temperature offset sign
  iio: imu: Fix dependencies for !HAS_IOMEM archs
  staging: iio: Fix dependencies for !HAS_IOMEM archs
  iio: adc: Fix dependencies for !HAS_IOMEM archs
  iio: inkern: fix a NULL dereference on error
  iio:adc:ti_am335x_adc Fix buffered mode by identifying as software buffer.
  iio: light: acpi-als: Report data as processed
  iio: dac: mcp4725: set iio name property in sysfs
  iio: add HAS_IOMEM dependency to VF610_ADC
  iio: add IIO_TRIGGER dependency to STK8BA50
  iio: proximity: lidar: correct return value
  iio-light: Use a signed return type for ltr501_match_samp_freq()
2016-02-06 22:13:16 -08:00