Commit Graph

854 Commits

Author SHA1 Message Date
Rex Zhu
61e208b16e drm/amd/pp: Fix sysfs pp_dpm_pcie bug on CI/VI
when echo "01">pp_dpm_pcie
the pcie dpm will fix in highest link speed.
But user should expect auto speed between
level 0 and level1

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:19:07 -05:00
Rex Zhu
337ecd6a98 drm/amd/pp: Enable pp_set_power_profile_mode under manual mode
Only user enter manual performance mode, driver allow user
configure the sclk/mclk dpm parameters through sysfs
pp_power_profile_mode.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:19:06 -05:00
Rex Zhu
948fd66c94 drm/amd/pp: Refine pp_dpm_force_clock_level functions
Only when user set manual performance mode, driver
enable pp_dpm_force_clock_level.
so check the mode in pp_dpm_force_clock_level,
and delete the same logic in callback functions.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:19:06 -05:00
Rex Zhu
6fa3ef3a9c drm/amd/pp: Delete debug info when set power_profile_mode
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:19:05 -05:00
Luis de Bethencourt
122fe39da4 drm: amd: Fix trailing semicolons
The trailing semicolon is an empty statement that does no operation.
Removing the two instances of them since they don't do anything.

Signed-off-by: Luis de Bethencourt <luisbg@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:19:03 -05:00
Alex Deucher
21a381f79e drm/amdgpu/pp: remove the get_temperature API
This is also supported with the read_sensor API and there
were no more users of the get_temperature API.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:51 -05:00
Rex Zhu
c1f2fb6b63 drm/amd/pp: Delete unnecessary function argument
in populate_single_graphic_level for smu7

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:48 -05:00
Rex Zhu
c7429b3ae9 drm/amd/pp: Add struct profile_mode_setting for smu7
Move configurable profiling parameters to struct
profile_mode_setting and initialize current_profile_setting.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:47 -05:00
Rex Zhu
527d9427fa drm/amd/pp: Delete dead code in powerplay
As not support per DPM level optimization,
so delete activity_target array.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:47 -05:00
Rex Zhu
ce91b71c9a drm/amd/pp: Change activity_target for performance optimization on Polaris
And not support perDPM level optimization on Polaris, so
delete sclk activity_target array.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:46 -05:00
Rex Zhu
3c9d1fde7f drm/amd/pp: Add update_avfs call when set_power_state
when Overdrive voltage, need to disable AVFS.
when OverDriv engine clock, need to recalculate
AVFS voltage by disable/enable avfs feature.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:20 -05:00
Rex Zhu
49fd66e5d5 drm/amd/pp: Update smu7 dpm table with OD clock/voltage
Delete old OD type code path when populate clk.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:19 -05:00
Rex Zhu
5e4d4fbea5 drm/amd/pp: Implement edit_dpm_table on smu7
v2: - check clk against OverDrive limits from VBIOS
    - set OD flag when user commit the setting.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:19 -05:00
Rex Zhu
b7e919b940 drm/amd/pp: Disable OD feature on APU/Iceland
Not supported on APUs or Iceland.
and still not enabled on CI.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:18 -05:00
Rex Zhu
3abb20264d drm/amd/pp: Disable OD feature if VBIOS limits
Check vbios to determine whether we can enable OD

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:18 -05:00
Rex Zhu
e3933f26b6 drm/amd/pp: Add edit/commit/show OD clock/voltage support in sysfs
when cat pp_od_clk_voltage it show
OD_SCLK:
0:        300Mhz        800 mV
1:        466Mhz        818 mV
2:        751Mhz        824 mV
3:       1019Mhz        987 mV
4:       1074Mhz       1037 mV
5:       1126Mhz       1087 mV
6:       1169Mhz       1137 mV
7:       1206Mhz       1150 mV
OD_MCLK:
0:        300Mhz        800 mV
1:       1650Mhz       1000 mV

echo "s/m level clock voltage" to change
sclk/mclk's  clock and voltage

echo "r" to restore default value.
echo "c" to commit the user setting.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:17 -05:00
Rex Zhu
897e1bbeec drm/amd/pp: Add hwmgr interface for edit dpm table
Add odn_edit_dpm_table function
points for setting user assigned clock/voltage.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:16 -05:00
Alex Deucher
04f618eb3b drm/amdgpu/powerplay/vega10: fix compute profile name
COMPUTER -> COMPUTE

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:15 -05:00
Hawking Zhang
48569ffce9 drm/amd/pp: include new ip and ip offset headers
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:13 -05:00
Rex Zhu
6df21b7726 drm/amd/pp: Add OD driver clock/voltage display on smu7
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:56 -05:00
Rex Zhu
5d97cf39ff drm/amd/pp: Add and initialize OD_dpm_table for CI/VI.
Add initial infrastructure for manual dpm control.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:56 -05:00
Rex Zhu
11f64ff5f3 drm/amd/pp: Add a new pp feature mask bit for OD feature
when this bit was set on module load,
driver will allow the user over/under gpu
clock and voltage through sysfs.

by default, this bit was not set.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:55 -05:00
Rex Zhu
59fc8cde73 drm/amd/pp: Move DPMTABLE_* definitions to common header file
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:54 -05:00
Rex Zhu
ee85c07abe drm/amd/pp: Refine code abbreviate variable name
abbreviate variable name number_of_performance_levels
to num_of_pl in struct phm_odn_clock_levels

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:54 -05:00
Rex Zhu
5ed8d656d6 drm/amd/pp: Add stable Pstate clk display support in debugfs
The additional output are: PSTATE_SCLK and PSTATE_MCLK value
in MHz as:

300 MHz (PSTATE_SCLK)
300 MHz (PSTATE_MCLK)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:53 -05:00
Rex Zhu
dd70949d90 drm/amd/pp: Store stable Pstate clocks
User can use to calculate profiling ratios when
set UMD Pstate.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:53 -05:00
Rex Zhu
6390258a2f drm/amd/pp: Add custom power profile mode support on Vega10
v2: delete uncessary blank line.
    Add static const modifiers to an array

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:52 -05:00
Rex Zhu
e8ea1b9aa0 drm/amd/pp: Fix SMIO implementation on CI
Setup smio table(smio registers's address and voltage ID)
for various voltage domain.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:51 -05:00
Rex Zhu
53241e01b9 drm/amd/pp: Implement voltage regulator config on CI
Store the voltage regulator configuration
so we can properly query the voltage

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:50 -05:00
Rex Zhu
59655cb6ab drm/amd/pp: Add querying current gfx voltage for Vega10
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:50 -05:00
Rex Zhu
84877256f6 drm/amd/pp: Add querying current gfx voltage for CI/VI
Store the voltage regulator configuration,
so we can properly query the voltage.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:49 -05:00
Rex Zhu
039fdc94c1 drm/amd/pp: Add memory clock info display on Cz/St
show mclk info as in MHz on Cz/St as
0: 333Mhz *
1: 800Mhz

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:48 -05:00
Rex Zhu
4efe9b4794 drm/amd/pp: Refine code shorten variable name
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:16 -05:00
Rex Zhu
9bd2bae13d drm/amd/pp: Add a helper to convert VID to voltage value
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:15 -05:00
Evan Quan
10cd19c877 drm/amd/powerplay: use ffs/fls instead of implementing our own
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:09 -05:00
Evan Quan
31a47dcab8 drm/amd/powerplay: export the thermal ranges of Carrizo (V2)
V2: reuse the SMUThermal structure defined in pp_thermal.h

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:09 -05:00
Evan Quan
4ba082572a drm/amd/powerplay: export the thermal ranges of VI asics (V2)
V2: move the SMU7Thermal structure to newly created header file

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:08 -05:00
Evan Quan
0a91ee0775 drm/amd/powerplay: export vega10 specific thermal ranges (V2)
V2: new header file to hold the common SMU7Thermal structure

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:08 -05:00
Alex Deucher
77f208d91b drm/amd/powerplay: export thermal range through temp sysfs
Populate the hwmon temp range as part of thermal controller setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:07 -05:00
Evan Quan
80cfd1db67 drm/amd/powerplay: new hw manager interface for retrieving device specific thermal range
Added a new callback for asic specific backends to specify the temperature ranges.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:07 -05:00
Evan Quan
4ad9d4dd65 drm/amd/powerplay: correct PP_TemperatureRange member type since negative values are part of the valid range
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:05 -05:00
Evan Quan
39199b803b drm/amd/powerplay: removed hwmgr_handle_task unused parameter and given a better name for
other parameter

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:05 -05:00
Evan Quan
8053e976cf drm/amd/powerplay: remove unused parameter of phm_start_thermal_controller (v2)
Unused.

v2: squash in warning fix (Harry)

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:04 -05:00
Julia Lawall
1446413f21 drm/amd/powerplay: drop unneeded newline
PP_ASSERT_WITH_CODE prints a newline at the end of the message string,
so the message string does not need to include a newline explicitly.
Done using Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:03 -05:00
Andrey Grodzovsky
adab595d16 drm/amd/powerplay: Fix smu_table_entry.handle type
The handle describes kernel logical address, should be
unsigned long and not uint32_t.
Fixes KASAN error and GFP on driver unload.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-01-18 16:10:36 -05:00
Rex Zhu
ad8cec7df5 drm/amd/pp: Implement get_max_high_clocks for CI/VI
v2: add table length check.

DC component expect PP to give max engine clock and
memory clock through pp_get_display_mode_validation_clocks
on DGPU as well.

This patch can fix MultiGPU-Display blank
out with 1 IGPU-4k display and 2 DGPU-two 4K
displays.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-10 15:44:55 -05:00
Evan Quan
4dbda35ffa drm/amd/powerplay: set pp_num_states as 0 on error situation
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-10 15:44:52 -05:00
Yintian Tao
a25513e7b9 drm/amd/powerplay: fix memory leakage when reload (v2)
add smu_free_memory when smu fini to prevent memory leakage

v2: squash in typo fix (Yintian) and warning (Harry)

Signed-off-by: Yintian Tao <yttao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-10 15:44:50 -05:00
Rex Zhu
873a7ea300 drm/amd/pp: Get and save CZ/ST smu version
The smu firmware is loaded by the sbios on APUs, so query it
from the smu and save the smu fw version info that is reported
to userspace.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27 11:34:15 -05:00
Rex Zhu
923a50a686 drm/amd/pp: Implement force_dpm_level on Rv
user can change dpm level on Rv through sysfs

v3: add smu version check
v2: fix no return statement

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-20 11:59:40 -05:00