Alex Deucher
7876c7ea14
drm/amdgpu/vcn2.0: remove intermediate variable
...
No need to use the tmp variable, just use the constant
directly.
Reviewed-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-21 23:38:53 -04:00
Alex Deucher
c5dd5667f4
drm/amdgpu: Consolidate VCN firmware setup code
...
Roughly the same code was present in all VCN versions.
Consolidate it into a single function.
v2: use AMDGPU_UCODE_ID_VCN + i, check if num_inst >= 2
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Reviewed-by: James Zhu <James.Zhu@amd.com >
2021-10-21 23:38:46 -04:00
Alex Deucher
e8ac9e93b4
drm/amdgpu/vcn3.0: handle harvesting in firmware setup
...
Only enable firmware for the instance that is enabled.
v2: use AMDGPU_UCODE_ID_VCN + i
Fixes: 1b592d00b4 ("drm/amdgpu/vcn: remove manual instance setting")
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1743
Reviewed-by: James Zhu <James.Zhu@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-21 23:38:41 -04:00
Philip Yang
33c6bd989d
drm/amdkfd: debug message to count successfully migrated pages
...
Not all migrate.cpages returned from migrate_vma_setup can be migrated,
for example non anonymous page, or out of device memory. So after
migrate_vma_pages returns, add debug message to count pages are
successfully migrated which has MIGRATE_PFN_VALID and
MIGRATE_PFN_MIGRATE flag set.
Signed-off-by: Philip Yang <Philip.Yang@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-21 23:38:35 -04:00
Philip Yang
75fa98d6e4
drm/amdkfd: clarify the origin of cpages returned by migration functions
...
cpages is only updated by migrate_vma_setup. So capture its value at
that point to clarify the significance of the number. The next patch
will add counting of actually migrated pages after migrate_vma_pages for
debug purposes.
Signed-off-by: Philip Yang <Philip.Yang@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-21 23:38:29 -04:00
Jingwen Chen
e77f0f5c6a
drm/amd/amdgpu: add dummy_page_addr to sriov msg
...
Add dummy_page_addr to sriov msg for host driver to set
GCVM_L2_PROTECTION_DEFAULT_ADDR* registers correctly.
v2:
should update vf2pf msg instead
Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com >
Reviewed-by: Horace Chen <horace.chen@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-21 23:38:16 -04:00
Huang Rui
a61794bd2f
drm/amdgpu: remove grbm cam index/data operations for gfx v10
...
PSP firmware will be responsible for applying the GRBM CAM remapping in
the production. And the GRBM_CAM_INDEX / GRBM_CAM_DATA registers will be
protected by PSP under security policy. So remove it according to the
new security policy.
Signed-off-by: Huang Rui <ray.huang@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-21 23:38:10 -04:00
Vignesh Chander
ac82902df9
drm/amd/pm: Enable GPU metrics for One VF mode
...
Enable GPU metrics feature in one VF mode.
These are only possible in one VF mode because the VF is dedicated in that case.
Signed-off-by: Vignesh Chander <Vignesh.Chander@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-21 23:37:52 -04:00
Jessica Zhang
409af447c2
drm/msm/dsi: fix wrong type in msm_dsi_host
...
Change byte_clk_rate, pixel_clk_rate, esc_clk_rate, and src_clk_rate
from u32 to unsigned long, since clk_get_rate() returns an unsigned long.
Fixes: a6bcddbc2e ("drm/msm: dsi: Handle dual-channel for 6G as well")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com >
Signed-off-by: Jessica Zhang <jesszhan@codeaurora.org >
Link: https://lore.kernel.org/r/20211020183438.32263-1-jesszhan@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org >
2021-10-21 13:41:10 -07:00
Jessica Zhang
8bf71a5719
drm/msm: Fix potential NULL dereference in DPU SSPP
...
Move initialization of sblk in _sspp_subblk_offset() after NULL check to
avoid potential NULL pointer dereference.
Fixes: 25fdd5933e ("drm/msm: Add SDM845 DPU support")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com >
Signed-off-by: Jessica Zhang <jesszhan@codeaurora.org >
Link: https://lore.kernel.org/r/20211020175733.3379-1-jesszhan@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org >
2021-10-21 13:40:28 -07:00
Dave Airlie
6f2f7c8330
Merge tag 'drm-intel-gt-next-2021-10-21' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
...
UAPI Changes:
- Expose multi-LRC submission interface
Similar to the bonded submission interface but simplified.
Comes with GuC only implementation for now. See kerneldoc
for more details.
Userspace changes: https://github.com/intel/media-driver/pull/1252
- Expose logical engine instance to user
Needed by the multi-LRC submission interface for GuC
Userspace changes: https://github.com/intel/media-driver/pull/1252
Driver Changes:
- Fix blank screen booting crashes when CONFIG_CC_OPTIMIZE_FOR_SIZE=y (Hugh)
- Add support for multi-LRC submission in the GuC backend (Matt B)
- Add extra cache flushing before making pages userspace visible (Matt A, Thomas)
- Mark internal GPU object pages dirty so they will be flushed properly (Matt A)
- Move remaining debugfs interfaces i915_wedged/i915_forcewake_user into gt (Andi)
- Replace the unconditional clflushes with drm_clflush_virt_range() (Ville)
- Remove IS_ACTIVE macro completely (Lucas)
- Improve kerneldocs for cache_dirty (Matt A)
- Add missing includes (Lucas)
- Selftest improvements (Matt R, Ran, Matt A)
Signed-off-by: Dave Airlie <airlied@redhat.com >
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/YXFmLKoq8Fg9JxSd@jlahtine-mobl.ger.corp.intel.com
2021-10-22 06:30:34 +10:00
Kim Phillips
595cb5e0b8
Revert "drm/ast: Add detect function support"
...
This reverts commit aae74ff9ca ,
since it prevents my AMD Milan system from booting, with:
[ 27.189558] BUG: kernel NULL pointer dereference, address: 0000000000000000
[ 27.197506] #PF: supervisor write access in kernel mode
[ 27.203333] #PF: error_code(0x0002) - not-present page
[ 27.209064] PGD 0 P4D 0
[ 27.211885] Oops: 0002 [#1 ] PREEMPT SMP NOPTI
[ 27.216744] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.15.0-rc6+ #15
[ 27.223928] Hardware name: AMD Corporation ETHANOL_X/ETHANOL_X, BIOS RXM1006B 08/20/2021
[ 27.232955] RIP: 0010:run_timer_softirq+0x38b/0x4a0
[ 27.238397] Code: 4c 89 f7 e8 37 27 ac 00 49 c7 46 08 00 00 00 00 49 8b 04 24 48 85 c0 74 71 4d 8b 3c 24 4d 89 7e 08 66 90 49 8b 07 49 8b 57 08 <48> 89 02 48 85 c0 74 04 48 89 50 08 49 8b 77 18 41 f6 47 22 20 4c
[ 27.259350] RSP: 0018:ffffc42d00003ee8 EFLAGS: 00010086
[ 27.265176] RAX: dead000000000122 RBX: 0000000000000000 RCX: 0000000000000101
[ 27.273134] RDX: 0000000000000000 RSI: 0000000000000087 RDI: 0000000000000001
[ 27.281084] RBP: ffffc42d00003f70 R08: 0000000000000000 R09: 00000000000003eb
[ 27.289043] R10: ffffa0860cb300d0 R11: ffffa0c44de290b0 R12: ffffc42d00003ef8
[ 27.297002] R13: 00000000fffef200 R14: ffffa0c44de18dc0 R15: ffffa0867a882350
[ 27.304961] FS: 0000000000000000(0000) GS:ffffa0c44de00000(0000) knlGS:0000000000000000
[ 27.313988] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 27.320396] CR2: 0000000000000000 CR3: 000000014569c001 CR4: 0000000000770ef0
[ 27.328346] PKRU: 55555554
[ 27.331359] Call Trace:
[ 27.334073] <IRQ>
[ 27.336314] ? __queue_work+0x420/0x420
[ 27.340589] ? lapic_next_event+0x21/0x30
[ 27.345060] ? clockevents_program_event+0x8f/0xe0
[ 27.350402] __do_softirq+0xfb/0x2db
[ 27.354388] irq_exit_rcu+0x98/0xd0
[ 27.358275] sysvec_apic_timer_interrupt+0xac/0xd0
[ 27.363620] </IRQ>
[ 27.365955] asm_sysvec_apic_timer_interrupt+0x12/0x20
[ 27.371685] RIP: 0010:cpuidle_enter_state+0xcc/0x390
[ 27.377292] Code: 3d 01 79 0a 50 e8 44 ed 77 ff 49 89 c6 0f 1f 44 00 00 31 ff e8 f5 f8 77 ff 80 7d d7 00 0f 85 e6 01 00 00 fb 66 0f 1f 44 00 00 <45> 85 ff 0f 88 17 01 00 00 49 63 c7 4c 2b 75 c8 48 8d 14 40 48 8d
[ 27.398243] RSP: 0018:ffffffffb0e03dc8 EFLAGS: 00000246
[ 27.404069] RAX: ffffa0c44de00000 RBX: 0000000000000001 RCX: 000000000000001f
[ 27.412028] RDX: 0000000000000000 RSI: ffffffffb0bafc1f RDI: ffffffffb0bbdb81
[ 27.419986] RBP: ffffffffb0e03e00 R08: 00000006549f8f3f R09: ffffffffb1065200
[ 27.427935] R10: ffffa0c44de27ae4 R11: ffffa0c44de27ac4 R12: ffffa0c5634cb000
[ 27.435894] R13: ffffffffb1065200 R14: 00000006549f8f3f R15: 0000000000000001
[ 27.443854] ? cpuidle_enter_state+0xbb/0x390
[ 27.448712] cpuidle_enter+0x2e/0x40
[ 27.452695] call_cpuidle+0x23/0x40
[ 27.456584] do_idle+0x1f0/0x270
[ 27.460181] cpu_startup_entry+0x20/0x30
[ 27.464553] rest_init+0xd4/0xe0
[ 27.468149] arch_call_rest_init+0xe/0x1b
[ 27.472619] start_kernel+0x6bc/0x6e2
[ 27.476764] x86_64_start_reservations+0x24/0x26
[ 27.481912] x86_64_start_kernel+0x75/0x79
[ 27.486477] secondary_startup_64_no_verify+0xb0/0xbb
[ 27.492111] Modules linked in: kvm_amd(+) kvm ipmi_si(+) ipmi_devintf rapl wmi_bmof ipmi_msghandler input_leds ccp k10temp mac_hid sch_fq_codel msr ip_tables x_tables autofs4 btrfs blake2b_generic zstd_compress raid10 raid456 async_raid6_recov async_memcpy async_pq async_xor async_tx xor raid6_pq libcrc32c raid1 raid0 multipath linear ast i2c_algo_bit drm_vram_helper drm_ttm_helper ttm drm_kms_helper crct10dif_pclmul crc32_pclmul ghash_clmulni_intel syscopyarea aesni_intel sysfillrect crypto_simd sysimgblt fb_sys_fops cryptd hid_generic cec nvme ahci usbhid drm e1000e nvme_core hid libahci i2c_piix4 wmi
[ 27.551789] CR2: 0000000000000000
[ 27.555482] ---[ end trace 897987dfe93dccc6 ]---
[ 27.560630] RIP: 0010:run_timer_softirq+0x38b/0x4a0
[ 27.566069] Code: 4c 89 f7 e8 37 27 ac 00 49 c7 46 08 00 00 00 00 49 8b 04 24 48 85 c0 74 71 4d 8b 3c 24 4d 89 7e 08 66 90 49 8b 07 49 8b 57 08 <48> 89 02 48 85 c0 74 04 48 89 50 08 49 8b 77 18 41 f6 47 22 20 4c
[ 27.587021] RSP: 0018:ffffc42d00003ee8 EFLAGS: 00010086
[ 27.592848] RAX: dead000000000122 RBX: 0000000000000000 RCX: 0000000000000101
[ 27.600808] RDX: 0000000000000000 RSI: 0000000000000087 RDI: 0000000000000001
[ 27.608765] RBP: ffffc42d00003f70 R08: 0000000000000000 R09: 00000000000003eb
[ 27.616716] R10: ffffa0860cb300d0 R11: ffffa0c44de290b0 R12: ffffc42d00003ef8
[ 27.624673] R13: 00000000fffef200 R14: ffffa0c44de18dc0 R15: ffffa0867a882350
[ 27.632624] FS: 0000000000000000(0000) GS:ffffa0c44de00000(0000) knlGS:0000000000000000
[ 27.641650] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 27.648159] CR2: 0000000000000000 CR3: 000000014569c001 CR4: 0000000000770ef0
[ 27.656119] PKRU: 55555554
[ 27.659133] Kernel panic - not syncing: Fatal exception in interrupt
[ 29.030411] Shutting down cpus with NMI
[ 29.034699] Kernel Offset: 0x2e600000 from 0xffffffff81000000 (relocation range: 0xffffffff80000000-0xffffffffbfffffff)
[ 29.046790] ---[ end Kernel panic - not syncing: Fatal exception in interrupt ]---
Since unreliable, found by bisecting for KASAN's use-after-free in
enqueue_timer+0x4f/0x1e0, where the timer callback is called.
Reported-by: Kim Phillips <kim.phillips@amd.com >
Signed-off-by: Kim Phillips <kim.phillips@amd.com >
Fixes: aae74ff9ca ("drm/ast: Add detect function support")
Link: https://lore.kernel.org/lkml/0f7871be-9ca6-5ae4-3a40-5db9a8fb2365@amd.com/
Cc: Ainux <ainux.wang@gmail.com >
Cc: Thomas Zimmermann <tzimmermann@suse.de >
Cc: David Airlie <airlied@redhat.com >
Cc: David Airlie <airlied@linux.ie >
Cc: Daniel Vetter <daniel@ffwll.ch >
Cc: sterlingteng@gmail.com
Cc: chenhuacai@kernel.org
Cc: Chuck Lever III <chuck.lever@oracle.com >
Cc: Borislav Petkov <bp@alien8.de >
Cc: Borislav Petkov <bp@suse.de >
Cc: Jon Grimm <jon.grimm@amd.com >
Cc: dri-devel <dri-devel@lists.freedesktop.org >
Cc: linux-kernel <linux-kernel@vger.kernel.org >
Signed-off-by: Dave Airlie <airlied@redhat.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20211021153006.92983-1-kim.phillips@amd.com
2021-10-22 05:52:12 +10:00
Dave Airlie
7e1c5440f4
Merge tag 'drm-misc-fixes-2021-10-21-1' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes
...
drm-misc-fixes for v5.15-rc7:
- Rebased, to remove vc4 patches.
- Fix mxsfb crash on unload.
- Use correct sync parameters for Feixin K101-IM2BYL02.
- Assorted kmb modeset/atomic fixes.
Signed-off-by: Dave Airlie <airlied@redhat.com >
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/e66eaf89-b9b9-41f5-d0d2-dad7e59fabb5@linux.intel.com
2021-10-22 05:35:28 +10:00
Dave Airlie
730b64d827
Merge tag 'drm-msm-fixes-2021-10-18' of https://gitlab.freedesktop.org/drm/msm into drm-fixes
...
One more fix for v5.15, to work around a power stability issue on a630
(and possibly others)
Signed-off-by: Dave Airlie <airlied@redhat.com >
From: Rob Clark <robdclark@gmail.com >
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGs1WPLthmd=ToDcEHm=u-7O38RAVJ2XwRoS8xPmC520vg@mail.gmail.com
2021-10-22 05:22:15 +10:00
Jessica Zhang
78d9b458cc
drm/msm/dpu: Add CRC support for DPU
...
Add CRC support to DPU, which is currently not supported by
this driver. Only supports CRC for CRTC for now, but will extend support
to other blocks later on.
Changes in v2:
- Added kfree() calls for return paths in dpu_crtc_get_crc()
- Propogated error code for dpu_crtc_get_crc()
- Renamed skip_count
- Removed dpu_crtc_is_valid_crc_source()
- Removed wait for commit in dpu_crtc_set_crc_source()
- Moved crc_source from struct dpu_crtc to struct dpu_crtc_state
- Moved CRC register constants from dpu_hw_util.h to dpu_hw_lm.c
Validated with IGT kms_pipe_crc_basic, and kms_cursor_crc
Test: kms_pipe_crc_basic
Subtests Passed:
- bad-source
- read-crc-pipe-A
- read-crc-pipe-A-frame-sequence
- nonblocking-crc-pipe-A
- nonblocking-crc-pipe-A-frame-sequence
- disable-crc-after-crtc-pipe-A[1]
- compare-crc-sanitycheck-pipe-A[1]
Rest skipped
Test: kms_cursor_crc
Subtests Passed:
- pipe-A-cursor-size-change
- pipe-A-cursor-alpha-opaque
- pipe-A-cursor-alpha-transparent
Subtests Failed:
- pipe-A-cursor-dpms
- pipe-A-cursor-*-onscreen
- pipe-A-cursor-*-offscreen
Rest skipped
Tested on Qualcomm RB3 (debian, sdm845), Qualcomm RB5 (debian, qrb5165)
Reported-by: kernel test robot <lkp@intel.com >
Signed-off-by: Jessica Zhang <jesszhan@codeaurora.org >
[1] Skipped on RB5 due to issue related to DPMS. Planning to upload a
fix for this in the future.
Link: https://lore.kernel.org/r/20211019224822.25940-1-jesszhan@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org >
2021-10-21 10:42:42 -07:00
Bryant Mairs
def0c36972
drm: panel-orientation-quirks: Add quirk for Aya Neo 2021
...
Fixes screen orientation for the Aya Neo 2021 handheld gaming console.
Signed-off-by: Bryant Mairs <bryant@mai.rs >
Signed-off-by: Sam Ravnborg <sam@ravnborg.org >
Link: https://patchwork.freedesktop.org/patch/msgid/20211019142433.4295-1-bryant@mai.rs
2021-10-21 19:33:23 +02:00
Dmitry Baryshkov
31b3b1f5e3
drm/msm/hdmi: use bulk regulator API
...
Switch to using bulk regulator API instead of hand coding loops.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Stephen Boyd <swboyd@chromium.org >
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org >
Link: https://lore.kernel.org/r/20211015001100.4193241-1-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org >
2021-10-21 10:04:19 -07:00
Yanteng Si
89e56d5ed1
drm/msm: Fix missing include files in msm_gem_shrinker.c
...
Include linux/vmalloc.h to fix below errors:
error: implicit declaration of function 'register_vmap_purge_notifier'
error: implicit declaration of function 'unregister_vmap_purge_notifier'
Signed-off-by: Yanteng Si <siyanteng@loongson.cn >
Link: https://lore.kernel.org/r/f270502946fa411cc85c18fc252e5ddbeaf9c2f5.1634200323.git.siyanteng@loongson.cn
Signed-off-by: Rob Clark <robdclark@chromium.org >
2021-10-21 09:46:02 -07:00
Yanteng Si
f8546caa41
drm/msm: Fix missing include files in msm_gem.c
...
Include linux/vmalloc.h to fix below errors:
error: implicit declaration of function 'vmap'
Signed-off-by: Yanteng Si <siyanteng@loongson.cn >
Link: https://lore.kernel.org/r/15f30165e94574e4cd7c4da9f9c6fd1e320d4d8e.1634200323.git.siyanteng@loongson.cn
Signed-off-by: Rob Clark <robdclark@chromium.org >
2021-10-21 09:46:01 -07:00
Christian König
0db55f9a1b
drm/ttm: fix memleak in ttm_transfered_destroy
...
We need to cleanup the fences for ghost objects as well.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reported-by: Erhard F. <erhard_f@mailbox.org >
Tested-by: Erhard F. <erhard_f@mailbox.org >
Reviewed-by: Huang Rui <ray.huang@amd.com >
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=214029
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=214447
CC: <stable@vger.kernel.org >
Link: https://patchwork.freedesktop.org/patch/msgid/20211020173211.2247-1-christian.koenig@amd.com
2021-10-21 15:27:21 +02:00
Anitha Chrisanthus
74056092ff
drm/kmb: Enable ADV bridge after modeset
...
On KMB, ADV bridge must be programmed and powered on prior to
MIPI DSI HW initialization.
v2: changed to atomic_bridge_chain_enable (Sam)
Fixes: 98521f4d4b ("drm/kmb: Mipi DSI part of the display driver")
Co-developed-by: Edmund Dea <edmund.j.dea@intel.com >
Signed-off-by: Edmund Dea <edmund.j.dea@intel.com >
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20211019230719.789958-1-anitha.chrisanthus@intel.com
Acked-by: Sam Ravnborg <sam@ravnborg.org >
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
2021-10-21 11:08:09 +02:00
Anitha Chrisanthus
004d271980
drm/kmb: Corrected typo in handle_lcd_irq
...
Check for Overflow bits for layer3 in the irq handler.
Fixes: 7f7b96a8a0 ("drm/kmb: Add support for KeemBay Display")
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com >
Acked-by: Sam Ravnborg <sam@ravnborg.org >
Link: https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-5-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
2021-10-21 11:08:09 +02:00
Edmund Dea
982f8ad666
drm/kmb: Disable change of plane parameters
...
Due to HW limitations, KMB cannot change height, width, or
pixel format after initial plane configuration.
v2: removed memset disp_cfg as it is already zero.
Fixes: 7f7b96a8a0 ("drm/kmb: Add support for KeemBay Display")
Signed-off-by: Edmund Dea <edmund.j.dea@intel.com >
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com >
Acked-by: Sam Ravnborg <sam@ravnborg.org >
Link: https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-4-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
2021-10-21 11:08:08 +02:00
Edmund Dea
13047a092c
drm/kmb: Remove clearing DPHY regs
...
Don't clear the shared DPHY registers common to MIPI Rx and MIPI Tx during
DSI initialization since this was causing MIPI Rx reset. Rest of the
writes are bitwise, so will not affect Mipi Rx side.
Fixes: 98521f4d4b ("drm/kmb: Mipi DSI part of the display driver")
Signed-off-by: Edmund Dea <edmund.j.dea@intel.com >
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com >
Acked-by: Sam Ravnborg <sam@ravnborg.org >
Link: https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-3-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
2021-10-21 11:08:08 +02:00
Anitha Chrisanthus
a79f40cccd
drm/kmb: Limit supported mode to 1080p
...
KMB only supports single resolution(1080p), this commit checks for
1920x1080x60 or 1920x1080x59 in crtc_mode_valid.
Also, modes with vfp < 4 are not supported in KMB display. This change
prunes display modes with vfp < 4.
v2: added vfp check
Fixes: 7f7b96a8a0 ("drm/kmb: Add support for KeemBay Display")
Co-developed-by: Edmund Dea <edmund.j.dea@intel.com >
Signed-off-by: Edmund Dea <edmund.j.dea@intel.com >
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com >
Acked-by: Sam Ravnborg <sam@ravnborg.org >
Link:https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-2-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
2021-10-21 11:08:08 +02:00
Anitha Chrisanthus
3e4c31e8f7
drm/kmb: Work around for higher system clock
...
Use a different value for system clock offset in the
ppl/llp ratio calculations for clocks higher than 500 Mhz.
Fixes: 98521f4d4b ("drm/kmb: Mipi DSI part of the display driver")
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com >
Acked-by: Sam Ravnborg <sam@ravnborg.org >
Link: https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-1-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
2021-10-21 11:08:08 +02:00
Dan Johansen
772970620a
drm/panel: ilitek-ili9881c: Fix sync for Feixin K101-IM2BYL02 panel
...
This adjusts sync values according to the datasheet
Fixes: 1c243751c0 ("drm/panel: ilitek-ili9881c: add support for Feixin K101-IM2BYL02 panel")
Co-developed-by: Marius Gripsgard <marius@ubports.com >
Signed-off-by: Dan Johansen <strit@manjaro.org >
Signed-off-by: Sam Ravnborg <sam@ravnborg.org >
Link: https://patchwork.freedesktop.org/patch/msgid/20210818214818.298089-1-strit@manjaro.org
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
2021-10-21 11:08:08 +02:00
Marek Vasut
3cfc183052
drm: mxsfb: Fix NULL pointer dereference crash on unload
...
The mxsfb->crtc.funcs may already be NULL when unloading the driver,
in which case calling mxsfb_irq_disable() via drm_irq_uninstall() from
mxsfb_unload() leads to NULL pointer dereference.
Since all we care about is masking the IRQ and mxsfb->base is still
valid, just use that to clear and mask the IRQ.
Fixes: ae1ed00932 ("drm: mxsfb: Stop using DRM simple display pipeline helper")
Signed-off-by: Marek Vasut <marex@denx.de >
Cc: Daniel Abrecht <public@danielabrecht.ch >
Cc: Emil Velikov <emil.l.velikov@gmail.com >
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com >
Cc: Sam Ravnborg <sam@ravnborg.org >
Cc: Stefan Agner <stefan@agner.ch >
Signed-off-by: Sam Ravnborg <sam@ravnborg.org >
Link: https://patchwork.freedesktop.org/patch/msgid/20211016210446.171616-1-marex@denx.de
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
2021-10-21 11:08:08 +02:00
Aaron Liu
53c2ff8bcb
drm/amdgpu: support B0&B1 external revision id for yellow carp
...
B0 internal rev_id is 0x01, B1 internal rev_id is 0x02.
The external rev_id for B0 and B1 is 0x20.
The original expression is not suitable for B1.
v2: squash in fix for display code (Alex)
Signed-off-by: Aaron Liu <aaron.liu@amd.com >
Reviewed-by: Huang Rui <ray.huang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2021-10-20 15:27:31 -04:00
Jake Wang
2ef8ea2394
drm/amd/display: Moved dccg init to after bios golden init
...
[Why]
bios_golden_init will override dccg_init during init_hw.
[How]
Move dccg_init to after bios_golden_init.
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com >
Reviewed-by: Eric Yang <eric.yang2@amd.com >
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com >
Signed-off-by: Jake Wang <haonan.wang2@amd.com >
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2021-10-20 15:26:58 -04:00
Nikola Cornij
dd8cb18906
drm/amd/display: Increase watermark latencies for DCN3.1
...
[why]
The original latencies were causing underflow in some modes
[how]
Replace with the up-to-date watermark values based on new measurments
Reviewed-by: Ahmad Othman <ahmad.othman@amd.com >
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com >
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com >
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2021-10-20 15:26:53 -04:00
Eric Yang
4835ea6c17
drm/amd/display: increase Z9 latency to workaround underflow in Z9
...
[Why]
Z9 latency is higher than when we originally tuned the watermark
parameters, causing underflow. Increasing the value until the latency
issues is resolved.
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com >
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com >
Signed-off-by: Eric Yang <Eric.Yang2@amd.com >
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2021-10-20 15:26:47 -04:00
Nicholas Kazlauskas
672437486e
drm/amd/display: Require immediate flip support for DCN3.1 planes
...
[Why]
Immediate flip can be enabled dynamically and has higher BW requirements
when validating which voltage mode to use.
If we validate when it's not set then potentially DCFCLK will be too low
and we will underflow.
[How]
DM always requires support so always require it as part of DML input
parameters.
This can't be enabled unconditionally on older ASIC because it blocks
some expected modes so only target DCN3.1 for now.
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com >
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com >
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2021-10-20 15:26:42 -04:00
Nicholas Kazlauskas
c938aed88f
drm/amd/display: Fix prefetch bandwidth calculation for DCN3.1
...
[Why]
Prefetch BW calculated is lower than the DML reference because of a
porting error that's excluding cursor and row bandwidth from the
pixel data bandwidth.
[How]
Change the dml_max4 to dml_max3 and include cursor and row bandwidth
in the same calculation as the rest of the pixel data during vactive.
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com >
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com >
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2021-10-20 15:17:13 -04:00
Nikola Cornij
c21b105380
drm/amd/display: Limit display scaling to up to true 4k for DCN 3.1
...
[why]
The requirement is that image width up to 4096 shall be supported
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com >
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com >
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com >
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2021-10-20 15:14:39 -04:00
Thelford Williams
5afa7898ab
drm/amdgpu: fix out of bounds write
...
Size can be any value and is user controlled resulting in overwriting the
40 byte array wr_buf with an arbitrary length of data from buf.
Signed-off-by: Thelford Williams <tdwilliamsiv@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2021-10-20 15:13:50 -04:00
Matthew Auld
ab5d964c00
drm/i915/selftests: mark up hugepages object with start_cpu_write
...
Just like we do for internal objects. Also just use
i915_gem_object_set_cache_coherency() here. No need for over-flushing on
LLC platforms.
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-9-matthew.auld@intel.com
2021-10-20 16:50:42 +01:00
Matthew Auld
3884d8af9b
drm/i915: mark up internal objects with start_cpu_write
...
While the pages can't be swapped out, they can be discarded by the shrinker.
Normally such objects are marked with __I915_MADV_PURGED, which can't be
unset, and therefore requires a new object. For kernel internal objects
this is not true, since the madv hint is reset for our special volatile
objects, such that we can re-acquire new pages, if so desired, without
needing a new object. As a result we should probably be paranoid here
and put the object back into the CPU domain when discarding the pages,
and also correctly set cache_dirty, if required.
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-8-matthew.auld@intel.com
2021-10-20 16:50:25 +01:00
Matthew Auld
df94fd05e6
drm/i915: expand on the kernel-doc for cache_dirty
...
Add some details around non-LLC platforms and cflushing, when dealing
with the flush-on-acquire, which is potentially security sensitive.
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Cc: Daniel Vetter <daniel@ffwll.ch >
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-7-matthew.auld@intel.com
2021-10-20 16:50:24 +01:00
Matthew Auld
d70af57944
drm/i915/shmem: ensure flush during swap-in on non-LLC
...
On non-LLC platforms, force the flush-on-acquire if this is ever
swapped-in. Our async flush path is not trust worthy enough yet(and
happens in the wrong order), and with some tricks it's conceivable for
userspace to change the cache-level to I915_CACHE_NONE after the pages
are swapped-in, and since execbuf binds the object before doing the
async flush, there is a potential race window.
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-6-matthew.auld@intel.com
2021-10-20 16:50:22 +01:00
Matthew Auld
6343034771
drm/i915/userptr: add paranoid flush-on-acquire
...
Even though userptr objects are always coherent with the GPU, with no
way for userspace to change this with the set_caching ioctl, even on
non-LLC platforms, there is still the 'Bypass LCC' mocs setting, which
might permit reading the contents of main memory directly.
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-5-matthew.auld@intel.com
2021-10-20 16:50:21 +01:00
Matthew Auld
a035154da4
drm/i915/dmabuf: add paranoid flush-on-acquire
...
As pointed out by Thomas, we likely need to flush the pages here if the
GPU can read the page contents directly from main memory. Underneath we
don't know what the sg_table is pointing to, so just add a
wbinvd_on_all_cpus() here, for now.
Reported-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-4-matthew.auld@intel.com
2021-10-20 16:50:20 +01:00
Matthew Auld
30f1dccd29
drm/i915: extract bypass-llc check into helper
...
It looks like we will need this in some more places, so extract as a
helper.
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-3-matthew.auld@intel.com
2021-10-20 16:50:18 +01:00
Matthew Auld
f7858cb48b
drm/i915: mark userptr objects as ALLOC_USER
...
These are userspace objects, so mark them as such. In a later patch it's
useful to determine how paranoid we need to be when managing cache
flushes. In theory no functional changes.
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-2-matthew.auld@intel.com
2021-10-20 16:50:17 +01:00
Matthew Auld
e1f17ea4c3
drm/i915: mark dmabuf objects as ALLOC_USER
...
These are userspace objects, so mark them as such. In a later patch it's
useful to determine how paranoid we need to be when managing cache
flushes. In theory no functional changes.
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-1-matthew.auld@intel.com
2021-10-20 16:50:16 +01:00
Kent Russell
dcd5ea9f94
drm/amdgpu: Clarify error when hitting bad page threshold
...
Change the error message when the bad_page_threshold is reached,
explicitly stating that the GPU will not be initialized.
Cc: Luben Tuikov <luben.tuikov@amd.com >
Cc: Mukul Joshi <Mukul.Joshi@amd.com >
Signed-off-by: Kent Russell <kent.russell@amd.com >
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-20 11:43:57 -04:00
Alex Deucher
0d055f09e1
drm/amdgpu: drop navi reg init functions
...
No longer used since IP enumeration is driven by the IP
discovery table now.
Acked-by: Evan Quan <evan.quan@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-20 11:43:57 -04:00
Alex Deucher
bf99b9b032
drm/amdgpu: drop nv_set_ip_blocks()
...
No longer used since IP enumeration is now driven by
amdgpu IP discovery code.
Acked-by: Evan Quan <evan.quan@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-20 11:43:57 -04:00
Alex Deucher
7092432e3c
drm/amdgpu: drop soc15_set_ip_blocks()
...
No longer used since IP enumeration is now driven by
amdgpu IP discovery code.
Acked-by: Evan Quan <evan.quan@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-20 11:43:57 -04:00
Alex Deucher
0f3d2b6804
drm/amdkfd: protect raven_device_info with KFD_SUPPORT_IOMMU_V2
...
raven_device_info is not used when KFD_SUPPORT_IOMMU_V2 is not
set.
Reviewed-by: Evan Quan <evan.quan@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-10-20 11:43:57 -04:00