The 'motherboard-bus' node in Arm Ltd boards fails schema checks as
'simple-bus' child nodes must have a unit-address. The 'ranges' handling is
also wrong (or at least strange) as the mapping of SMC chip selects should
be in the 'arm,vexpress,v2m-p1' node rather than a generic 'simple-bus'
node. Either there's 1 too many levels of 'simple-bus' nodes or 'ranges'
should be moved down a level. The latter change is more simple, so let's do
that. As the 'ranges' value doesn't vary for a given motherboard instance,
we can move 'ranges' into the motherboard dtsi files.
Link: https://lore.kernel.org/r/20210819184239.1192395-6-robh@kernel.org
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Add Exegin Q5xR5. The base device tree is from OpenWrt tree and with
the addition of this patch there will be no need to maintain it
separatelly in OpenWrt.
[osk: original author of patch in OpenWrt]
[claudiu.beznea: use "&<label> {" syntax, sorted nodes in alphabetical
order, adapted flash to new support in kernel 5.14, use proper
compatibles according to kernel 5.14, use macros instead of
hardcoded numbers for pinctrl phandles and for all pinctrl references,
add pinctrl-names, pinctrl-X where necessaray]
Signed-off-by: Owen Kirby <osk@exegin.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210816064416.1630674-8-claudiu.beznea@microchip.com
Add CalAmp LMU5000 board. The base device tree is from OpenWrt tree and
with the addition of this patch there will be no need to maintain it
separatelly in OpenWrt.
[porter.adam: original author of patch in OpenWrt]
[claudiu.beznea: fixed compilation warnings, use &<lable> syntax,
sorted nodes in alphabetical order, adapted flash to new support
in kernel 5.14, use proper compatibles according to kernel 5.14,
use macros instead of hard coded numbers for pinctrl phandles and
for all pinctrl references, add pinctrl-names, pinctrl-X where
necessary]
Signed-off-by: Adam Porter <porter.adam@gmail.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210816064416.1630674-5-claudiu.beznea@microchip.com
Those are remaining models I have that didn't have ports yet. All
tested.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The naming of this node is based upon that of the initial EA9500 dts[1].
However this does not conform with the mdio-mux format, yielding the
following message when running dtbs_check:
mdio-mii-mux: $nodename:0: 'mdio-mii-mux' does not match '^mdio-mux[\\-@]?'
Secondly, this node should be moved to within the axi node and given the
appropriate unit address. This also requires exposing the axi node via a
label in bcm-nsp.dtsi. This fixes the following warning:
Warning (unit_address_vs_reg): /mdio-mii-mux: node has a reg or ranges property, but no unit name
[1]https://patchwork.ozlabs.org/project/linux-imx/patch/20180618174159.86150-1-npcomplete13@gmail.com/#1941353
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Running dtbs_check yields the following message when checking the
MX64/MX65 devicetree:
at24@50: $nodename:0: 'at24@50' does not match '^eeprom@[0-9a-f]{1,2}$'
This patch fixes the issue by renaming the at24 node appropriately.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
While functional, the mdio-mux-mmioreg binding does not conform to
Documentation/devicetree/bindings/net/mdio-mux-mmioreg.yaml in that an
mdio-mux compatible is also required. Without this the following output
is observed when running dtbs_check:
mdio-mux@32000: compatible: ['mdio-mux-mmioreg'] is too short
This change brings conformance to this requirement and corresponds
likewise to Rafal Milecki's change to the BCM5301x platform[1].
[1] https://lore.kernel.org/linux-arm-kernel/20210822191256.3715003-1-f.fainelli@gmail.com/T/
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Running dtbs_check yielded the issues with bcm-nsp.dtsi.
Firstly this patch fixes the following message by appending "-bus" to
the mpcore node name:
mpcore@19000000: $nodename:0: 'mpcore@19000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Secondly mmc node name. The label name can remain as is.
sdhci@21000: $nodename:0: 'sdhci@21000' does not match '^mmc(@.*)?$'
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This board was previously added to
Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml
however the dts file was not updated to reflect this change. This patch
corrects bcm958623hr.dts by adding the board name to the compatible.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This fixes following error for all BCM5301X dts files:
mdio-bus-mux@18003000: compatible: ['mdio-mux-mmioreg'] is too short
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This fixes following errors for all BCM5301X dts files:
chipcommonA@18000000: $nodename:0: 'chipcommonA@18000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
mpcore@19000000: $nodename:0: 'mpcore@19000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
mdio-bus-mux@18003000: $nodename:0: 'mdio-bus-mux@18003000' does not match '^mdio-mux[\\-@]?'
dmu@1800c000: $nodename:0: 'dmu@1800c000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
MX65 & MX65W Hardware info:
- CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
- RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
- Storage: 1 GB (Micron MT29F8G08ABACA)
- Networking: BCM58625 switch (2x 1GbE ports)
2x Qualcomm QCA8337 switches (10x 1GbE ports total)
- PSE: Broadcom BCM59111KMLG connected to LAN ports 11 & 12
- USB: 1x USB2.0
- Serial: Internal header
- WLAN(MX65W Only): 2x Broadcom BCM43520KMLG on the PCI bus.
Note that a driver and firmware image for the BCM59111 PSE has been
released under GPL, but this is not present in the kernel.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
MX64 & MX64W Hardware info:
- CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
- RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
- Storage: 1 GB (Micron MT29F8G08ABACA)
- Networking: BCM58625 internal switch (5x 1GbE ports)
- USB: 1x USB2.0
- Serial: Internal header
- WLAN(MX64W only): 2x Broadcom BCM43520KMLG on the PCI bus
This patch adds the Meraki MX64 series-specific bindings. Since some
devices make use of the older A0 SoC, changes need to be made to
accommodate this case, including removal of coherency options and
modification to the secondary-boot-reg.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
While uncommon, some Ax NSP SoCs exist in the wild. This stepping
requires a modified secondary CPU boot-reg and removal of DMA coherency
properties. Without these modifications, the secondary CPU will be
inactive and many peripherals will exhibit undefined behaviour.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
These bindings are required for all Meraki MX64/MX65 devices. These
common bindings include memory (2GB), PWM LEDs, AMAC, I2C (AT24), NAND
partitions, EHCI, OHCI and pinctrl.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This patch largely replicates Vivek Unune's patch "ARM: dts:
BCM5301X:Make usb3 phy use mdio phy driver"[1] for the NSP platform,
whereby we need to create an mdio-mux to facilitate switches
configured via external MDIO, in this case on the Meraki MX65.
However in doing so, we are creating an overlap with usb3_phy's
ccb-mii range. To resolve this, usb3_phy should be moved to a child
node of the internal MDIO bus. The result is heavily based upon Vivek's
patch. This has also been cross-referenced with Yendapally Reddy's
earlier work which utilised the subsequently dropped brcm,nsp-usb3-phy
driver: "[PATCH v2 4/4] arm: dts: nsp: Add USB nodes to device tree"
[2]. Finally, this change provides conformance to the bcm-ns-usb3-phy
documentation, utilising the required usb3-dmp-syscon property. Note
that support for the deprecated ccb-mii bindings has been dropped as of
"phy: phy-bcm-ns-usb3: drop support for deprecated DT binding"[3].
[1] https://lore.kernel.org/patchwork/patch/933971/
[2] https://www.spinics.net/lists/arm-kernel/msg555132.html
[3] https://lore.kernel.org/linux-devicetree/20201113113423.9466-1-zajec5@gmail.com/
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This patch adds the node for the MDIO bus controller, present on the NSP
SoC.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The QSPI bus is enabled by default, however this may not used on all
devices. This patch disables by default, requiring it to be explicitly
enabled where required.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The previous patch "ARM: dts: NSP: Disable PL330 by default, add
dma-coherent property" set the DMAC to disabled by default, requiring it
to be manually enabled on each device. The bcm988312hr was mistakenly
omitted. This patch adds it back.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Currently only the SoC type and platform are specified for all NSP
devices. This patch adds the device names.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The s6e63m0 display used "type 3" SPI communication so
flag the device as using negative clocking and polarity
on the SPI bus.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The state of this GPIO determines whether a factory reset has been
requested. If a physical switch is used, it can be high or low. During boot,
the software checks and records the state of this switch. If it is different
than the previous recorded state, then the read-write portions of memory are
reformatted.
Signed-off-by: Isaac Kurth <isaac.kurth@ibm.com>
Link: https://lore.kernel.org/r/20210901185236.558771-1-isaac.kurth@ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add a device tree for the LG G Watch R smartwatch, manufactured by LG
Electronics and based on the msm8226 platform (apq8026).
Currently UART, internal storage, power button and touchscreen are
supported.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
[bjorn: Moved "rpm_requests" before "sdhc", to keep things sorted]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210911232707.259615-9-luca@z3ntu.xyz
