Commit Graph

2902 Commits

Author SHA1 Message Date
Andrew Jeffery
c3bafe017c gpio: aspeed: Add open-source and open-drain support
As per the datasheet, manage the IO and value states to implement
open-source/open-drain, but do this by falling back to gpiolib's
emulation.

This commit simply makes the behaviour explicit for clarity, rather than
relying on the implicit return of -ENOTSUPP to trigger the emulation.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-24 14:51:57 +02:00
Andrew Jeffery
5ae4cb94b3 gpio: aspeed: Add debounce support
Each GPIO in the Aspeed GPIO controller can choose one of four input
debounce states: to disable debouncing for an input, or select from one
of three programmable debounce timer values. Each GPIO in a
four-bank-set is assigned one bit in each of two debounce configuration
registers dedicated to the set, and selects a debounce state by
configuring the two bits to select one of the four options.

The limitation on debounce timer values is managed by mapping offsets
onto a configured timer value and keeping count of the number of users
a timer has. Timer values are configured on a first-come-first-served
basis.

A small twist in the hardware design is that the debounce configuration
register numbering is reversed with respect to the binary representation
of the debounce timer of interest (i.e. debounce register 1 represents
bit 1, and debounce register 2 represents bit 0 of the timer numbering).

Tested on an AST2500EVB with additional inspection under QEMU's
romulus-bmc machine.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-24 14:49:53 +02:00
Andrew Lunn
757642f9a5 gpio: mvebu: Add limited PWM support
Armada 370/XP devices can 'blink' GPIO lines with a configurable on
and off period. This can be modelled as a PWM.

However, there are only two sets of PWM configuration registers for
all the GPIO lines. This driver simply allows a single GPIO line per
GPIO chip of 32 lines to be used as a PWM. Attempts to use more return
EBUSY.

Due to the interleaving of registers it is not simple to separate the
PWM driver from the GPIO driver. Thus the GPIO driver has been
extended with a PWM driver.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427287/
URL: https://patchwork.ozlabs.org/patch/427295/
[Ralph Sennhauser:
  * Port forward
  * Merge PWM portion into gpio-mvebu.c
  * Switch to atomic PWM API
  * Add new compatible string marvell,armada-370-xp-gpio
  * Update and merge documentation patch
  * Update MAINTAINERS]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-24 11:16:25 +02:00
Thierry Reding
6f79309acc gpio: Use unsigned int for interrupt numbers
Interrupt numbers are never negative, zero serves as the special invalid
value.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-13 14:16:23 +02:00
Marty Plummer
d69843e416 gpio: f7188x: Add F71889A GPIO support.
Add F71889A GPIO support.

Fintek F71889A is a SuperIO. It contains HWMON/GPIO/Serial Ports.

Datasheet:
http://www.alldatasheet.com/datasheet-pdf/pdf/459076/FINTEK/F71889A.html

Its virtually identical to the F71889F superio as far as gpios go.
One oddity is GPIO2 at index 0xD0; the datasheet only lists gpio's 7-5,
but it logically seems that it should continue down to 0. I'm not sure
if the driver can handle gpios that are shifted away from index 0 as it
currently stands.

Signed-off-by: Marty Plummer <netz.kernel@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-07 12:26:42 +02:00
Laxman Dewangan
4c0facddb7 gpio: core: Decouple open drain/source flag with active low/high
Currently, the GPIO interface is said to Open Drain if it is Single
Ended and active LOW. Similarly, it is said as Open Source if it is
Single Ended and active HIGH.

The active HIGH/LOW is used in the interface for setting the pin
state to HIGH or LOW when enabling/disabling the interface.

In Open Drain interface, pin is set to HIGH by putting pin in
high impedance and LOW by driving to the LOW.

In Open Source interface, pin is set to HIGH by driving pin to
HIGH and set to LOW by putting pin in high impedance.

With above, the Open Drain/Source is unrelated to the active LOW/HIGH
in interface. There is interface where the enable/disable of interface
is ether active LOW or HIGH but it is Open Drain type.

Hence decouple the Open Drain with Single Ended + Active LOW and
Open Source with Single Ended + Active HIGH.

Adding different flag for the Open Drain/Open Source which is valid
only when Single ended flag is enabled.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-07 12:23:29 +02:00
Charles Keepax
11598d1740 gpio: arizona: Correct handling for reading input GPIOs
The GPIO register is cached since all the configuration resides within
it, however, this means for input GPIOs the driver will not return the
actual state but the last value written to the register cache.

To correct this in the case of reading an input GPIO resume the CODEC
and drop the cache for the input register to ensure an actual hardware
read takes place.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-07 12:14:04 +02:00
Julia Cartwright
e1e37d6c4a gpio: 104-idi-48: make use of raw_spinlock variants
The 104-idi-48 gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-28 14:55:08 +02:00
Julia Cartwright
ea38ce081d gpio: pci-idio-16: make use of raw_spinlock variants
The pci-idio-16 gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-28 11:13:59 +02:00
Julia Cartwright
3906e8089a gpio: 104-idio-16: make use of raw_spinlock variants
The 104-idio-16 gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-28 11:12:36 +02:00
Russell King
0e3cb6ee38 gpio: gpio-reg: add irq mapping for gpio-reg users
Add support for mapping gpio-reg gpios to interrupts.  This may be a
non-linear mapping - some gpios in the register may not even have
corresponding interrupts associated with them, so we need to pass an
array.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-24 14:05:00 +01:00
Russell King
380639c7cc gpio: add generic single-register fixed-direction GPIO driver
Add a simple, generic, single register fixed-direction GPIO driver.
This is able to support a single register with a mixture of inputs
and outputs.

This is different from gpio-mmio and gpio-74xx-mmio:
* gpio-mmio doesn't allow a fixed direction, it assumes there is always
  a direction register.
* gpio-74xx-mmio only supports all-in or all-out setups
* gpio-74xx-mmio is DT only, this needs to support legacy too
* they don't double-read when getting the GPIO value, as required by
  some implementations that this driver supports
* we need to always do 32-bit reads, which bgpio doesn't guarantee
* the current output state may not be readable from the hardware
  register - reading may reflect input status but not output status.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-24 14:04:46 +01:00
Russell King
c65d1fd350 gpio: sa1100: implement get_direction method
Allow gpiolib to read back the current IO direction configuration by
implementing the .get_direction callback.  This, in part, allows
debugfs to report the complete true hardware state rather than the
software state.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-24 14:04:37 +01:00
Russell King
07242b2481 gpio: sa1100: convert to use IO accessors
Use IO accessors to access the SA1100 registers rather than accessing
them directly.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-24 14:04:26 +01:00
Russell King
9dd4819ed5 gpio: sa1100: use sa11x0_gpio_set_wake()
Use sa11x0_gpio_set_wake() to set the PWER register, as provided by
Dmitry some time back.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-24 14:04:13 +01:00
Andy Shevchenko
7477e137dc gpio: merrifield: Don't use GPIOF_DIR_IN / GPIOF_DIR_OUT
The mentioned flags are dedicated solely for consumer API.
Replace them by explicit values.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[Made a !bang clamp to (0,1) instead of infix ? operator]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-23 14:06:46 +01:00
Andy Shevchenko
96530b3777 gpio: pca953x: Expand comment for "reset" GPIO in ACPI case
GPIO ACPI library is going to be stricter about resources, thus, expand
comment regarding "reset" GPIO resource in this driver to clarify its
usage in ACPI case.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-23 10:42:44 +01:00
Andy Shevchenko
b413d7a01c gpio: pca953x: Sort headers alphabetically
For sake of better maintenance sort the headers by alphabetical order.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-23 10:41:17 +01:00
Andy Shevchenko
66e5719231 gpio: pca953x: Introduce a long awaited ->get_direction()
Introduce ->get_direction() callback for the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[Removed use of GPIOF_DIR* flags]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-23 10:40:13 +01:00
Ralph Sennhauser
d2cabc4a23 gpio: mvebu: use BIT macro instead of bit shifting
Use the BIT macro instead of explicitly shifting bits for some added
clarity.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-23 10:21:39 +01:00
Nathan Sullivan
b8c90199b5 gpio: mmio: add support for NI 169445 NAND GPIO
The GPIO-based NAND controller on National Instruments 169445 hardware
exposes a set of simple lines for the control signals.

Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-23 09:49:06 +01:00
Linus Walleij
d8307c0920 gpio: moxart: Switch to using the FTGPIO010 driver
This just deletes the Moxa ART driver and replaces it with the
more versatile Faraday FTGPIO010 driver.

Make this default on for ARCH_GEMINI and ARCH_MOXART so we do
not get Kconfig glitches.

Tested-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-22 09:45:02 +01:00
Linus Walleij
9d3a15aaae gpio: gemini: rename to match Faraday IP
The Gemini driver is actually a driver for the Faraday Technology
FTGPIO010 IP block. We rename the driver and the Kconfig symbol and
put in a a new compatible string for the Moxa ART SoC that is also
using this IP block.

Tested-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-22 09:40:55 +01:00
Ralph Sennhauser
f07708c43b gpio: mvebu: let the compiler inline
A modern compiler should know better when to inline, so drop the inline
keywords.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:16 +01:00
Ralph Sennhauser
f4c240ca4b gpio: mvebu: extra whitespace fixes
Fix whitespace errors missed by checkpatch.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:15 +01:00
Ralph Sennhauser
163ad364cc gpio: mvebu: checkpatch: whitespace fixes
Fix whitespace errors reported by checkpatch.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:15 +01:00
Ralph Sennhauser
d276de70d2 gpio: mvebu: checkpatch: unsigned int fixes
Use unsigned int instead of plain unsigned as reported by checkpatch.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:14 +01:00
Ralph Sennhauser
899c37edfe gpio: mvebu: start multiline block comments with blank line
While this isn't an issue according to checkpatch two styles are used.
Add a blank line to the block comments missing a blank line at the start
so multiline block comments look the same across the file.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:14 +01:00
Ralph Sennhauser
7077f4cc1e gpio: mvebu: checkpatch: block comment fixes
Fix issues in block comments reported by checkpatch.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:13 +01:00
Hans de Goede
6798d7271c gpio: acpi: Ignore -EPROBE_DEFER for unselected gpioints
When acpi_dev_gpio_irq_get gets called with an index of say 2, it should
not care if acpi_get_gpiod for index 0 or 1 returns -EPROBE_DEFER.

This allows drivers which request a gpioint with index > 0 to function
if there is no gpiochip driver (loaded) for gpioints with a lower index.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:13 +01:00
Andy Shevchenko
4033d4a4f5 gpio: of: Don't return 0 on dt_gpio_count()
It's unusual to have error checking like (ret <= 0) in cases when
counting GPIO resources. In case when it's mandatory we propagate the
error (-ENOENT), otherwise we don't use the result.

This makes consistent behaviour across all possible variants called in
gpiod_count().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:11 +01:00
Andy Shevchenko
4ed55016d7 gpio: acpi: Don't return 0 on acpi_gpio_count()
It's unusual to have error checking like (ret <= 0) in cases when
counting GPIO resources. In case when it's mandatory we propagate the
error (-ENOENT), otherwise we don't use the result.

This makes consistent behaviour across all possible variants called in
gpiod_count().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:11 +01:00
Jayachandran C
529f75d8ca gpio: xlp: Update for ARCH_THUNDER2
ARCH_VULCAN arm64 platform (for Broadcom Vulcan ARM64 processors) has
been discontinued. Cavium's ThunderX2 CN99XX (ARCH_THUNDER2) will be
the next revision of this platform.

Update compile dependencies and ACPI ID to reflect this change.

Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
[Drop depreciation of ARCH_VULCAN]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:10 +01:00
Julia Cartwright
8c41ab4f05 gpio: zx: make use of raw_spinlock variants
The zx gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:10 +01:00
Julia Cartwright
a0a584f0e9 gpio: ws16c48: make use of raw_spinlock variants
The ws16c48 gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:09 +01:00
Julia Cartwright
99b9b45de8 gpio: pl061: make use of raw_spinlock variants
The pl061 gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:09 +01:00
Julia Cartwright
f9c56536d5 gpio: etraxfs: make use of raw_spinlock variants
The etraxfs gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:08 +01:00
Julia Cartwright
a080ce53ee gpio: ath79: make use of raw_spinlock variants
The ath79 gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Acked-by: Aban Bedel <albeu@free.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:08 +01:00
Julia Cartwright
c69fcea57e gpio: bcm-kona: make use of raw_spinlock variants
The bcm-kona gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:07 +01:00
Julia Cartwright
45897809d5 gpio: 104-dio-48e: make use of raw_spinlock variants
The 104-dio-48e gpio driver currently implements an irq_chip for
handling interrupts; due to how irq_chip handling is done, it's
necessary for the irq_chip methods to be invoked from hardirq context,
even on a a real-time kernel.  Because the spinlock_t type becomes a
"sleeping" spinlock w/ RT kernels, it is not suitable to be used with
irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:07 +01:00
Julia Cartwright
21d01c9c08 gpio: altera: make use of raw_spinlock variants
The altera gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a real-time
kernel.  Because the spinlock_t type becomes a "sleeping" spinlock w/ RT
kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-16 21:52:06 +01:00
William Breathitt Gray
660549e05d gpio: pc104: Mask PC/104 drivers via PC104 Kconfig option
PC/104 drivers should be hidden on machines which do not support PC/104
devices. This patch adds the PC104 Kconfig option as a dependency for
the relevant PC/104 device driver Kconfig options.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-15 11:16:38 +01:00
Bartosz Golaszewski
7ad63c790b gpio: sta2x11: use resource management for irqs
Use device resource managed variants of irq_alloc_descs() and
request_irq() and remove the code manually freeing irq resources.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-15 11:16:38 +01:00
Bartosz Golaszewski
8514b5439c gpio: mxs: use devm_irq_alloc_descs()
This driver never frees the interrupt descriptors it allocates. Fix
it by using the resource managed version of irq_alloc_descs().

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-15 11:16:37 +01:00
Bartosz Golaszewski
c553c3c478 gpio: mxc: use devm_irq_alloc_descs()
This driver never frees the interrupt descriptors it allocates. Fix
it by using the resource managed version of irq_alloc_descs().

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-15 11:16:37 +01:00
Bartosz Golaszewski
74dd9ebfff gpio: sodaville: use resource management for irqs
Use device resource managed variants of irq_alloc_descs() and
request_irq() and remove the code manually freeing irq resources.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-15 11:16:36 +01:00
Bartosz Golaszewski
a1a3c2d551 gpio: davinci: use devm_irq_alloc_descs()
This driver never frees the interrupt descriptors it allocates. Fix
it by using the resource managed version of irq_alloc_descs().

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-15 11:16:36 +01:00
Bartosz Golaszewski
bda61a192a gpio: pxa: use devm_irq_alloc_descs()
This driver never frees the interrupt descriptors it allocates. Fix
it by using the resource managed version of irq_alloc_descs().

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-15 11:16:35 +01:00
Bartosz Golaszewski
31bd86d983 gpio: xlp: use resource management for irqs
Use the resource managed variant of irq_alloc_descs() and remove the
code manually freeing allocated interrupt descriptors.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-15 11:16:35 +01:00
Bartosz Golaszewski
e971ac9a56 gpio: ml-ioh: use resource management for irqs
Use device resource managed variants of irq_alloc_descs() and
request_irq() and remove the code manually freeing irq resources.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-15 11:16:34 +01:00