forked from Minki/linux
gpio: 104-dio-48e: make use of raw_spinlock variants
The 104-dio-48e gpio driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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21d01c9c08
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45897809d5
@ -55,7 +55,7 @@ struct dio48e_gpio {
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unsigned char io_state[6];
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unsigned char out_state[6];
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unsigned char control[2];
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spinlock_t lock;
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raw_spinlock_t lock;
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unsigned base;
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unsigned char irq_mask;
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};
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@ -78,7 +78,7 @@ static int dio48e_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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unsigned long flags;
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unsigned control;
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spin_lock_irqsave(&dio48egpio->lock, flags);
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raw_spin_lock_irqsave(&dio48egpio->lock, flags);
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/* Check if configuring Port C */
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if (io_port == 2 || io_port == 5) {
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@ -103,7 +103,7 @@ static int dio48e_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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control &= ~BIT(7);
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outb(control, control_addr);
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spin_unlock_irqrestore(&dio48egpio->lock, flags);
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raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
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return 0;
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}
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@ -120,7 +120,7 @@ static int dio48e_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
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unsigned long flags;
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unsigned control;
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spin_lock_irqsave(&dio48egpio->lock, flags);
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raw_spin_lock_irqsave(&dio48egpio->lock, flags);
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/* Check if configuring Port C */
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if (io_port == 2 || io_port == 5) {
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@ -153,7 +153,7 @@ static int dio48e_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
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control &= ~BIT(7);
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outb(control, control_addr);
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spin_unlock_irqrestore(&dio48egpio->lock, flags);
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raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
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return 0;
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}
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@ -167,17 +167,17 @@ static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset)
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unsigned long flags;
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unsigned port_state;
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spin_lock_irqsave(&dio48egpio->lock, flags);
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raw_spin_lock_irqsave(&dio48egpio->lock, flags);
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/* ensure that GPIO is set for input */
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if (!(dio48egpio->io_state[port] & mask)) {
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spin_unlock_irqrestore(&dio48egpio->lock, flags);
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raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
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return -EINVAL;
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}
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port_state = inb(dio48egpio->base + in_port);
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spin_unlock_irqrestore(&dio48egpio->lock, flags);
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raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
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return !!(port_state & mask);
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}
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@ -190,7 +190,7 @@ static void dio48e_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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const unsigned out_port = (port > 2) ? port + 1 : port;
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unsigned long flags;
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spin_lock_irqsave(&dio48egpio->lock, flags);
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raw_spin_lock_irqsave(&dio48egpio->lock, flags);
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if (value)
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dio48egpio->out_state[port] |= mask;
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@ -199,7 +199,7 @@ static void dio48e_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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outb(dio48egpio->out_state[port], dio48egpio->base + out_port);
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spin_unlock_irqrestore(&dio48egpio->lock, flags);
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raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
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}
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static void dio48e_gpio_set_multiple(struct gpio_chip *chip,
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@ -225,14 +225,14 @@ static void dio48e_gpio_set_multiple(struct gpio_chip *chip,
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out_port = (port > 2) ? port + 1 : port;
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bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)];
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spin_lock_irqsave(&dio48egpio->lock, flags);
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raw_spin_lock_irqsave(&dio48egpio->lock, flags);
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/* update output state data and set device gpio register */
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dio48egpio->out_state[port] &= ~mask[BIT_WORD(i)];
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dio48egpio->out_state[port] |= bitmask;
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outb(dio48egpio->out_state[port], dio48egpio->base + out_port);
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spin_unlock_irqrestore(&dio48egpio->lock, flags);
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raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
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/* prepare for next gpio register set */
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mask[BIT_WORD(i)] >>= gpio_reg_size;
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@ -255,7 +255,7 @@ static void dio48e_irq_mask(struct irq_data *data)
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if (offset != 19 && offset != 43)
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return;
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spin_lock_irqsave(&dio48egpio->lock, flags);
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raw_spin_lock_irqsave(&dio48egpio->lock, flags);
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if (offset == 19)
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dio48egpio->irq_mask &= ~BIT(0);
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@ -266,7 +266,7 @@ static void dio48e_irq_mask(struct irq_data *data)
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/* disable interrupts */
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inb(dio48egpio->base + 0xB);
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spin_unlock_irqrestore(&dio48egpio->lock, flags);
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raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
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}
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static void dio48e_irq_unmask(struct irq_data *data)
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@ -280,7 +280,7 @@ static void dio48e_irq_unmask(struct irq_data *data)
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if (offset != 19 && offset != 43)
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return;
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spin_lock_irqsave(&dio48egpio->lock, flags);
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raw_spin_lock_irqsave(&dio48egpio->lock, flags);
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if (!dio48egpio->irq_mask) {
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/* enable interrupts */
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@ -293,7 +293,7 @@ static void dio48e_irq_unmask(struct irq_data *data)
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else
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dio48egpio->irq_mask |= BIT(1);
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spin_unlock_irqrestore(&dio48egpio->lock, flags);
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raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
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}
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static int dio48e_irq_set_type(struct irq_data *data, unsigned flow_type)
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@ -329,11 +329,11 @@ static irqreturn_t dio48e_irq_handler(int irq, void *dev_id)
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generic_handle_irq(irq_find_mapping(chip->irqdomain,
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19 + gpio*24));
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spin_lock(&dio48egpio->lock);
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raw_spin_lock(&dio48egpio->lock);
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outb(0x00, dio48egpio->base + 0xF);
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spin_unlock(&dio48egpio->lock);
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raw_spin_unlock(&dio48egpio->lock);
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return IRQ_HANDLED;
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}
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@ -388,7 +388,7 @@ static int dio48e_probe(struct device *dev, unsigned int id)
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dio48egpio->chip.set_multiple = dio48e_gpio_set_multiple;
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dio48egpio->base = base[id];
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spin_lock_init(&dio48egpio->lock);
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raw_spin_lock_init(&dio48egpio->lock);
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err = devm_gpiochip_add_data(dev, &dio48egpio->chip, dio48egpio);
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if (err) {
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