Commit Graph

1015529 Commits

Author SHA1 Message Date
Wan Jiabing
abb9fe438b drm/i915/display: remove duplicated argument
Fix the following coccicheck warning:

./drivers/gpu/drm/i915/display/intel_display_power.c:3081:1-28:
 duplicated argument to & or |

This commit fixes duplicate argument. It might be a typo.
But what I can do is to remove it now.

Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210605032209.16111-1-wanjiabing@vivo.com
2021-06-07 15:08:38 +03:00
Piotr Oniszczuk
b36a6bb8a1
drm/sun4i: de3: Be explicit about supported modifiers
Currently only linear formats are supported in sun4i-drm driver, but
SoCs like H6 supports AFBC variant of some of them in multiple cores
(GPU, VPU, DE3). Panfrost already implements AFBC compression and is
sometimes confused what should be default choice (linear, AFBC) if DRM
driver is not explicit about modifier support (MiniMyth2 distro with
MythTV app).

After some discussion with Daniel Stone on #panfrost IRC, it was decided
to make modifiers in sun4i-drm explicit, to avoid any kind of guessing,
not just in panfrost, but everywhere. In fact, long term idea is to make
modifier parameter in drm_universal_plane_init() mandatory (non NULL).

Signed-off-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20210605073534.3786194-1-jernej.skrabec@gmail.com
2021-06-07 13:33:46 +02:00
Maxime Ripard
6800234cee
drm/vc4: hdmi: Convert to gpiod
The new gpiod interface takes care of parsing the GPIO flags and to
return the logical value when accessing an active-low GPIO, so switching
to it simplifies a lot the driver.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210524131852.263883-2-maxime@cerno.tech
2021-06-07 13:33:46 +02:00
Maxime Ripard
e075a78119
drm/vc4: hdmi: Fix error path of hpd-gpios
If the of_get_named_gpio_flags call fails in vc4_hdmi_bind, we jump to
the err_unprepare_hsm label. That label will then call
pm_runtime_disable and put_device on the DDC device.

We just retrieved the DDC device, so the latter is definitely justified.
However at that point we still haven't called pm_runtime_enable, so the
call to pm_runtime_disable is not supposed to be there.

Fixes: 10ee275cb1 ("drm/vc4: prepare for CEC support")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210524131852.263883-1-maxime@cerno.tech
2021-06-07 13:33:46 +02:00
Christian König
8f8e19bd18 drm/ttm: fix missing res assignment in ttm_range_man_alloc
That somehow got missing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reported-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Fixes: cb1c81467a ("drm/ttm: flip the switch for driver allocated resources v2")
Link: https://patchwork.freedesktop.org/patch/msgid/20210607104040.22017-1-christian.koenig@amd.com
2021-06-07 12:50:49 +02:00
Lucas De Marchi
161058fb89 drm/i915: Add remaining conversions to GRAPHICS_VER
For some reason coccinelle misses a few cases in header files with calls to
INTEL_GEN()/IS_GEN(). Do a manual conversion for those.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210605155356.4183026-6-lucas.demarchi@intel.com
Link: https://patchwork.freedesktop.org/patch/msgid/20210606045050.103862-3-lucas.demarchi@intel.com
2021-06-07 00:59:54 -07:00
Lucas De Marchi
651e7d4857 drm/i915: replace IS_GEN and friends with GRAPHICS_VER
This was done by the following semantic patch:

	@@ expression i915; @@
	- INTEL_GEN(i915)
	+ GRAPHICS_VER(i915)

	@@ expression i915; expression E; @@
	- INTEL_GEN(i915) >= E
	+ GRAPHICS_VER(i915) >= E

	@@ expression dev_priv; expression E; @@
	- !IS_GEN(dev_priv, E)
	+ GRAPHICS_VER(dev_priv) != E

	@@ expression dev_priv; expression E; @@
	- IS_GEN(dev_priv, E)
	+ GRAPHICS_VER(dev_priv) == E

	@@
	expression dev_priv;
	expression from, until;
	@@
	- IS_GEN_RANGE(dev_priv, from, until)
	+ IS_GRAPHICS_VER(dev_priv, from, until)

	@def@
	expression E;
	identifier id =~ "^gen$";
	@@
	- id = GRAPHICS_VER(E)
	+ ver = GRAPHICS_VER(E)

	@@
	identifier def.id;
	@@
	- id
	+ ver

It also takes care of renaming the variable we assign to GRAPHICS_VER()
so to use "ver" rather than "gen".

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210606045050.103862-2-lucas.demarchi@intel.com
2021-06-07 00:59:48 -07:00
Christian König
d3fae3b3da dma-buf: drop the _rcu postfix on function names v3
The functions can be called both in _rcu context as well
as while holding the lock.

v2: add some kerneldoc as suggested by Daniel
v3: fix indentation

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20210602111714.212426-7-christian.koenig@amd.com
2021-06-06 11:19:51 +02:00
Christian König
6b41323a26 dma-buf: rename dma_resv_get_excl_rcu to _unlocked
That describes much better what the function is doing here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20210602111714.212426-6-christian.koenig@amd.com
2021-06-06 11:19:30 +02:00
Christian König
fb5ce730f2 dma-buf: rename and cleanup dma_resv_get_list v2
When the comment needs to state explicitly that this is doesn't get a reference
to the object then the function is named rather badly.

Rename the function and use it in even more places.

v2: use dma_resv_shared_list as new name

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20210602111714.212426-5-christian.koenig@amd.com
2021-06-06 11:18:19 +02:00
Christian König
6edbd6abb7 dma-buf: rename and cleanup dma_resv_get_excl v3
When the comment needs to state explicitly that this
doesn't get a reference to the object then the function
is named rather badly.

Rename the function and use rcu_dereference_check(), this
way it can be used from both rcu as well as lock protected
critical sections.

v2: improve kerneldoc as suggested by Daniel
v3: use dma_resv_excl_fence as function name

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20210602111714.212426-4-christian.koenig@amd.com
2021-06-06 11:17:58 +02:00
Lucas De Marchi
40e1956ec5 drm/i915/gem: replace IS_GEN and friends with GRAPHICS_VER
This was done by the following semantic patch:

	@@ expression i915; @@
	- INTEL_GEN(i915)
	+ GRAPHICS_VER(i915)

	@@ expression i915; expression E; @@
	- INTEL_GEN(i915) >= E
	+ GRAPHICS_VER(i915) >= E

	@@ expression dev_priv; expression E; @@
	- !IS_GEN(dev_priv, E)
	+ GRAPHICS_VER(dev_priv) != E

	@@ expression dev_priv; expression E; @@
	- IS_GEN(dev_priv, E)
	+ GRAPHICS_VER(dev_priv) == E

	@@
	expression dev_priv;
	expression from, until;
	@@
	- IS_GEN_RANGE(dev_priv, from, until)
	+ IS_GRAPHICS_VER(dev_priv, from, until)

	@def@
	expression E;
	identifier id =~ "^gen$";
	@@
	- id = GRAPHICS_VER(E)
	+ ver = GRAPHICS_VER(E)

	@@
	identifier def.id;
	@@
	- id
	+ ver

It also takes care of renaming the variable we assign to GRAPHICS_VER()
so to use "ver" rather than "gen".

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210605155356.4183026-4-lucas.demarchi@intel.com
2021-06-05 15:09:43 -07:00
Lucas De Marchi
fa20cbddd3 drm/i915/gt: Add remaining conversions to GRAPHICS_VER
For some reason coccinelle misses a few cases in gt with calls to
INTEL_GEN()/IS_GEN(). Do a manual conversion for those.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210605155356.4183026-3-lucas.demarchi@intel.com
2021-06-05 15:09:28 -07:00
Lucas De Marchi
c816723b6b drm/i915/gt: replace IS_GEN and friends with GRAPHICS_VER
This was done by the following semantic patch:

	@@ expression i915; @@
	- INTEL_GEN(i915)
	+ GRAPHICS_VER(i915)

	@@ expression i915; expression E; @@
	- INTEL_GEN(i915) >= E
	+ GRAPHICS_VER(i915) >= E

	@@ expression dev_priv; expression E; @@
	- !IS_GEN(dev_priv, E)
	+ GRAPHICS_VER(dev_priv) != E

	@@ expression dev_priv; expression E; @@
	- IS_GEN(dev_priv, E)
	+ GRAPHICS_VER(dev_priv) == E

	@@
	expression dev_priv;
	expression from, until;
	@@
	- IS_GEN_RANGE(dev_priv, from, until)
	+ IS_GRAPHICS_VER(dev_priv, from, until)

	@def@
	expression E;
	identifier id =~ "^gen$";
	@@
	- id = GRAPHICS_VER(E)
	+ ver = GRAPHICS_VER(E)

	@@
	identifier def.id;
	@@
	- id
	+ ver

It also takes care of renaming the variable we assign to GRAPHICS_VER()
so to use "ver" rather than "gen".

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210605155356.4183026-2-lucas.demarchi@intel.com
2021-06-05 15:09:06 -07:00
Christian König
415f6767d8 dma-buf: add missing EXPORT_SYMBOL
The newly added dma_resv_reset_shared_max() is used from an inline
function, so it can appear in drivers as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20210604155228.616679-1-christian.koenig@amd.com
2021-06-05 13:08:57 +02:00
Lucas De Marchi
07960a4cc4 drm/i915/display: replace IS_GEN() in commented code
Since we are replacing IS_GEN() with GRAPHICS_VER(), make sure we take
care of the comments as well.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210603165428.3625495-8-lucas.demarchi@intel.com
2021-06-04 16:50:54 -07:00
Lucas De Marchi
d8d123128c drm/i915/gvt: replace IS_GEN and friends with GRAPHICS_VER
This was done by the following semantic patch:

	@@ expression i915; @@
	- INTEL_GEN(i915)
	+ GRAPHICS_VER(i915)

	@@ expression i915; expression E; @@
	- INTEL_GEN(i915) >= E
	+ GRAPHICS_VER(i915) >= E

	@@ expression dev_priv; expression E; @@
	- !IS_GEN(dev_priv, E)
	+ GRAPHICS_VER(dev_priv) != E

	@@ expression dev_priv; expression E; @@
	- IS_GEN(dev_priv, E)
	+ GRAPHICS_VER(dev_priv) == E

	@@
	expression dev_priv;
	expression from, until;
	@@
	- IS_GEN_RANGE(dev_priv, from, until)
	+ IS_GRAPHICS_VER(dev_priv, from, until)

	@def@
	expression E;
	identifier id =~ "^gen$";
	@@
	- id = GRAPHICS_VER(E)
	+ ver = GRAPHICS_VER(E)

	@@
	identifier def.id;
	@@
	- id
	+ ver

It also takes care of renaming the variable we assign to GRAPHICS_VER()
so to use "ver" rather than "gen".

Cc: intel-gvt-dev@lists.freedesktop.org
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210603165428.3625495-5-lucas.demarchi@intel.com
2021-06-04 16:49:31 -07:00
Alex Deucher
3e88cbb0d0 drm/amdgpu/dc: fix DCN3.1 FP handling
Missing proper DC_FP_START/DC_FP_END.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:19 -04:00
Alex Deucher
df7a1658f2 drm/amdgpu/dc: fix DCN3.1 Makefile for PPC64
Port the necessary changes from previous DCN versions.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:19 -04:00
Nicholas Kazlauskas
c8b73f7fdb drm/amdgpu: Add DC support and display block for Yellow Carp
To enable output on real display instead of virtual.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:19 -04:00
Nicholas Kazlauskas
38ddc4babe drm/amd/display: Add DC DCN3.1 support to Kconfig
To enable compiling and using DCN3.1 ASICs with physical output.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:19 -04:00
Nicholas Kazlauskas
1ebcaebdb5 drm/amd/display: Add DCN3.1 Yellow Carp support to DM
To detect DCN3.1 ASICs and to enable the appropriate number of CRTCs,
pick the right validation paths for display formats and to use the
right DC interfaces.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:19 -04:00
Nicholas Kazlauskas
926d6972ef drm/amd/display: Add DCN3.1 blocks to the DC Makefile
Preparation for compiling DCN3.1 support.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:19 -04:00
Nicholas Kazlauskas
2083640f0d drm/amd/display: Add DCN3.1 Resource
Container for hardware resources and blocks for DCN3.1, also adds
new DC debug flags used with DCN3.1.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:19 -04:00
Nicholas Kazlauskas
bae1f0b8a5 drm/amd/display: Add z10 restore checks for DC interfaces
DMCUB has a deferred z10 restore process that needs signalling from
driver to occur. This needs to be done on any interface that programs
the hardware state or sequences where we expect to have the same
hardware state as before.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:19 -04:00
Nicholas Kazlauskas
64b1d0e8d5 drm/amd/display: Add DCN3.1 HWSEQ
Add DCN3.1 specific hardware sequence programming - extending off of
our existing DCN3/DCN2 support.

Extend stream hardware sequencing to include new DCCG programming.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:19 -04:00
Nicholas Kazlauskas
fcffbcf48d drm/amd/display: Add DCN3.1 BIOS parser support
Updated interfaces for multiple eDP backlight caps.
Added support for interpreting the new BIOS command tables on DCN3.1.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:18 -04:00
Nicholas Kazlauskas
bf62221e9d drm/amd/display: Add DCN3.1 HDCP support
New DTM interface is V3 and we need to extend our existing support
to enable HDCP on DCN3.1.

Version the helpers and fallback to the older versions on failure
in the new interfaces.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:18 -04:00
Nicholas Kazlauskas
809fe88d83 drm/amd/display: Add DCN3.1 PANEL
The PANEL block handles embedded panel power and backlight programming.

This programming and sequencing is now owned by DMCUB and driver will
call into the interface for backlight status and programming.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:18 -04:00
Nicholas Kazlauskas
b04cb1924c drm/amd/display: Add DCN3.1 DMCUB
DMCU-B (Display Micro-Controller Unit B) is a display microcontroller
used for shared display functionality with BIOS and for advanced
power saving display features.

Extends the command header to include new DCN3.1 functionality.

Adds new interfaces to DC dmub interface as well for z-state support.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:18 -04:00
Nicholas Kazlauskas
56546ffc08 drm/amd/display: Add DCN3.1 GPIO support
Extends off of DCN3.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:18 -04:00
Nicholas Kazlauskas
ef22ccbcfb drm/amd/display: Add DCN3.1 IRQ manager
Add IRQ services for DCN3.1 to handle hardware generated interrupts.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:18 -04:00
Nicholas Kazlauskas
74458c081f drm/amd/display: Add DCN3.1 DML calculation support
DML (Display mode library) is used for calculating watermarks, bandwidth
and for validating display configurations.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:18 -04:00
Nicholas Kazlauskas
ba5a537181 drm/amd/display: Add DCN3.1 DCHHUB
Adds DCN3.1 DCHHUB programming and modifies DCN20/DCN30 shared
hardware sequencer helpers to use these hooks.

HW Blocks:

 +--------++------+       +----------+
 |DCHUBBUB|| HUBP |  <--  | MMHUBBUB |
 +--------++------+       +----------+
        |                      ^
        v                      |
    +--------+             +--------+
    |  DPP   | <---------> |  DWB   |
    +--------+             +--------+
        |                      ^
        v                      |
    +--------+                 |
    |  MPC   |                 |
    +--------+                 |
        |                      |
        v                      |
    +-------+                  |
    |  OPP  |                  |
    +-------+                  |
        |                      |
        v                      |
    +--------+                /
    |  OPTC  |  --------------
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+

No changes to MMHUBBUB or DWB programming, added to diagram for clarity.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:18 -04:00
Nicholas Kazlauskas
110d3968fe drm/amd/display: Add DCN3.1 OPTC
Add support for programming the DCN3.1 OPTC (Output Timing Controller)

HW Blocks:

    +--------+
    |  MPC   |
    +--------+
        |
        v
    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+

There are no changes to OPP or MPC for DCN3.1, so the diagram will
include them in this patch.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:18 -04:00
Nicholas Kazlauskas
cbaf919f33 drm/amd/display: Add DCN3.1 DIO
Add support for the DIO (Display IO) block of DCN3.1 which controls
legacy HDMI/DP stream/link encoding.

HW Blocks:

    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+

Includes some updates to core logic for link encoder assignment and
future support for new high bandwidth output.

v2: squash in unused variable fix (Alex)

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:39:18 -04:00
Nicholas Kazlauskas
d8a2b4f3a9 drm/amd/display: Add DCN3.1 DCCG
Add programming of the DCCG (Display Controller Clock Generator) block:

HW Blocks:

    +--------+
    |  DCCG  |
    +--------+

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:26 -04:00
Nicholas Kazlauskas
118a331516 drm/amd/display: Add DCN3.1 clock manager support
Adds support for clock requests for the various parts of the DCN3.1 IP
and the interfaces and definitions for sending messages to SMU/PMFW.

Includes new support for z9/10, detecting SMU timeout and p-state
support enablement.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:26 -04:00
Nicholas Kazlauskas
d997ea5c58 drm/amd/display: Add DCN3.1 yellow carp asic family IDs
[Why & How]
To determine whether the chip is yellow carp or not and which revision
it is.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:26 -04:00
Nicholas Kazlauskas
753625643e drm/amdgpu: Update atomfirmware for DCN3.1 phy tuning and eDP caps
[Why & How]
We'll need these in driver for phy tuning in DCN3.1.

Multiple eDP support also requires understanding which LCD the backlight
curve in atombios is for.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:25 -04:00
James Zhu
bdc974cfd7 drm/amdgpu: add video_codecs query support for yellow carp
Add video_codecs query support for yellow carp.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:25 -04:00
Xiaomeng Hou
203ed53f65 drm/amd/pm: disable manually setting MCLK power level on yellow carp
PMFW provides specific messages for setting fclk freq range thus adjust
the power level. There's misusing of these messages when setting
dpm mclk. Since actually mclk could adjust automatically complying with
fclk, remove standalone support for mclk dpm level setting.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:25 -04:00
Aaron Liu
7d38d9dc4e drm/amdgpu: add mode2 reset support for yellow carp
This patch adds mode2 reset support for yellow carp.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:24 -04:00
Xiaomeng Hou
6c83a0151b drm/amd/pm: add set_performance_level function for yellow carp
This patch enables editing sysfs file power_dpm_force_performance_level
for yellow carp. User could thus adjust the dpm forced level.

v2: enable fine grain control of GFXCLK only when in manual performance
level mode. In other mode, the min/max range of GFXCLK will be reset to
corresponding values.

Ex: To enable min 300MHz / max 600MHz gfx clocks

1) echo manual > /sys/bus/pci/devices/.../power_dpm_force_performance_level
2) echo s 0 300 > /sys/bus/pci/devices/.../pp_od_clk_voltage
3) echo s 1 600 > /sys/bus/pci/devices/.../pp_od_clk_voltage
4) echo c > /sys/bus/pci/devices/.../pp_od_clk_voltage

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:24 -04:00
Xiaomeng Hou
0cf6faafc4 drm/amdgpu: correct the cu and rb info for yellow carp
Skip disabled sa to correct the cu_info and active_rbs for yellow carp.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Suggested-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:24 -04:00
Xiaomeng Hou
b3accd6f66 drm/amdgpu: add gpu harvest support for yellow carp (v2)
Register callback in gfxhub functions to program the bypass groups in
gc_utcl2 corresponding to harvested SA.

v2: update comments (Alex)

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:24 -04:00
Xiaomeng Hou
9df5b9bd8b drm/amd/pm: add the interface to dump smu metrics table for yellow carp
This patch is to add the interface to dump smu metrics table for yellow
carp.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:23 -04:00
Xiaomeng Hou
bd8dcea93a drm/amd/pm: add callbacks to read/write sysfs file pp_power_profile_mode
Implement the sysfs API for getting/setting pp_power_profile_mode for
yellow carp.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:23 -04:00
Xiaomeng Hou
40954754f7 drm/amd/pm: add callback get_dpm_ultimate_freq for yellow carp
Add callback function to get the hard frequency range of a clock domain
for yellow carp.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:23 -04:00
Xiaomeng Hou
3df43e65e7 drm/amd/pm: add callback to get bootup values for yellow carp
Add get_vbios_bootup_values function to get the bootup values for yellow
carp.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-04 16:03:22 -04:00