Commit Graph

900399 Commits

Author SHA1 Message Date
Baolin Wang
b88d145191 pinctrl: Export some needed symbols at module load time
Export the pin_get_name()/pinconf_generic_parse_dt_config() symbols needed
by the Spreadtrum pinctrl driver when building it as a module.

Signed-off-by: Baolin Wang <baolin.wang7@gmail.com>
Link: https://lore.kernel.org/r/f4e7e20afacb23e6fa7a6b33ea4319b2b3492840.1582776447.git.baolin.wang7@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-29 00:25:01 +01:00
YueHaibing
2353810dac pinctrl: da9062: Fix error gpiolib.h path
gcc 7.4.0 build fails:

drivers/pinctrl/pinctrl-da9062.c:28:10: fatal error: ../gpio/gpiolib.h: No such file or directory
 #include <../gpio/gpiolib.h>
          ^~~~~~~~~~~~~~~~~~~

Fix this wrong include path.

Fixes: 56cc3af4e8 ("pinctrl: da9062: add driver support")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20200228063429.47528-1-yuehaibing@huawei.com
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-28 14:15:53 +01:00
Linus Walleij
819e8f804a pinctrl: sh-pfc: Updates for v5.7
- Improve checks for pinctrl table validation,
   - Miscellaneous cleanups.
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Merge tag 'sh-pfc-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v5.7

  - Improve checks for pinctrl table validation,
  - Miscellaneous cleanups.
2020-02-26 16:08:48 +01:00
Marco Felsch
9779542003 gpiolib: export gpiochip_get_desc
The function was currently used internal by the gpiolib. Since commit
56cc3af4e8 ("pinctrl: da9062: add driver support") it is also used by
drivers so we need to export the symbol.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.kernel.org/r/20200225093102.10964-1-m.felsch@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-25 15:52:56 +01:00
Dan Carpenter
3385ab72d9 pinctrl: mediatek: Fix some off by one bugs
These comparisons should be >= instead of > to prevent accessing one
element beyond the end of the hw->soc->pins[] array.

Fixes: 3de7deefce ("pinctrl: mediatek: Check gpio pin number and use binary search in mtk_hw_pin_field_lookup()")
Fixes: 184d8e13f9 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20200218055247.74s2xa7veqx2do34@kili.mountain
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 17:11:40 +01:00
Josh Poimboeuf
d6d43a9217 pinctrl: ingenic: Improve unreachable code generation
In the second loop of ingenic_pinconf_set(), it annotates the switch
default case as unreachable().  The annotation is technically correct,
because that same case would have resulted in an early function return
in the previous loop.

However, the compiled code is suboptimal.  GCC seems to work extra hard
to ensure that the unreachable code path triggers undefined behavior.
The function would fall through to start executing whatever function
happens to be next in the compilation unit.

This is problematic because:

  a) it adds unnecessary 'ensure undefined behavior' logic, and
     corresponding i-cache footprint; and

  b) it's less robust -- if a bug were to be introduced, falling through
     to the next function would be catastrophic.

Yet another issue is that, while objtool normally understands
unreachable() annotations, there's one special case where it doesn't:
when the annotation occurs immediately after a 'ret' instruction.  That
happens to be the case here because unreachable() is immediately before
the return.

Remove the unreachable() annotation and replace it with a comment.  This
simplifies the code generation and changes the unreachable error path to
just silently return instead of corrupting execution.

This fixes the following objtool warning:

  drivers/pinctrl/pinctrl-ingenic.o: warning: objtool: ingenic_pinconf_set() falls through to next function ingenic_pinconf_group_set()

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://lore.kernel.org/r/bc20fdbcb826512cf76b7dfd0972740875931b19.1582212881.git.jpoimboe@redhat.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 16:30:43 +01:00
Ansuel Smith
8d8cec9bf6 ipq8064: pinctrl: Fixed missing RGMII pincontrol definitions
Add missing gpio definition for mdio and rgmii2.

Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20200219175940.744-1-ansuelsmth@gmail.com
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 16:23:26 +01:00
Anson Huang
61bccd918c dt-bindings: pinctrl: imx8mp: Replace the uint32-array with uint32-matrix
The items of mux_reg/conf_reg/input_reg/mux_val/input_val/pad_setting
should be uint32-matrix instead of uint32-array, fix it and improve the
schema and example.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1582012300-30260-4-git-send-email-Anson.Huang@nxp.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:45:30 +01:00
Anson Huang
f4a776f752 dt-bindings: pinctrl: Convert i.MX8MN to json-schema
Convert the i.MX8MN pinctrl binding to DT schema format using json-schema

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1582012300-30260-3-git-send-email-Anson.Huang@nxp.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:44:11 +01:00
Anson Huang
03b4154183 dt-bindings: pinctrl: Convert i.MX8MM to json-schema
Convert the i.MX8MM pinctrl binding to DT schema format using json-schema

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1582012300-30260-2-git-send-email-Anson.Huang@nxp.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:43:09 +01:00
Anson Huang
b3a3740c35 dt-bindings: pinctrl: Convert i.MX8MQ to json-schema
Convert the i.MX8MQ pinctrl binding to DT schema format using json-schema

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1582012300-30260-1-git-send-email-Anson.Huang@nxp.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:41:47 +01:00
Gustavo A. R. Silva
aa0ed0d00f pinctrl: uniphier: Replace zero-length array with flexible-array member
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Link: https://lore.kernel.org/r/20200217185437.GA20901@embeddedor
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:36:24 +01:00
周琰杰 (Zhou Yanjie)
b295474360 pinctrl: Ingenic: Add missing parts for X1830.
Add lcd pinctrl driver for X1830.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lore.kernel.org/r/1581851828-3493-3-git-send-email-zhouyanjie@wanyeetech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:20:39 +01:00
Matti Vaittinen
3c82787359 pinctrl: Use new GPIO_LINE_DIRECTION
Use newly added GPIO defines GPIO_LINE_DIRECTION_IN and
GPIO_LINE_DIRECTION_OUT instead of using hard-coded 1 and 0.

Main benefit is to make it easier to see which values mean IN and which
OUT. As a side effect this helps GPIO framework to change the direction
defines to something else if ever needed.

Please note that return value from get_direction call on
pinctrl-axp209 driver was changed. Previously pinctrl-axp209 might have
returned value 2 for direction INPUT.

Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Reported-by: kbuild test robot <lkp@intel.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Link: https://lore.kernel.org/r/20200214135712.GA14557@localhost.localdomain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:19:42 +01:00
Samuel Holland
8587b21c59 pinctrl: sunxi: Mask non-wakeup IRQs on suspend
The pin controller hardware does not distinguish IRQs intended for
wakeup from other IRQs, so we must mask non-wakeup IRQs in software to
prevent inadvertent wakeups. This is accomplished at the irqchip level
via the IRQCHIP_MASK_ON_SUSPEND flag.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200117213340.47714-2-samuel@sholland.org
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:16:08 +01:00
Samuel Holland
a59c99d9ea pinctrl: sunxi: Forward calls to irq_set_irq_wake
The pinctrl irqchip may be connected to an irqchip that implements the
.irq_set_wake callback, such as the R_INTC on A31 and newer sunxi SoCs.
In order for GPIOs to be able to trigger wakeup, the IRQ from the
pinctrl to the upper irqchip must also be enabled for wakeup. Since the
kernel's IRQ core already manages the "wake_depth" of each IRQ, no
additional accounting is needed in the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200117213340.47714-1-samuel@sholland.org
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:14:24 +01:00
Geert Uytterhoeven
ffe9f9b051 pinctrl: sh-pfc: Remove use of ARCH_R8A7795
CONFIG_ARCH_R8A7795 was split in CONFIG_ARCH_R8A77950 and
CONFIG_ARCH_R8A77951 in commit b925adfceb ("soc: renesas: Add
ARCH_R8A7795[01] for existing R-Car H3"), so its users can be removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200218112557.5924-1-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
6793baa31d pinctrl: sh-pfc: gpio: Return early in gpio_pin_to_irq()
As of commit 4adeabd042 ("pinctrl: sh-pfc: Remove hardcoded IRQ
numbers"), only a single operation needs to be performed after finding
the wanted pin.  Hence decrease the needed attention span of the casual
reader by replacing the goto by a direct return.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200212090200.11106-1-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
92c44680c5 pinctrl: sh-pfc: checker: Add function GPIO checks
Add checks for legacy function GPIO descriptors:
  1. Function GPIOs must have a name,
  2. Names must be unique,
  3. Enum ID values must be unique.

This exposes bugs like those fixed in
  - commit 884caadad1 ("pinctrl: sh-pfc: sh7734: Fix duplicate
    TCLK1_B"),
  - commit 55b1cb1f03 ("pinctrl: sh-pfc: sh7264: Fix CAN function
    GPIOs"),
  - commit 02aeb2f215 ("pinctrl: sh-pfc: sh7269: Fix CAN function
    GPIOs"),
  - commit db9c07272c ("sh: sh7264: Remove bogus SSU GPIO function
    definitions"),
  - commit b4fba344a2 ("sh: sh7269: Remove bogus SSU GPIO function
    definitions").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-14-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
0e6cd847a4 pinctrl: sh-pfc: checker: Add data register checks
Add checks for data register descriptors:
  1. Register addresses must be unique.
  2. Enum ID values must be unique.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-13-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
4bd7d16a30 pinctrl: sh-pfc: checker: Add ioctrl register checks
Add checks for generic control register descriptors:
  1. Register addresses must be unique.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-12-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
8990cd297f pinctrl: sh-pfc: checker: Add bias register checks
Add checks for bias register descriptors:
  1. Pull-up and optional pull-down register addresses must be unique,
  2. Referred pins must exist.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-11-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
08df16e07a pinctrl: sh-pfc: checker: Add drive strength register checks
Add checks for drive strength register descriptors:
  1. Register addresses must be unique,
  2. Register fields must be non-overlapping,
  3. Referred pins must exist.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-10-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
40c8e4aad4 pinctrl: sh-pfc: checker: Improve pin group checks
Improve the checks for pin group descriptors:
  1. Introduce a local variable for the current group, to make the
     checks easier to read,
  2. Pin group names must be unique.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-9-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
a95b077db4 pinctrl: sh-pfc: checker: Improve pin function checks
Improve the checks for pin function descriptors:
  1. Merge declaration and assignment of the local variable for the
     current pin function,
  2. Pin function names must be unique.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-8-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
4ef30dc72d pinctrl: sh-pfc: checker: Improve pin checks
Improve the checks for pin descriptors:
  1. Introduce local variables for the current pin, to make the checks
     easier to read,
  2. Pins must have a name,
  3. Fix double printing of identical pin names.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-7-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
12d057bad6 pinctrl: sh-pfc: checker: Add check for enum ID conflicts
Add a helper to verify that enum IDs are unique, and use it to validate
the enum ID arrays in config register descriptors.

This exposes bugs like those fixed in:
  - commit 805f635703 ("pinctrl: sh-pfc: r8a7778: Fix duplicate
    SDSELF_B and SD1_CLK_B"),
  - commit 884caadad1 ("pinctrl: sh-pfc: sh7734: Fix duplicate
    TCLK1_B"),
  - commit 2a069a9281 ("pinctrl: sh-pfc: sh7264: Fix Port K I/O
    Register 0 definition").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-6-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
3c26186472 pinctrl: sh-pfc: checker: Add check for config register conflicts
Add a helper to verify that register addresses are unique, and use it to
validate config register descriptors.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-5-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
1251887c0c pinctrl: sh-pfc: checker: Add helper for safe name comparison
Add a helper to check if two strings are identical, skipping NULL
pointers.  This simplifies callers.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-4-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven
c3f8dcee7a pinctrl: sh-pfc: checker: Add helpers for reporting
Add helpers to report errors and warnings, and to increase the
corresponding counters.  This simplifies callers.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-3-geert+renesas@glider.be
2020-02-21 13:57:40 +01:00
YueHaibing
86ecb7d685 pinctrl: mediatek: remove set but not used variable 'e'
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c: In function mtk_hw_pin_field_lookup:
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c:70:39: warning:
 variable e set but not used [-Wunused-but-set-variable]

Since commit 3de7deefce ("pinctrl: mediatek: Check gpio pin
number and use binary search in mtk_hw_pin_field_lookup()"),
it is not used any more, so remove it, also remove redundant
assignment to variable c, it will be assigned a new value later
before used.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20200218023625.14324-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-20 16:13:31 +01:00
Marco Felsch
56cc3af4e8 pinctrl: da9062: add driver support
The DA9062 is a mfd pmic device which supports 5 GPIOs. The GPIOs can
be used as input, output or have a special use-case.

The patch adds the support for the normal input/output use-case.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.kernel.org/r/20200108104746.1765-4-m.felsch@pengutronix.de
Reviewed-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-19 17:16:31 +01:00
Andy Shevchenko
c93214689f MAINTAINERS: Sort entries in database for PIN CONTROLLER
Run parse-maintainers.pl and choose PIN CONTROLLER records.
Fix them accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200128154949.66521-1-andriy.shevchenko@linux.intel.com
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:52:00 +01:00
Stefan Wahren
b1d84a3d0a pinctrl: bcm2835: Add support for all GPIOs on BCM2711
The BCM2711 supports 58 GPIOs. So extend pinctrl and GPIOs accordingly.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1581166975-22949-4-git-send-email-stefan.wahren@i2se.com
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:49:28 +01:00
Stefan Wahren
90bfaf028d pinctrl: bcm2835: Refactor platform data
This prepares the platform data to be easier to extend for more GPIOs.
Except of this there is no functional change.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1581166975-22949-3-git-send-email-stefan.wahren@i2se.com
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:48:11 +01:00
Stefan Wahren
be30d5de0a pinctrl: bcm2835: Drop unused define
There is no usage for this define, so drop it.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1580148908-4863-2-git-send-email-stefan.wahren@i2se.com
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:46:47 +01:00
Matheus Castello
6f87359e8b pinctrl: actions: Fix functions groups names for S700 SoC
Group names by function do not match their respective structures and
documentation defined names.

This fixes following errors when groups names defined on documentation are used:
[    4.262778] pinctrl-s700 e01b0000.pinctrl: invalid group "sd0_d1_mfp" for function "sd0"
[    4.271394] pinctrl-s700 e01b0000.pinctrl: invalid group "sd0_d2_d3_mfp" for function "sd0"
[    4.280248] pinctrl-s700 e01b0000.pinctrl: invalid group "sd1_d0_d3_mfp" for function "sd0"
[    4.289122] pinctrl-s700 e01b0000.pinctrl: invalid group "sd0_cmd_mfp" for function "sd0"

Fixes: 81c9d563cc (pinctrl: actions: Add Actions Semi S700 pinctrl driver)
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Link: https://lore.kernel.org/r/20200124133758.10089-1-matheus@castello.eng.br
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:43:35 +01:00
Light Hsieh
184d8e13f9 pinctrl: mediatek: Add support for pin configuration dump via debugfs.
Add support for pin configuration dump via catting
/sys/kernel/debug/pinctrl/$platform_dependent_path/pinconf-pins.
pinctrl framework had already support such dump. This patch implement the
operation function pointer to fullfill this dump.

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-6-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:38:26 +01:00
Light Hsieh
cafe19db77 pinctrl: mediatek: Backward compatible to previous Mediatek's bias-pull usage
Refine mtk_pinconf_set()/mtk_pinconf_get() for backward compatibility to
previous MediaTek's bias-pull usage.
In PINCTRL_MTK that use pinctrl-mtk-common.c, bias-pull setting for pins
with 2 pull resistors can be specified as value for bias-pull-up and
bias-pull-down. For example:
    bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
    bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
    bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
    bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
    bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
    bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
    bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
    bias-pull-down = <MTK_PUPD_SET_R1R0_11>;

On the other hand, PINCTRL_MTK_PARIS use customized properties
"mediatek,pull-up-adv" and "mediatek,pull-down-adv" to specify bias-pull
setting for pins with 2 pull resistors.
This introduce in-compatibility in device tree and increase porting
effort to MediaTek's customer that had already used PINCTRL_MTK version.
Besides, if customers are not aware of this change and still write devicetree
for PINCTRL_MTK version, they may encounter runtime failure with pinctrl and
spent time to debug.

This patch adds backward compatible to previous MediaTek's bias-pull usage
so that Mediatek's customer need not use a new devicetree property name.
The rationale is that: changing driver implementation had better leave
interface unchanged.

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-5-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:36:49 +01:00
Light Hsieh
1bea6afbc8 pinctrl: mediatek: Refine mtk_pinconf_get()
Correct cases for PIN_CONFIG_SLEW_RATE, PIN_CONFIG_INPUT_SCHMITT_ENABLE,
and PIN_CONFIG_OUTPUT_ENABLE -
Use variable ret to receive value in mtk_hw_get_value() (instead of
variable val) since pinconf_to_config_packed() at end of this function
use variable ret to pack config value.

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-4-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:32:49 +01:00
Light Hsieh
3599cc5254 pinctrl: mediatek: Refine mtk_pinconf_get() and mtk_pinconf_set()
1.Refine mtk_pinconf_get():
  Use only one occurrence of return at end of this function.

2.Refine mtk_pinconf_set():
2.1 Use only one occurrence of return at end of this function.
2.2 Modify case of PIN_CONFIG_INPUT_ENABLE -
2.2.1
    Regard all non-zero setting value as enable, instead of always enable.
2.2.2
    Remove check of ies_present flag and always invoke mtk_hw_set_value()
    since mtk_hw_pin_field_lookup() invoked inside mtk_hw_set_value() has
    the same effect of checking if ies control is supported.
    [The rationale is that: available of a control is always checked
     in mtk_hw_pin_field_lookup() and no need to add ies_present flag
     specially for ies control.]
2.3 Simply code logic for case of PIN_CONFIG_INPUT_SCHMITT.
2.4 Add case for PIN_CONFIG_INPUT_SCHMITT_ENABLE and process it with the
    same code for case of PIN_CONFIG_INPUT_SCHMITT.

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-3-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:31:18 +01:00
Light Hsieh
5f755e1f1e pinctrl: mediatek: Supporting driving setting without mapping current to register value
MediaTek's smartphone project actual usage does need to know current value
(in mA) in procedure of finding the best driving setting.
The steps in the procedure is like as follow:

1. set driving setting field in setting register as 0, measure waveform,
   perform test, and etc.
2. set driving setting field in setting register as 1, measure waveform,
   perform test, and etc.
...
n. set driving setting field in setting register as n-1, measure
   waveform, perform test, and etc.
Check the results of steps 1~n and adopt the setting that get best result.

This procedure does need to know the mapping between current to register
value.
Therefore, setting driving without mapping current is more practical for
MediaTek's smartphone usage.

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-2-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:29:09 +01:00
Light Hsieh
3de7deefce pinctrl: mediatek: Check gpio pin number and use binary search in mtk_hw_pin_field_lookup()
1. Check if gpio pin number is in valid range to prevent from get invalid
   pointer 'desc' in the following code:
	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];

2. Improve  mtk_hw_pin_field_lookup()
2.1 Modify mtk_hw_pin_field_lookup() to use binary search for accelerating
     search.
2.2 Correct message after the following check fail:
    if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) {
		rc = &hw->soc->reg_cal[field];
    The original message is:
    	"Not support field %d for pin %d (%s)\n"
    However, the check is on soc chip level, not on pin level yet.
    So the message is corrected as:
    	"Not support field %d for this soc\n"

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-1-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:26:29 +01:00
Sricharan R
ef1ea54eab pinctrl: qcom: Add ipq6018 pinctrl driver
Add initial pinctrl driver to support pin configuration with
pinctrl framework for ipq6018.

Co-developed-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Link: https://lore.kernel.org/r/1579439601-14810-3-git-send-email-sricharan@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:17:04 +01:00
Sricharan R
eed1015c4c dt-bindings: pinctrl: qcom: Add ipq6018 pinctrl bindings
Add device tree binding Documentation details for ipq6018
pinctrl driver.

Co-developed-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Link: https://lore.kernel.org/r/1579439601-14810-2-git-send-email-sricharan@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:15:38 +01:00
Geert Uytterhoeven
264716935e pinctrl: sh-pfc: checker: Move data before code
Restructure the checker to move all data definitions to the top, before
the code.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-2-geert+renesas@glider.be
2020-02-10 14:12:11 +01:00
Linus Torvalds
bb6d3fb354 Linux 5.6-rc1 2020-02-09 16:08:48 -08:00
Linus Torvalds
89a47dd1af Kbuild updates for v5.6 (2nd)
- fix randconfig to generate a sane .config
 
  - rename hostprogs-y / always to hostprogs / always-y, which are
    more natual syntax.
 
  - optimize scripts/kallsyms
 
  - fix yes2modconfig and mod2yesconfig
 
  - make multiple directory targets ('make foo/ bar/') work
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Merge tag 'kbuild-v5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild

Pull more Kbuild updates from Masahiro Yamada:

 - fix randconfig to generate a sane .config

 - rename hostprogs-y / always to hostprogs / always-y, which are more
   natual syntax.

 - optimize scripts/kallsyms

 - fix yes2modconfig and mod2yesconfig

 - make multiple directory targets ('make foo/ bar/') work

* tag 'kbuild-v5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
  kbuild: make multiple directory targets work
  kconfig: Invalidate all symbols after changing to y or m.
  kallsyms: fix type of kallsyms_token_table[]
  scripts/kallsyms: change table to store (strcut sym_entry *)
  scripts/kallsyms: rename local variables in read_symbol()
  kbuild: rename hostprogs-y/always to hostprogs/always-y
  kbuild: fix the document to use extra-y for vmlinux.lds
  kconfig: fix broken dependency in randconfig-generated .config
2020-02-09 16:05:50 -08:00
Linus Torvalds
380a129eb2 fs: New zonefs file system
Zonefs is a very simple file system exposing each zone of a zoned block
 device as a file.
 
 Unlike a regular file system with native zoned block device support
 (e.g. f2fs or the on-going btrfs effort), zonefs does not hide the
 sequential write constraint of zoned block devices to the user. As a
 result, zonefs is not a POSIX compliant file system. Its goal is to
 simplify the implementation of zoned block devices support in
 applications by replacing raw block device file accesses with a richer
 file based API, avoiding relying on direct block device file ioctls
 which may be more obscure to developers.
 
 One example of this approach is the implementation of LSM
 (log-structured merge) tree structures (such as used in RocksDB and
 LevelDB) on zoned block devices by allowing SSTables to be stored in a
 zone file similarly to a regular file system rather than as a range of
 sectors of a zoned device. The introduction of the higher level
 construct "one file is one zone" can help reducing the amount of changes
 needed in the application while at the same time allowing the use of
 zoned block devices with various programming languages other than C.
 
 Zonefs IO management implementation uses the new iomap generic code.
 Zonefs has been successfully tested using a functional test suite
 (available with zonefs userland format tool on github) and a prototype
 implementation of LevelDB on top of zonefs.
 
 Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
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Merge tag 'zonefs-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/zonefs

Pull new zonefs file system from Damien Le Moal:
 "Zonefs is a very simple file system exposing each zone of a zoned
  block device as a file.

  Unlike a regular file system with native zoned block device support
  (e.g. f2fs or the on-going btrfs effort), zonefs does not hide the
  sequential write constraint of zoned block devices to the user. As a
  result, zonefs is not a POSIX compliant file system. Its goal is to
  simplify the implementation of zoned block devices support in
  applications by replacing raw block device file accesses with a richer
  file based API, avoiding relying on direct block device file ioctls
  which may be more obscure to developers.

  One example of this approach is the implementation of LSM
  (log-structured merge) tree structures (such as used in RocksDB and
  LevelDB) on zoned block devices by allowing SSTables to be stored in a
  zone file similarly to a regular file system rather than as a range of
  sectors of a zoned device. The introduction of the higher level
  construct "one file is one zone" can help reducing the amount of
  changes needed in the application while at the same time allowing the
  use of zoned block devices with various programming languages other
  than C.

  Zonefs IO management implementation uses the new iomap generic code.
  Zonefs has been successfully tested using a functional test suite
  (available with zonefs userland format tool on github) and a prototype
  implementation of LevelDB on top of zonefs"

* tag 'zonefs-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/zonefs:
  zonefs: Add documentation
  fs: New zonefs file system
2020-02-09 15:51:46 -08:00
Marc Zyngier
490d332ea4 irqchip/gic-v4.1: Avoid 64bit division for the sake of 32bit ARM
In order to allow the GICv4 code to link properly on 32bit ARM,
make sure we don't use 64bit divisions when it isn't strictly
necessary.

Fixes: 4e6437f12d ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-02-09 15:47:37 -08:00