The patch is for w90p910 platform default config.
Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Split off Orion GPIO handling code into plat-orion/, and add
support for multiple sets of (32) GPIO pins.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
When CONFIG_PM is selected, the VFP code does not have any handler
installed to deal with either saving the VFP state of the current
task, nor does it do anything to try and restore the VFP after a
resume.
On resume, the VFP will have been reset and the co-processor access
control registers are in an indeterminate state (very probably the
CP10 and CP11 the VFP uses will have been disabled by the ARM core
reset). When this happens, resume will break as soon as it tries to
unfreeze the tasks and restart scheduling.
Add a sys device to allow us to hook the suspend call to save the
current thread state if the thread is using VFP and a resume hook
which restores the CP10/CP11 access and ensures the VFP is disabled
so that the lazy swapping will take place on next access.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As per Russell King's last review comment, find and remove
all unnecessary includes of <linux/delay.h> in the files
that do not need them.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The commit 39263db7986bf15c753f6847699107bdf5a2e318 added
a default <mach/io.h> implementation which is shared if
needed between all the s3c implementations. Remove the
s3c24a0 version which is the same as this.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
As noted by Russell King, do not print any warnings if the
uinfo or tty fields are not set when a CPU frequency change
is sent.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The changes for ARM highmem support have removed the need
for the __virt_to_bus and __bus_to_virt macros, so remove them
from this build.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the fourth UART definition for the S3C2443, and at the
same time fixup the problems caused by the enlarging of the
UART array in the previous commits.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the usage of CONFIG_SERIAL_SAMSUNG_UARTS in several places
in the kernel where it had been missed. This finishes fixing a
long standing issue where S3C2443 and S3C64XX could not use the
4th UART
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch removes the inclusion of mach/hardware.h from mach/irqs.h and
switches to more meaningful names for the irq related macros.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a missing call to local_irq_restore() and fixes some
compiler warnings about unused variables for MX1.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add GPIO support to the SM501 on the Simtec Anubis,
and then add the necessary updates for allowing the
two gpio I2C busses to be used.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the name of the driver, as well as the fact we are not
passing the number of chipselects to the driver.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
A common core driver for the S3C24XX ADC block so that
the touchscreen, hwmon and any other drivers can share
the resource.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Changes made as suggested by Eric Miao (including fix to map_io
silly mistake!).
Originally designed by Intel, now sold by Crossbow (www.xbow.com).
Very little actually on board. The patch includes sensors and
similar as found on commonly occurring daughter boards.
Some of the drivers are not in mainline as yet as they are either
part of the IIO subsystem or need a lot of work before submission.
What is the position wrt to putting them in i2c board configs etc?
Support for these boards has been maintained outside the kernel
for a long time, but now that there is a good da9030 pmic driver
available the last major hurdle no longer exists.
All comments welcomed.
The Imote2's big brother (stargate2) will follow once any problems
with this one have been cleaned up and a few bits and bobs have
been added to the da903x driver. Hopefully the cc2420 driver will
get cleaned up and submitted in the not too distant future as
well.
Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
I2C platform data setups.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Matrix and single key setups for all phones.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Antonio Ospite <ospite@studenti.unina.it>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Pin configs for different generations and phones.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Our bootloader now supports ATAGS_MEM
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
fbi->state change shall really be protected by fbi->ctrlr_lock, where
the change is sheltered. There is a possibility that pxafb_smart_thread
will start update the LCD panel when fbi->state == C_ENABLE, while
all other initialization isn't done.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Some smart panel requires a delay between command sequences, while PXA
LCD controller didn't provide such one, let's emulate this by software.
A software delay marker can be inserted into the command sequence, once
pxafb_smart_queue() detects this, it flushes the previous commands and
delay for a specified number of milliseconds.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
For smart panels (LCD panel with internal framebuffer), the following
LCCR3 register bits have different meanings than the parallel one:
LCCR3_PCP - controls the L_PCLK_WR polarity
LCCR3_HSP - controls the L_LCLK_A0 polarity
LCCR3_VSP - controls the L_FCLK_RD polarity
To keep minimum change to the original parallel timing, the .lcd_conn
flags and 'pxafb_mode_info.sync' are re-used to reflect this:
LCD_PCLK_EDGE_{RISE,FALL} - configures LCCR3_PCP
sync & FB_SYNC_{HOR,VERT}_HIGH_ACT - configures LCCR3_{HSP,VSP}
Signed-off-by: Eric Miao <eric.miao@marvell.com>
