Restore support for CONFIG_EXCPT_IRQ_SYSC_L1 in the MPU CPLB manager.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than declaring pin resources in the drivers, do it in the board.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This makes room for off-chip IRQ controllers.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some userspace applications use this member in diagnosing crashes. It
also makes some LTP tests pass (i.e. the Blackfin arch behaves more like
everyone else).
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Just generate a random MAC on the demo board since the ADF702x lacks
dedicated storage for such things.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When the kernel is executing out of parallel flash (XIP), we can't have
the flash go into an erase/programming cycle, otherwise the instruction
fetching steps fail and everything crashes.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The locking code in the address dumper needs to grab the mm's mmap_sem
so that other CPUs do not get an inconsistent view. On UP systems this
really wasn't a problem, but it is easy to trigger a race on SMP systems
when another CPU removes a mapping.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This condition allowed only decoding of opcode 0x0040
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
During very early init, the stack pointer is given a slightly incorrect
value (&init_thread_union). The value is later adjusted to the right one
during early init (&init_thread_union + THREAD_SIZE), but it is used a few
times in between. While the few functions used don't actually put things
onto the stack (due to optimization), it's best if we simply use the right
value from the start.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the common attribute rather than setting the section name directly.
The common linker script defines expect the newer naming.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since we are now discarding .exit.text at runtime instead of link time, we
need to place all .text sections ahead of the .data sections. Otherwise,
a really large attached initramfs may cause link errors as it pushes the
PC relative relocations behind the limits of the Blackfin ISA (~16meg).
The instructions in the .exit.text are unable to call back into the .text
sections leading to a link failure.
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
There is no need to use {get,put}_cpu() when we already have a spinlock to
protect against multiple processors running simultaneously.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
SMP systems require per-cpu local clock event devices in order to enable
HRT support. One a BF561, we can use local core timer for this purpose.
Originally, there was one global core-timer clock event device set up for
core A.
To accomplish this feat, we need to split the gptimer0/core timer logic
so that each is a standalone clock event. There is no requirement that
we only have one clock event source anyways. Once we have this, we just
define per-cpu clock event devices for each local core timer.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Common API already provides functions for managing online CPUs.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that the Blackfin IRQ controller supports this, drivers get the normal
functionality of controlling which CPU to bind IRQs to.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Kconfig option was never mainlined, so replace the define with the
actual pin that it is hooked up to by default.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF51x's Instruction SRAM is 32kB, not 48kB.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The gpio label size is 16 char, but the current code uses a longer name
resulting in chopped display. So use a shorter name.
Reported-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure the non-constant version of the dma_sync functions actually
complete instead of recursively calling itself forever.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current Blackfin SMP code relies on the legacy cpu area code, so
select it until we port things to the newer code.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We weren't handling the user-specified cache behavior for the reserved
memory regions (via mem=/max_mem=). The no-MPU code already takes care
of this, so add support to the MPU code as well.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This lets us support the new BF527-EZKIT V2.1 via platform resources
tweaks only.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Attempting to use the MPU while doing XIP out of parallel flash hooked up
to the async memory bus would often result in random crashes as the MPU
slowly corrupted memory.
The fallout here is that the async banks gain MPU protection from user
space too. So any accesses have to go through the mmap() interface rather
than just using hardcoded pointers.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Sometimes a SMP system will randomly panic at boot. This is due to caches
being out of sync when one core tries to signal the other. So when one
core calls another via IPI, flush the data caches.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
