Commit Graph

30 Commits

Author SHA1 Message Date
Eric Huang
5632708f44 drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2)
Allows you to force multiple levels rather than just one via the new
sysfs interrface.

v2: squash in:
drm/amd/powerplay: ensure clock level set by user is valid.
From Rex.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:47 -04:00
Nils Wallménius
e90b62277b drm/amd/powerplay: mark phm_master_table_* structs as const
Also adjust phm_construct_table to take a const pointer

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:20:17 -04:00
Dave Airlie
902d02db1f Merge branch 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few other misc cleanups and bug fixes for 4.6.  Highlights:
- unify endian handling in powerplay
- powerplay fixes
- fix a regression in 4.5 on boards with no display connectors
- fence cleanups and locking fixes
- whitespace cleanups and code refactoring in radeon

* 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux: (35 commits)
  drm/amdgpu/gfx7: add MTYPE definition
  drm/amdgpu: removing BO_VAs shouldn't be interruptible
  drm/amd/powerplay: show uvd/vce power gate enablement for tonga.
  drm/amd/powerplay: show uvd/vce power gate info for fiji
  drm/amdgpu: use sched fence if possible
  drm/amdgpu: move ib.fence to job.fence
  drm/amdgpu: give a fence param to ib_free
  drm/amdgpu: include the right version of gmc header files for iceland
  drm/radeon: fix indentation.
  drm/amd/powerplay: add uvd/vce dpm enabling flag to fix the performance issue for CZ
  drm/amdgpu: switch back to 32bit hw fences v2
  drm/amdgpu: remove amdgpu_fence_is_signaled
  drm/amdgpu: drop the extra fence range check v2
  drm/amdgpu: signal fences directly in amdgpu_fence_process
  drm/amdgpu: cleanup amdgpu_fence_wait_empty v2
  drm/amdgpu: keep all fences in an RCU protected array v2
  drm/amdgpu: add number of hardware submissions to amdgpu_fence_driver_init_ring
  drm/amdgpu: RCU protected amd_sched_fence_release
  drm/amdgpu: RCU protected amdgpu_fence_release
  drm/amdgpu: merge amdgpu_fence_process and _activity
  ...
2016-03-18 07:16:25 +10:00
Dave Airlie
9f443bf53b Merge branch 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more fixes and cleanups for 4.6:
- DCE code cleanups
- HDP flush/invalidation fixes
- GPUVM fixes
- switch to drm_vblank_[on|off]
- PX fixes
- misc bug fixes

* 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux: (50 commits)
  drm/amdgpu: split pipeline sync out of SDMA vm_flush() as well
  drm/amdgpu: Revert "add mutex for ba_va->valids/invalids"
  drm/amdgpu: Revert "add lock for interval tree in vm"
  drm/amdgpu: Revert "add spin lock to protect freed list in vm (v3)"
  drm/amdgpu: reserve the PD during unmap and remove
  drm/amdgpu: Fix two bugs in amdgpu_vm_bo_split_mapping
  drm/radeon: Don't drop DP 2.7 Ghz link setup on some cards.
  MAINTAINERS: update radeon entry to include amdgpu as well
  drm/amdgpu: disable runtime pm on PX laptops without dGPU power control
  drm/radeon: disable runtime pm on PX laptops without dGPU power control
  drm/amd/amdgpu: Fix indentation in do_set_base() (DCEv8)
  drm/amd/amdgpu: make afmt_init cleanup if alloc fails (DCEv8)
  drm/amd/amdgpu: Move config init flag to bottom of sw_init (DCEv8)
  drm/amd/amdgpu: Don't proceed into audio_fini if audio is disabled (DCEv8)
  drm/amd/amdgpu: Fix identation in do_set_base() (DCEv10)
  drm/amd/amdgpu: Make afmt_init cleanup if alloc fails (DCEv10)
  drm/amd/amdgpu: Move initialized flag to bottom of sw_init (DCEv10)
  drm/amd/amdgpu: Don't proceed in audio_fini if disabled (DCEv10)
  drm/amd/amdgpu: Fix indentation in dce_v11_0_crtc_do_set_base()
  drm/amd/amdgpu: Make afmt_init() cleanup if alloc fails (DCEv11)
  ...
2016-03-17 08:25:04 +10:00
Eric Huang
60123300db drm/amd/powerplay: add uvd/vce dpm enabling flag to fix the performance issue for CZ
Set the UVD and VCE DPM flags otherwise UVD and VCE DPM won't get enabled.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Cc: stable@vger.kernel.org
2016-03-16 18:02:21 -04:00
Dave Airlie
9b61c0fcdf Merge drm-fixes into drm-next.
Nouveau wanted this to avoid some worse conflicts when I merge that.
2016-03-14 09:46:02 +10:00
Rex Zhu
da26bae051 drm/amd/powerplay: refine the dmesg info.
this do not mean driver error.

Change-Id: If2080eb4b79fc6389280b7c75cb7998d77090739
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-05 12:33:40 -05:00
Eric Yang
0f18563aaa drm/amd/powerplay: Enable low mem pstate when cancel_high
Signed-off-by: Eric Yang <eric.yang2@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:19:29 -05:00
Eric Yang
5952c75b41 drm/amd/powerplay: Use correct clock in cz_apply_state_adjust_rules
Signed-off-by: Eric Yang <eric.yang2@amd.com>
Reviewed-by: Eagle Yeh <eagle.yeh@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:17:01 -05:00
Rex Zhu
ff5e20c2a0 drm/amd/powerplay: get real display device num by cgs interface
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:16:23 -05:00
Vitaly Prosyak
58c3ce23c9 drm/amd/powerplay: Use engine clock limit calculated by dal
Use min required system clock calculated by dal

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:14:57 -05:00
Rex Zhu
f1232c6136 drm/amd/powerplay: implement functions in carrizo for DAL.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:13:25 -05:00
Rex Zhu
47329134ae drm/amd/powerplay: change struct name.
amd_pp_dal_clock_info to amd_pp_simple_clock_info.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:11:04 -05:00
Eric Huang
d7341ef668 drm/amd/powerplay: add some hwmgr functions for sysfs interface on Carrizo
These add the interfaces for manual clock control.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:01 -05:00
Alex Deucher
db5cffcd2b drm/amdgpu/cz: plumb pg flags through to powerplay
Enable vce and uvd pg based on single set of pg flags.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:48 -05:00
Alex Deucher
67a0a0fd11 drm/amd/powerplay/cz: disable vce pg
Not working reliably yet.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:45 -05:00
Alex Deucher
d4fdc08e25 drm/amd/powerplay/cz: disable uvd pg
Not working reliably yet.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:44 -05:00
Rex Zhu
4d42fa492e drm/amd/powerplay: implement power down asic task for CZ
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:27 -05:00
Rex Zhu
ab4f4b14c3 drm/amdgpu: fix hex/decimal bug when show gpu load.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:25 -05:00
Rex Zhu
53d3de140b drm/amd/powerplay: fix bug that NULL checks are reversed.
&& was used instead of ||.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:22 -05:00
Rex Zhu
605ed21929 drm/amd/powerplay: show gpu load when print gpu performance for Cz. (v2)
Show GPU load in in the debugfs output.

v2: integrate Tom's optimization

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:58 -05:00
David Rokhvarg
c90e5d20fc drm/amdgpu/powerplay: Program a calculated value as Deep Sleep clock.
This replaces programming of a hardcoded value.

Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
2015-12-21 16:42:56 -05:00
Eric Yang
14f634110f amd/powerplay: Add structures required to report configuration change
Add required structures for amd_powerplay_display_configuration_change

Signed-off-by: Eric Yang <eric.yang2@amd.com>
2015-12-21 16:42:54 -05:00
Vitaly Prosyak
1c9a90820b amd/powerplay: Fix get dal power level
Simplify data struct for get dal power level

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
2015-12-21 16:42:53 -05:00
Vitaly Prosyak
c4dd206be1 amd\powerplay Implement get dal power level
Implement get dal power level and simple clock info

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
2015-12-21 16:42:52 -05:00
David Rokhvarg
6bd48d2404 drm/amd/powerplay: Add PPLib debug print macro.
- The macro is silent by default.
- Use the macro to print Display Configuration - related changes.

Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
2015-12-21 16:42:42 -05:00
Rex Zhu
0f8b106e11 drm/amd/powerplay: enable/disable NB pstate feature for Carrizo.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:42 -05:00
Alex Deucher
9c0bad9074 drm/amd/powerplay: implement smc state upload for CZ
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:38 -05:00
Rex Zhu
28a18bab2e drm/amd/powerplay: add CG and PG support for carrizo
This adds clock and powergating support for CZ.

v2: squash in fixes

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:11 -05:00
Jammy Zhou
bdecc20a98 drm/amd/powerplay: add Carrizo dpm support
This patch enables basic DPM support for Carrizo.
DPM handles dynamic clock and voltage scaling.

v3: delete peci sub-module
v2: use cgs interface directly
    correct define SMU_EnabledFeatureScoreboard_SclkDpmOn

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:10 -05:00