Commit Graph

722902 Commits

Author SHA1 Message Date
Tony Cheng
9168a586e8 drm/amd/display: dal 3.1.23
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:53:26 -05:00
Harry Wentland
963aa22dc9 drm/amd/display: Clean up os_types.h a bit
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:53:20 -05:00
Harry Wentland
4d06ccd0af drm/amd/display: Fix access of wrong array element TF format conversion
Found by smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:357
convert_to_custom_float() error: buffer overflow 'arr_points' 2 <= 2
drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:358
convert_to_custom_float() warn: buffer overflow 'arr_points' 2 <= 2

Regression:
drm/amd/display: Remove extra arr_points element

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:53:11 -05:00
Tony Cheng
77bb51eba9 drm/amd/display: dal 3.1.22
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:53:05 -05:00
Andrew Jiang
e9dd9223c6 drm/amd/display: Add dcc_change surface update flag
Program the DCC registers when dcc_change is true.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:52:58 -05:00
Yongqiang Sun
5cc2687c13 drm/amd/display: Implement work around for optc underflow.
Work around for a hw bug causing optc underflow if blank data
double buffer disable and remove mpcc.
Checking optc status after otg unlock, after wait mpcc idle
check status again, if optc underflow just happens after wait
mpcc idle, clear underflow status and enable blank data double
buffer.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:52:51 -05:00
Andrew Jiang
82c026d14f drm/amd/display: Change optimized_required logic
Rather than setting it every time there's a full update with surface
count > 0, set it when we need to do plane_atomic_disconnect. Also make
sure that we unset the flag in plane_atomic_disable, so that in the
event we run through a sequence where we do disconnect followed by an
immediate disable, we do not do unnecessarily request a passive flip to
do the optimization.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:52:45 -05:00
Harry Wentland
4010472575 drm/amd/display: Add optimized_required flag
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:52:38 -05:00
Yongqiang Sun
1ccda80ff4 drm/amd/display: Use same wait mpcc idle function.
There is already wait mpcc idle function. It is better
to use the same function for all wait mpcc idle.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:52:32 -05:00
Eric Bernstein
49fac0b46a drm/amd/display: MPC updates
Fix update_mpcc logic to only call assert_mpcc_idle_before_connect
if mpcc is not already being used (and required removal).
Update set_out_rate_control to include optional flow control parameter.
In init_mpcc_from_hw check for case where bot_sel is same as mpcc_id.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:52:25 -05:00
Yongqiang Sun
c1fba8204b drm/amd/display: Fixed read wrong reg to get bot_sel.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:52:19 -05:00
Harry Wentland
52924dc3d0 drm/amd/display: Fix potential mem leak in DC construct
Found by smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn:
possible memory leak of 'dc_ctx'
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn:
possible memory leak of 'dc_vbios'
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn:
possible memory leak of 'dcn_ip'
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn:
possible memory leak of 'dcn_soc'

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:52:12 -05:00
Harry Wentland
34996173c8 drm/amd/display: Remove redundant checks in set_default_colors
pipe_ctx->stream and pipe_ctx->plane_state are never NULL

Found by smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:2111
set_default_colors() error: we previously assumed 'pipe_ctx->stream'
could be null (see line 2101)

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:52:06 -05:00
Harry Wentland
ede569844a drm/amd/display: Remove plane_res.mi check in dce110_apply_ctx_for_surface
plane_res.mi (memory interface) can never be NULL for DCE110

Found by smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:2881
dce110_apply_ctx_for_surface() error: we previously assumed
'pipe_ctx->plane_res.mi' could be null (see line 2873)

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:51:59 -05:00
Harry Wentland
492c378aaa drm/amd/display: Remove PSR functions in Linux
NULL check issue found by smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c:1976
dc_link_setup_psr() warn: variable dereferenced before check 'link' (see
line 1970)

We don't use these functions so might as well remove them.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:51:51 -05:00
Eric Bernstein
feb4a3cd8e drm/amd/display: Integrating MPC pseudocode
Integrating MPC pseudocode to support new blending cases
with secondary MPCC list.
This includes a design change to MPC data structures and
interfaces.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:51:45 -05:00
Tony Cheng
4b87d3a87d drm/amd/display: dal 3.1.21
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:51:37 -05:00
Charlene Liu
f033680df6 drm/amd/display: try to find matching audio inst for enc inst first
[Description]
in eDP+ HDMI/DP clone or extended configuration, audio inst changed from inst 1 to inst0.
No failure related this though, just playback device endpoint inst changed.
Also  remove one addition register read.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:51:29 -05:00
Charlene Liu
c984d06b7b drm/amd/display: fix seq issue: turn on clock before programming afmt.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:51:23 -05:00
Yongqiang Sun
096480eac6 drm/amd/display: Remove unnecessary wait mpcc idle.
Before power gate plane, mpcc idle wait is processed,
no need to wait another time.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:51:02 -05:00
Rex Zhu
ebe0dce655 drm/amd/pp: reset dpm level when adjust power state
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:23:02 -05:00
Roger He
5cc636846d drm/ttm: init locked again to prevent incorrect unlock
Signed-off-by: Roger He <Hongbo.He@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-14 10:23:02 -05:00
Rex Zhu
7364d60882 drm/amd/pp: implement dpm_get_sclk/mclk for RV
RV implementation was missing these callbacks.  Used
to fetch the clock values for other components.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-13 17:31:01 -05:00
Chunming Zhou
c4c3351783 drm/amdgpu: fix huge page setting for ATS case
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-13 17:31:01 -05:00
Alex Deucher
44da0d57db drm/amdgpu: drop amdgpu_atombios_scratch_regs_save/restore
No longer used.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-13 17:28:09 -05:00
Alex Deucher
88bc1e3c38 drm/amdgpu: drop scratch regs save and restore from GPU reset handling
The expectation is that the base driver doesn't mess with these.
Some components interact with these directly so let the components
handle these directly.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-13 17:28:09 -05:00
Alex Deucher
4ec6ecf48c drm/amdgpu: drop scratch regs save and restore from S3/S4 handling
The expectation is that the base driver doesn't mess with these.
Some components interact with these directly so let the components
handle these directly.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-13 17:28:09 -05:00
Alex Deucher
e466c2935f drm/amdgpu: remove some old gc 9.x registers
Leftover from bring up.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-13 17:28:08 -05:00
Alex Deucher
2dd744e0ce drm/amdgpu: drop soc15_init_golden_registers
The golden register arrays were empty so the function was
effectively useless.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-13 17:28:08 -05:00
Alex Deucher
670b603c11 drm/amdgpu: drop the bios scratch reg callbacks from nbio
They are not used any longer.  We get the scratch register
locations from the vbios directly now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-13 17:28:07 -05:00
Alex Deucher
bf383fb64e drm/amdgpu: convert nbio to use callbacks (v2)
Cleans up and consolidates all of the per-asic logic.

v2: squash in "drm/amdgpu: fix NULL err for sriov detect" (Chunming)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-13 17:28:07 -05:00
Alex Deucher
74e1d67c73 drm/amdgpu: make function names consistent in nbio files
All functions should have nbio_v* prefix.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:50:17 -05:00
Frank Min
1cb4ca5968 drm/amdgpu: correct vce fw data and stack size
this fix the VCE world switch hang issue

Signed-off-by: Frank Min <Frank.Min@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:50:12 -05:00
Monk Liu
f4534f0654 drm/amdgpu: fix MAP_QUEUES paramter
Should be 0.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:50:05 -05:00
Monk Liu
d118a62153 drm/amdgpu: no need with INT for fence polling
We are polling so no need for INT.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:50:00 -05:00
Monk Liu
b9141cd393 drm/amdgpu: no need to evict VRAM in device_fini
this VRAM evict is not needed and also cost 2seconds
to finish because the IRQ is software side disabled
before it.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:49:56 -05:00
Monk Liu
a8d25a8629 drm/ttm: max_cpages is in unit of native page
fix calculation.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:48:52 -05:00
Monk Liu
0aaa59f525 drm/ttm: fix incorrect calculate on shrink_pages
shrink_pages is in unit of Order after ttm_page_pool_free,
but it is used by nr_free in next round so need change
it into native page unit

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:46:25 -05:00
Christian König
3de676d8e7 drm/amdgpu: allow get_vm_pde to change flags as well
And also provide the level for which we need a PDE.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:46:19 -05:00
Christian König
6989f2460f drm/amdgpu: batch PDE updates again
Now instead of one submission for each PDE batch them together over all
PDs who need an update.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:46:12 -05:00
Christian König
78eb2f0c71 drm/amdgpu: remove keeping the addr of the VM PDs
No more double house keeping.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:46:06 -05:00
Christian König
8f19cd78c9 drm/amdgpu: remove last_entry_used from the VM code
Not needed any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:46:00 -05:00
Christian König
e3a1b32a12 drm/amdgpu: avoid the modulo in amdgpu_vm_get_entry
We can do this with a simple mask as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:45:54 -05:00
Pixel Ding
2ffe31deb2 drm/amdgpu: use polling mem to set SDMA3 wptr for VF
On Tonga VF, there're 2 sources updating wptr registers for
sdma3: 1) polling mem and 2) doorbell. When doorbell and polling
mem are both enabled on sdma3, there will be collision hit in
occasion between those two sources when ucode and h/w are doing
the updating on wptr register in parallel. Issue doesn't happen
on CP GFX/Compute since CP drops all doorbell writes when VF is
inactive. So enable polling mem and don't use doorbell for SDMA3.

Signed-off-by: Pixel Ding <Pixel.Ding@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:45:47 -05:00
Christian König
b852f3d3fb drm/amdgpu: update one PDE at a time v2
Horrible inefficient, but avoids problems when the root PD size becomes
to big.

v2: remove incr as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:45:41 -05:00
Christian König
94c6f5e4d1 drm/amdgpu: stop joining PDEs
That doesn't hit any more most of the time anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:45:34 -05:00
Christian König
79588d21ad drm/amdgpu: add amdgpu_evict_vram debugfs file
Torture test for MM and VM support, can be used to evict all VRAM while
the system is under load.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:45:28 -05:00
Christian König
763efb6c6f drm/amdgpu: cleanup debugfs handling a bit
Remove the superflous .debugfs_init callback and register all files in
amdgpu_device.c in just one function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-12 14:45:07 -05:00
Shaoyun Liu
4fd09a19a6 drm/admgpu: Reduce the usage of soc15ip.h
Remove the header where it's not used.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-08 11:35:19 -05:00
Shaoyun Liu
cd29253f65 drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset
Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-08 11:32:24 -05:00