Commit Graph

649810 Commits

Author SHA1 Message Date
Xiangliang Yu
b6091c1217 drm/amdgpu/ring: add two interfaces to support r/w registers with kiq
During virtual runtime, need to send command to kiq ring to
read/write GPU registers. Add two interface to support the two
actions.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Linu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:21 -05:00
Monk Liu
2493664f05 drm/amdgpu:invoke CSA functions (v2)
Make sure the CSA is mapped.

v2: agd: rebase.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:20 -05:00
Monk Liu
4e4bbe7343 drm/amdgpu:add new file for SRIOV
for SRIOV usage, CSA is only used per device and each
VM will map on it.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:19 -05:00
Monk Liu
bd7de27d81 drm/amdgpu:new field members for SRIOV
and implement CSA functions in this file

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:19 -05:00
Nicolai Hähnle
3e19e69ab0 drm/amd/amdgpu: add check that shadow page tables are GPU-accessible
Skip amdgpu_gem_va_update_vm otherwise. Also clean up the check for the
non-shadow page tables using the new helper function.

This fixes a crash with the stack trace:

amdgpu_gem_va_update_vm
-> amdgpu_vm_update_page_directory
 -> amdgpu_ttm_bind
  -> amdgpu_gtt_mgr_alloc

v2: actually check bo->shadow instead of just checking bo twice

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:18 -05:00
Nicolai Hähnle
d1144b84fc drm/amd/amdgpu: add check that shadow page directory is GPU-accessible
Skip amdgpu_gem_va_update_vm when shadow the page directory is swapped out.
Clean up the check for non-shadow BOs as well using the new helper function.

This fixes a crash with the stack trace:

amdgpu_gem_va_update_vm
-> amdgpu_vm_update_page_directory
 -> amdgpu_ttm_bind
  -> amdgpu_gtt_mgr_alloc

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:17 -05:00
Nicolai Hähnle
b99f31030a drm/amd/amdgpu: add amdgpu_bo_gpu_accessible helper function
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:17 -05:00
Nicolai Hähnle
661a7606c9 drm/amd/amdgpu: move eviction counting to amdgpu_bo_move_notify
This catches evictions of shadow page tables from the GART. Since shadow
page tables are always stored in system memory, amdgpu_bo_move is never
called for them.

This fixes a crash during command submission that occurs when only a shadow
page table and no other BOs were evicted since the last submission.

Fixes: 1baa439fb2 ("drm/amdgpu: allocate shadow for pd/pt bo V2")
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:16 -05:00
Nicolai Hähnle
66257db7a5 drm/ttm: add evict parameter to ttm_bo_driver::move_notify
Ensure that the driver can listen to evictions even when they don't take the
path through ttm_bo_driver::move.

This is crucial for amdgpu, which relies on an eviction counter to skip
re-binding page tables when possible.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:15 -05:00
Rex Zhu
714b1f5371 drm/amdgpu: refine vce3.0 initialize.
1. disable vce cg when vce hw initialize.
2. initizlize vce clock to 10KHz fo dgpu,
   so no need to set bypass clock to vce.

Change-Id: I934c2c4820cc95c1bfa2fa41ff0f40a0d3cd1c40
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:15 -05:00
Rex Zhu
570272d229 drm/amdgpu: extend profiling mode.
in profiling mode, powerplay will fix power state
as stable as possible.and disable gfx cg and LBPW feature.

profile_standard: as a prerequisite, ensure power and thermal
sustainable, set clocks ratio as close to the highest clock
ratio as possible.
profile_min_sclk: fix mclk as profile_normal, set lowest sclk
profile_min_mclk: fix sclk as profile_normal, set lowest mclk
profile_peak: set highest sclk and mclk, power and thermal not
sustainable
profile_exit: exit profile mode. enable gfx cg/lbpw feature.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:14 -05:00
Rex Zhu
7f61bed0c4 drm/amd/powerplay: refine DIDT feature in Powerplay.
Updating SQ DIDT settings and block mask
so SQ uses PCC on Polaris11.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:13 -05:00
Rex Zhu
7ef600e808 drm/amd/powerplay: add new smu message.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:13 -05:00
Rex Zhu
e31e8a226a drm/amd/powerplay: Configuring DIDT blocks only SQ enabled on Polaris11.
following firmware's request.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:12 -05:00
Rex Zhu
8e7afd34fd drm/amdgpu: fix bug return invalid value to sysfs.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:11 -05:00
Huang Rui
c79b55618a drm/amdgpu: add get clockgating_state method for vce v3
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:11 -05:00
Huang Rui
c8781f56c8 drm/amdgpu: add get clockgating_state method for uvd v5&v6
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:10 -05:00
Huang Rui
abd2c2fe12 drm/amdgpu: add get clockgating_state method for vi common
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:09 -05:00
Huang Rui
41c360f6a6 drm/amdgpu: add get clockgating_state method for sdma v3
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:09 -05:00
Huang Rui
8bcab092f8 drm/amdgpu: add get clockgating_state method for gmc v8
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:08 -05:00
Huang Rui
ebd843d6ee drm/amdgpu: add get clockgating_state method for gfx v8
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:07 -05:00
Huang Rui
a8503b15ab drm/amdgpu: add parse clock gating state
Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: William Lewis <minutemaidpark@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:07 -05:00
Huang Rui
6cb2d4e4f3 drm/amdgpu: introduce an interface to get clock gating status dynamically
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:06 -05:00
Xiangliang Yu
c8394f38fa drm/amdgpu: remove detect_hw_virtualization interface
Call detection function driectly, so remove the interface.

V2: ci and si also need to call the detect function.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:05 -05:00
Xiangliang Yu
91caa08137 drm/amdgpu/vi: move virtualization detection forward
Move the detection forward into vi_set_ip_blocks function, then
add ip blocks virtualization need if device is VF.

V2: add ip blocks according to asic type.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:05 -05:00
Xiangliang Yu
5a5099cbf4 drm/amdgpu/virt: rename fieldes of virtualization structure
Use acronym to rename fields to make easy to spell out.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:04 -05:00
Xiangliang Yu
4e638ae9c1 drm/amdgpu/gfx8: add support kernel interface queue(KIQ)
KIQ is queue-memory based initialization method: setup KIQ queue
firstly, then send command to KIQ to setup other queues, without
accessing registers.

For virtualization, need KIQ to access virtual function registers
when running on guest mode.

V2: use amdgpu_bo_create/free_kernel to allocate BO.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:03 -05:00
Amber Lin
b64a18c502 drm/amdgpu: PCI I/O bar can be disabled
PCI I/O bar can be disabled in VBIOS to save the resource. It is often
disabled in large aperture VBIOS. Don't call it an error.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:03 -05:00
Rex Zhu
a5b580e119 drm/amd/powerplay: change function name to make code more readable
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:02 -05:00
Rex Zhu
63b55943b3 drm/amd/powerplay: refine smumgr code
1. delete asic_smum_init functions, export asic private functions
   to smumgr directly, make code more readable.
2. create asic private data in asic_init_func.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:01 -05:00
Rex Zhu
a0aa70463e drm/amd/powerplay: fix memory leak in smu7_hwmgr
add pp_smu7_thermal_fini function to free related
data when smu7_hwmgr_fini.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:01 -05:00
Rex Zhu
cd576e63d2 drm/amd/powerplay: fix memory leak in cz_hwmgr.c
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:00 -05:00
Rex Zhu
4c283acf69 drm/amd/powerplay: not free hwmgr/smumgr in asic private functions.
struct smumgr/hwmgr will be freed on amd_powerplay_destory

and if we free them in one of asic private functions, other private
date may not be freed. for example: power state and power table
in hwmgr.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:59 -05:00
Rex Zhu
6f4dc24a88 drm/amd/powerplay: not use module parameter in powerplay.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:59 -05:00
Rex Zhu
1c86380248 drm/amd/powerplay: refine powerplay interface.
v2: add pp_check function to check pp_instance
   valid.

1. powerplay export two new interface to amdgpu,
   amd_powerplay_create/amd_powerplay_destroy.
2. create pp_instance/smumgr/hwmgr/eventmgr in
   early init, destroy them when lata_fini.
3. in sw_init, create and init asic private smumgr
   data, and free them when sw_fini.
4. in hw_init, create and init asic private hwmgr
   data, and free them when hw_fini.
5. export powerplay state: PP_DPM_DISABLED.
   when user disabled powerplay or hwmgr/eventmgr
   init failed, powerplay return this state to amdgpu.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:58 -05:00
Rex Zhu
ae6a58e409 drm/amdgpu: use same enter/exit safe mode for gfx_8.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:57 -05:00
Rex Zhu
3bd5897964 drm/amd/powerplay: add profiling mode in dpm level
In some case, App need to run under max stable clock.
so export profiling mode: GFX CG was disabled.
and user can select the max stable clock of the device.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:57 -05:00
Rex Zhu
9d273495e6 drm/amdgpu: delete dead definitions of dpm_ip_funcs
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:56 -05:00
Rex Zhu
b9bc58140e drm/amdgpu: delete dead module parameter:amdgpu_powerplay.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:55 -05:00
Rex Zhu
23c8ea921d drm/amd/powerplay: fix issue can't load another smu firmware.
need to release failed smu firmware before load another
firmware.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:55 -05:00
Rex Zhu
bcb5487bce drm/amd/powerplay: refine code in cz_smumgr.c
cz_smu_init will be called in sw_init.
so it should not touch other blocks's
firmware as they were not ready.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:54 -05:00
Rex Zhu
0d12570aaf drm/amd/powerplay: fix bug dpm level unexpectly be reset to auto.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:53 -05:00
Rex Zhu
e5d03ac2b8 drm/amd/powerplay: Unify dpm level defines
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:53 -05:00
Rex Zhu
db7da7aa3a drm/amd/powerplay: delete dpm code for Cz/St.
The powerplay implementation has been the default for a
while now.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:52 -05:00
Huang Rui
634a24d8af drm/amd/powerplay: update all printk to pr_* on smumgr
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:51 -05:00
Huang Rui
b5c11b8e37 drm/amd/powerplay: update all printk to pr_* on hwmgr
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:50 -05:00
Huang Rui
19946cfd37 drm/amd/powerplay: update all printk to pr_* on eventmgr
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:50 -05:00
Huang Rui
0fb829def6 drm/amd/powerplay: refine print message for amd_powerplay
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:49 -05:00
Huang Rui
7bd55429fd drm/amd/powerplay: reshuffle headers to make pr_fmt macro before <linux/xxx.h>
This patch reshuffles headers to define pr_fmt before <linux/xxx.h>.
It can avoid pr_fmt redefine warnning from linux/xxx.h like below:

CC [M]  /home/ray/gpu/BUILD/x86_64/linux/drivers/gpu/drm/amd/amdgpu//../powerplay/amd_powerplay.o
/home/ray/gpu/BUILD/x86_64/linux/drivers/gpu/drm/amd/amdgpu//../powerplay/amd_powerplay.c:24:0: warning: "pr_fmt" redefined
 #define pr_fmt(fmt) "[powerplay] " fmt
 ^
In file included from include/linux/kernel.h:13:0,
                 from include/linux/list.h:8,
                 from include/linux/agp_backend.h:33,

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:48 -05:00
Huang Rui
7739b1e7e1 drm/amd/powerplay: add prefix for all powerplay pr_* prints
Powerplay will use them instead of raw printk, and we can dynamic
change the debug level with it.

The prefix is like below:

[  xxx.xxxxxx] amdgpu: [powerplay] ...

Suggested-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Cc: Arindam Nath <Arindam.Nath@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:48 -05:00