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drm/amd/powerplay: add profiling mode in dpm level

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In some case, App need to run under max stable clock.
so export profiling mode: GFX CG was disabled.
and user can select the max stable clock of the device.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2016-12-23 15:24:37 +08:00 committed by Alex Deucher
parent 9d273495e6
commit 3bd5897964
5 changed files with 24 additions and 4 deletions
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17
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
View File

@ -124,6 +124,7 @@ static ssize_t amdgpu_get_dpm_forced_performance_level(struct device *dev,
(level & AMD_DPM_FORCED_LEVEL_LOW) ? "low" :
(level & AMD_DPM_FORCED_LEVEL_HIGH) ? "high" :
(level & AMD_DPM_FORCED_LEVEL_MANUAL) ? "manual" :
(level & AMD_DPM_FORCED_LEVEL_PROFILING) ? "profiling" :
"unknown"));
}
@ -135,6 +136,7 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev,
struct drm_device *ddev = dev_get_drvdata(dev);
struct amdgpu_device *adev = ddev->dev_private;
enum amd_dpm_forced_level level;
enum amd_dpm_forced_level current_level;
int ret = 0;
/* Can't force performance level when the card is off */
@ -142,6 +144,8 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev,
(ddev->switch_power_state != DRM_SWITCH_POWER_ON))
return -EINVAL;
current_level = amdgpu_dpm_get_performance_level(adev);
if (strncmp("low", buf, strlen("low")) == 0) {
level = AMD_DPM_FORCED_LEVEL_LOW;
} else if (strncmp("high", buf, strlen("high")) == 0) {
@ -150,11 +154,24 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev,
level = AMD_DPM_FORCED_LEVEL_AUTO;
} else if (strncmp("manual", buf, strlen("manual")) == 0) {
level = AMD_DPM_FORCED_LEVEL_MANUAL;
} else if (strncmp("profile", buf, strlen("profile")) == 0) {
level = AMD_DPM_FORCED_LEVEL_PROFILING;
} else {
count = -EINVAL;
goto fail;
}
if (current_level == level)
return 0;
if (level == AMD_DPM_FORCED_LEVEL_PROFILING)
amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_GFX,
AMD_CG_STATE_UNGATE);
else if (level != AMD_DPM_FORCED_LEVEL_PROFILING &&
current_level == AMD_DPM_FORCED_LEVEL_PROFILING)
amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_GFX,
AMD_CG_STATE_GATE);
if (adev->pp_enabled)
amdgpu_dpm_force_performance_level(adev, level);
else {

4
drivers/gpu/drm/amd/amdgpu/ci_dpm.c
View File

@ -6571,8 +6571,8 @@ static int ci_dpm_force_clock_level(struct amdgpu_device *adev,
{
struct ci_power_info *pi = ci_get_pi(adev);
if (adev->pm.dpm.forced_level
!= AMD_DPM_FORCED_LEVEL_MANUAL)
if (!(adev->pm.dpm.forced_level &
(AMD_DPM_FORCED_LEVEL_MANUAL | AMD_DPM_FORCED_LEVEL_PROFILING)))
return -EINVAL;
switch (type) {

1
drivers/gpu/drm/amd/include/amd_shared.h
View File

@ -85,6 +85,7 @@ enum amd_dpm_forced_level {
AMD_DPM_FORCED_LEVEL_MANUAL = 0x2,
AMD_DPM_FORCED_LEVEL_LOW = 0x4,
AMD_DPM_FORCED_LEVEL_HIGH = 0x8,
AMD_DPM_FORCED_LEVEL_PROFILING = 0x10,
};
enum amd_powergating_state {

3
drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
View File

@ -1644,7 +1644,8 @@ static int cz_get_dal_power_level(struct pp_hwmgr *hwmgr,
static int cz_force_clock_level(struct pp_hwmgr *hwmgr,
enum pp_clock_type type, uint32_t mask)
{
if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL)
if (!(hwmgr->dpm_level &
(AMD_DPM_FORCED_LEVEL_MANUAL | AMD_DPM_FORCED_LEVEL_PROFILING)))
return -EINVAL;
switch (type) {

3
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
View File

@ -4031,7 +4031,8 @@ static int smu7_force_clock_level(struct pp_hwmgr *hwmgr,
{
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL)
if (!(hwmgr->dpm_level &
(AMD_DPM_FORCED_LEVEL_MANUAL | AMD_DPM_FORCED_LEVEL_PROFILING)))
return -EINVAL;
switch (type) {