Commit Graph

2671 Commits

Author SHA1 Message Date
Dave Airlie
acc5ddd972 Merge tag 'drm-misc-next-2016-12-08' of git://anongit.freedesktop.org/git/drm-misc into drm-next
Another pile of misc stuff, final one for 4.10. If there's some serious
bugfix still I'll send you a pull for drm-misc-next-fixes (like we do with
intel), otherwise this is it and next pull next year for 4.11.

Most interesting bits are probably Chris' fb helper fixes against mst
hotplug oopses.

* tag 'drm-misc-next-2016-12-08' of git://anongit.freedesktop.org/git/drm-misc: (22 commits)
  drm: Take ownership of the dmabuf->obj when exporting
  drm: Allow CAP_PRIME on !MODESET
  drm/fence: add drm_crtc_create_fence()
  drm/bridge: analogix: Don't return -EINVAL when panel doesn't support PSR
  drm/atomic: doc: remove old comment about nonblocking commits
  drm: Don't block the kworker waiting for mode_config.mutex in output_poll()
  drm: Return -ENOTSUPP when called for KMS cap with a non-KMS driver
  drm/amdgpu: don't add files at control minor debugfs directory
  drm: allow changing DPMS mode
  drm/qxl: fix use of uninitialized variable
  drm/qxl: Don't register debugfs for control minors
  drm/radeon: don't add files at control minor debugfs directory
  drm/vmwgfx: Switch to mode_cmd2
  drm/vgem: Use ww_mutex_(un)lock even with a NULL context
  drm: Make the connector .detect() callback optional
  drm/bridge: tc358767: don't warn if display side ASSR enable fails
  drm: Initialise drm_mm.head_node.allocated
  drm: Fix locking cargo-cult in encoder/plane init/cleanup
  drm/doc: Fix indenting in drm_modeset_lock.c comment
  drm: Protect fb_helper list manipulation with a mutex
  ...
2016-12-09 12:29:10 +10:00
Michel Dänzer
32859f7335 drm/amdgpu/dce6: Set MASTER_UPDATE_MODE to 0 in resume_mc_access as well
Looks like this was missed when dce_v6_0.c was added.

Fixes: e2cdf640cb ("drm/amdgpu: add display controller implementation for si v10")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-08 14:17:12 -05:00
Alex Deucher
7fe285769c drm/amdgpu: use pin rather than pin_restricted in a few cases
We don't require a resticted pinning in these cases, so just
use plain pin.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-08 14:12:19 -05:00
Arindam Nath
d2939bc780 drm/amd/powerplay: use pr_debug to print function not implemented message
For CZ, some function pointers like display_configuration_changed
are not set. So when HW manager tries to configure display, we
end up with messages like

"[ powerplay ] this function not implement!"

in the logs. This message is informational, but lacks details
on which function is not implemented and why.

Rather than using KERN_INFO to print the message everytime the
system boots, we rather use pr_debug so that it is only printed
when debug prints are enabled at runtime.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-08 14:12:18 -05:00
Tom St Denis
cc3f5b8df9 drm/amd/amdgpu: Add gpr reading for GFX v7
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-08 14:12:18 -05:00
Tom St Denis
34e646f444 drm/amd/amdgpu: Add gpr reading for GFX v6
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-08 14:12:17 -05:00
Tom St Denis
c5a60ce81b drm/amd/amdgpu: Add debugfs support for reading GPRs (v2)
Implemented for SGPRs for GFX v8 initially.

(v2) cleanup minor whitespace and remove sanity check and
     addressing is in dwords not bytes

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-08 14:12:17 -05:00
Evan Quan
40ee5888fa drm/amd/amdgpu: export vbios information (v2)
Allows userspace components to fetch information
from the vbios image.

v2: agd: fix warning

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian Koenig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-08 14:12:09 -05:00
Evan Quan
a9f5db9ca7 drm/amd/amdgpu: stored bios_size
It's necessary if we want to export vbios image out.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian Koenig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-08 14:09:05 -05:00
Alex Deucher
faefba95c9 drm/amdgpu: just suspend the hw on pci shutdown
We can't just reuse pci_remove as there may be userspace still
doing things.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98638
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97980
Reviewed-by: Christian König <christian.koenig@amd.com>
Reported-and-tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-07 11:17:21 -05:00
Huang Rui
ff9d646017 drm/amdgpu: update golden setting of tonga
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:41 -05:00
Alex Deucher
5a23f27205 drm/amdgpu/si: load the proper firmware on 0x87 oland boards
New variant.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:40 -05:00
Alex Deucher
ce66cb1e9c drm/amdgpu: add additional pci revision to dpm workaround
New variant.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:40 -05:00
Xiangliang Yu
e9efaaa047 drm/amd/powerplay: Fix potential NULL pointer issue
If doesn't enable dpm, the powerplay will not allocate memory for
hw management. So, hw_init_power_state_table function will reference
NULL pointer when resetting.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:38 -05:00
Xiangliang Yu
84f3f05b44 drm/amdgpu: Don't touch GFX hw during HW fini
For SR-IOV client, driver shouldn't touch the GFX hw during HW
fini, otherwise, gfx will fail to start after rebooting guest os.

Signed-off-by: shaoyunl <Shaoyun.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:37 -05:00
Xiangliang Yu
c7fac7dc1d drm/amd/powerplay: Adjust the position of data size initial
Put the initial part close to memory allocate, it will make code
more clear.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:36 -05:00
Xiangliang Yu
e224e4f17d drm/amd/powerplay: Ignore smu buffer usage
SMU buffer is used for power feature, but for virtualization, the
power is controlled by hypervisor. Ignore it.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:36 -05:00
Xiangliang Yu
ed91dd49ba drm/amd/powerplay: cut digest part
For virtualization, FW size need to cut its digest part.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:35 -05:00
Xiangliang Yu
aeab203205 drm/amdgpu: drop redundant vi_mqd define
Vi_structs.h has defined vi_mqd, drop redundant vi_mqd define.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:34 -05:00
Flora Cui
47e50d5c0d drm/amdgpu: fix gtt available page num accounting
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:34 -05:00
Hawking Zhang
10e2ca346b drm/amd/powerplay: bypass fan table setup if no fan connected
If vBIOS noFan bit is set, the fan table parameters in thermal controller
will not get initialized. The driver should avoid to use these uninitialized
parameter to do calculation. Otherwise, it may trigger divide 0 error.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:33 -05:00
Alex Xie
1cd99a8d97 drm/amd/amdgpu: validate the shadow BO.
Fixes a rare NULL pointer dereference in amdgpu_ttm_bind.

The issue was found by Nicolai Haehnle.
The patch was tested by Nicolai Haehnle.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:32 -05:00
Rex Zhu
f5f857f45d drm/amd/powerplay: disable cg pg task when pp uninitialize.
fix bug on uvd pg enabled, when reboot vm in pass through case,
we need to notify smu power up uvd/vce if they were power down.
otherwise, the vbios post will fail.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:32 -05:00
Rex Zhu
8201a67a49 drm/amdgpu: no need to ungate uvd/vce clock when fini.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:31 -05:00
Michel Dänzer
7c83d7abc9 drm/amdgpu: Only update the CUR_SIZE register when necessary
Normally only necessary when the cursor size changes.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:28 -05:00
Michel Dänzer
8b02cde994 drm/amdgpu: Also call cursor_move_locked when the cursor size changes
The cursor size also affects the register programming.

Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:28 -05:00
Michel Dänzer
8e57ec613d drm/amdgpu: Store CRTC relative amdgpu_crtc->cursor_x/y values
We were storing viewport relative coordinates. However, crtc_cursor_set2
and cursor_reset pass amdgpu_crtc->cursor_x/y as the x/y parameters of
cursor_move_locked, which would break if the CRTC isn't located at
(0, 0).

Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:27 -05:00
Arindam Nath
dd31ae9ac9 drm/amd/amdgpu: enable GUI idle INT after enabling CGCG
GUI idle interrupts should be enabled only after we
have enabled coarse grain clock gating (CGCG). This
prevents GFX engine generating idle interrupt even
though CGCG is not completely enabled.

Most of the time this goes un-noticed, but on some
Stoney ASICs this results in GFX engine hang after
system resumes from suspend. The issue is not
particular to Stoney though and could have occured
on any ASIC. The patch fixes this issue.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reported-by: Sunil Uttarwar <Sunil.Uttarwar1@amd.com>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:26 -05:00
Maruthi Srinivas Bayyavarapu
ecc2cf7cc8 drm/amdgpu: enable VCE clockgating in Polaris-10/11
VCE clocks are set to be disabled, when not in use.

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:26 -05:00
Rex Zhu
ddbc2594cc drm/amdgpu: fix CI bug uvd status not true in debugfs.
can't get uvd's state by uvd_enabled. uvd_enabled
is used for request higher mclk.
in multi-display case, mclk has been in highest clock,
no matter uvd's state changed, uvd_enabled will not
be changed.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:25 -05:00
Xiangliang Yu
188a301fd7 drm/amdgpu: remove error message when loading driver
Forget to check UCODE_ID_STORAGE case and will cause to print error
message when loading driver, correct it.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:24 -05:00
Xiangliang Yu
7047391fab drm/amd/powerplay: fix firmware loading failure
For virtualization, firmware loading need the firmware version info,
and will load the right firmware. So, transfer fw_version to toc.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:24 -05:00
Rex Zhu
3c3a7e616c drm/amdgpu: fix bug mclk can't change on Polaris
the root cause is we gate the clock to uvd vcpu.
mclk's change should need the response from uvd if
it is power on.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:23 -05:00
Rex Zhu
805b3ba87d drm/amdgpu: refine uvd 6.0 clock gate feature.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:22 -05:00
Alex Deucher
ad3b961423 drm/amdgpu/gfx8: move eop programming per queue
It's per queue not per pipe.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:22 -05:00
Alex Deucher
70b5c5aae5 Revert "drm/amdgpu: use the kernel zone memory size as the max remote memory in amdgpu"
This reverts commit a693e050ed.

This breaks on systems with huge amounts of system memory as we do not have
enough vram to store the page tables.  Additionally, this is less of an issue
with the recent gtt manager changes.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:21 -05:00
Daniel Vetter
75e75cbd55 Merge remote-tracking branch 'airlied/drm-next' into drm-misc-next
Backmerge v4.9-rc8 to get at

commit e94bd1736f
Author: Michel Dänzer <michel.daenzer@amd.com>
Date:   Wed Nov 30 17:30:01 2016 +0900

drm: Don't call drm_for_each_crtc with a non-KMS driver

so I can apply Michel's follow-up patch.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2016-12-06 10:26:48 +01:00
Nicolai Stange
58309befa8 drm/amdgpu: don't add files at control minor debugfs directory
Since commit 8a357d1004 ("drm: Nerf DRM_CONTROL nodes"), a
struct drm_device's ->control member is always NULL.

In the case of CONFIG_DEBUG_FS=y, amdgpu_debugfs_add_files() accesses
->control->debugfs_root though. This results in a NULL pointer
dereference.

Fix this by omitting the drm_debugfs_create_files() call for the
control minor debugfs directory which is now non-existent anyway.

Fixes: 8a357d1004 ("drm: Nerf DRM_CONTROL nodes")
Signed-off-by: Nicolai Stange <nicstange@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98915
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161205203022.11671-1-nicstange@gmail.com
2016-12-06 10:03:28 +01:00
Dave Airlie
17f1dfd01c Merge branch 'drm-next-4.10' of git://people.freedesktop.org/~agd5f/linux into drm-next
- lots of code cleanup
- lots of bug fixes
- expose rpm based fan info via hwmon
- lots of clock and powergating fixes
- SI register header cleanup and conversion to common format used by newer asics

* 'drm-next-4.10' of git://people.freedesktop.org/~agd5f/linux: (54 commits)
  drm/amdgpu: drop is_display_hung from display funcs
  drm/amdgpu/uvd: reduce IB parsing overhead on UVD5+ (v2)
  drm/amdgpu/uvd: consolidate code for fetching addr from ctx
  drm/amdgpu: Disable DPM in virtualization
  drm/amdgpu: use AMDGPU_GEM_CREATE_VRAM_CLEARED for VM PD/PTs (v2)
  drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED handling (v2)
  drm/amdgpu: fix error handling in amdgpu_bo_create_restricted
  drm/amdgpu: fix amdgpu_fill_buffer (v2)
  drm/amdgpu: remove amdgpu_irq_get_delayed
  amdgpu: Wrap dev_err() calls on vm faults with printk_ratelimit()
  amdgpu: Use dev_err() over vanilla printk() in vm_decode_fault()
  drm/amd/amdgpu: port of DCE v6 to new headers (v3)
  drm/amdgpu: cleanup unused iterator members for sdma v2.4
  drm/amdgpu: cleanup unused iterator members for sdma v3
  drm/amdgpu:impl vgt_flush for VI(V5)
  drm/amdgpu: enable uvd mgcg for Fiji.
  drm/amdgpu: refine cz uvd clock gate logic.
  drm/amdgpu: change log level to KERN_INFO in ci_dpm.c
  drm/amdgpu: always un-gate UVD REGS path.
  drm/amdgpu/sdma: fix typo in packet setup
  ...
2016-12-06 11:01:33 +10:00
Dave Airlie
f03ee46be9 Linux 4.9-rc8
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Backmerge tag 'v4.9-rc8' into drm-next

Linux 4.9-rc8

Daniel requested this so we could apply some follow on fixes cleanly to -next.
2016-12-05 17:11:48 +10:00
Al Viro
450630975d don't open-code file_inode()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2016-12-04 18:29:28 -05:00
Laurent Pinchart
949f08862d drm: Make the connector .detect() callback optional
Many drivers (21 to be exact) create connectors that are always
connected (for instance to an LVDS or DSI panel). Instead of forcing
them to implement a dummy .detect() handler, make the callback optional
and consider the connector as always connected in that case.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Vincent Abriou <vincent.abriou@st.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[seanpaul fixed small conflict in rcar-du/rcar_du_lvdscon.c]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
2016-12-01 10:05:53 -05:00
Dave Airlie
6320745596 drm/virtio: fix busid in a different way, allocate more vbufs.
drm/qxl: various bugfixes and cleanups,
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Merge tag 'drm-qemu-20161121' of git://git.kraxel.org/linux into drm-next

drm/virtio: fix busid in a different way, allocate more vbufs.
drm/qxl: various bugfixes and cleanups,

* tag 'drm-qemu-20161121' of git://git.kraxel.org/linux: (224 commits)
  drm/virtio: allocate some extra bufs
  qxl: Allow resolution which are not multiple of 8
  qxl: Don't notify userspace when monitors config is unchanged
  qxl: Remove qxl_bo_init() return value
  qxl: Call qxl_gem_{init, fini}
  qxl: Add missing '\n' to qxl_io_log() call
  qxl: Remove unused prototype
  qxl: Mark some internal functions as static
  Revert "drm: virtio: reinstate drm_virtio_set_busid()"
  drm/virtio: fix busid regression
  drm: re-export drm_dev_set_unique
  Linux 4.9-rc5
  gp8psk: Fix DVB frontend attach
  gp8psk: fix gp8psk_usb_in_op() logic
  dvb-usb: move data_mutex to struct dvb_usb_device
  iio: maxim_thermocouple: detect invalid storage size in read()
  aoe: fix crash in page count manipulation
  lightnvm: invalid offset calculation for lba_shift
  Kbuild: enable -Wmaybe-uninitialized warnings by default
  pcmcia: fix return value of soc_pcmcia_regulator_set
  ...
2016-11-30 14:18:51 +10:00
Peter Wu
7ac33e47d5 drm/amdgpu: fix check for port PM availability
The ATPX method does not always exist on the dGPU, it may be located at
the iGPU. The parent device of the iGPU is the root port for which
bridge_d3 is false. This accidentally enables the legacy PM method which
conflicts with port PM and prevented the dGPU from powering on.

Fixes: 1db4496f16 ("drm/amdgpu: fix power state when port pm is unavailable")

Reported-and-tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Peter Wu <peter@lekensteyn.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: <stable@vger.kernel.org> # 4.8+
2016-11-29 09:23:39 -05:00
Rex Zhu
b64268d8a3 drm/amd/powerplay: initialize the soft_regs offset in struct smu7_hwmgr
This could lead to mclk dpm problems on some boards.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Ack-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-28 18:22:37 -05:00
Alex Deucher
e7b8243d3e drm/amdgpu: drop is_display_hung from display funcs
Not used.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:13:21 -05:00
Alex Deucher
042eb91060 drm/amdgpu/uvd: reduce IB parsing overhead on UVD5+ (v2)
UVD 5 and newer do not have the same placement limitations
as older chips, so skip the first pass since it's just
overhead on chips where we don't have to force placement.

v2: fix inverted logic

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:47 -05:00
Alex Deucher
80983e4df7 drm/amdgpu/uvd: consolidate code for fetching addr from ctx
Same code duplicated in both functions.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:47 -05:00
Trigger Huang
7b1e8cad1f drm/amdgpu: Disable DPM in virtualization
This patch is used for virtualization support. In virtualization,
only SMU manager is needed, DPM should be disabled. This is a
use case for commit 2f9346b6f984
("drm/amdgpu/powerplay: pp module only enable smu when dpm disabled.")

Signed-off-by: Trigger Huang <trigger.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:46 -05:00
Christian König
617859e076 drm/amdgpu: use AMDGPU_GEM_CREATE_VRAM_CLEARED for VM PD/PTs (v2)
Doesn't make much sense to have the same functionality twice.

v2: rebase on dma_fence renaming

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:46 -05:00
Christian König
f45dc74c93 drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED handling (v2)
Drop this whole reserve/unreserve dance, just lock the
reservation object manually when creating the BO.

v2: rebase on dma_fence renaming

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:45 -05:00
Christian König
c3af1258a7 drm/amdgpu: fix error handling in amdgpu_bo_create_restricted
Manually checking why a function could fail is not a good idea
if you can just check the functions return code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:44 -05:00
Christian König
f29224a619 drm/amdgpu: fix amdgpu_fill_buffer (v2)
The mem start is relative to the domain in the address space, so this
worked only when VRAM was mapped at offset 0.

It also didn't handled multiple drm_mm_nodes for split VRAM.

v2: rebase on dma_fence renaming

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:44 -05:00
Christian König
3b1c9036a6 drm/amdgpu: remove amdgpu_irq_get_delayed
Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:43 -05:00
Edward O'Callaghan
01615881ff amdgpu: Wrap dev_err() calls on vm faults with printk_ratelimit()
It can be the case that upon GPU page faults we start trashing
the logs, and so let us ratelimit here to avoid that.

V2. Fix issue where calling dev_err_ratelimited separately for
    each line means that some lines corresponding to a single
    VM fault may or may not appear depending on the rate.
    - Michel Dänzer.

Reviewed-by: Christian König <christian.koenig@amd.com> (v1)
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:43 -05:00
Edward O'Callaghan
b01dd025ca amdgpu: Use dev_err() over vanilla printk() in vm_decode_fault()
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:42 -05:00
Tom St Denis
b00861b98b drm/amd/amdgpu: port of DCE v6 to new headers (v3)
Port of SI DCE v6 over to new AMDGPU headers.  Tested on a
Tahiti with GNOME through various hot plugs/rotations/sizes/fullscreen/windowed and
staging drm/xf86-video-amdgpu.

(v2) Re-factored to remove formatting changes to si_enums.h
     as well rename various defines.
(v3) Rebase on upstream

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:42 -05:00
Huang Rui
99e3820a6b drm/amdgpu: cleanup unused iterator members for sdma v2.4
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:41 -05:00
Huang Rui
4bc07289f0 drm/amdgpu: cleanup unused iterator members for sdma v3
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:41 -05:00
Monk Liu
45682886bc drm/amdgpu:impl vgt_flush for VI(V5)
when shadowing enabled, tesselation app will trigger
vm fault because below three tesselation registers:

VGT_TF_RING_SIZE__CI__VI,
VGT_HS_OFFCHIP_PARAM__CI__VI,
VGT_TF_MEMORY_BASE__CI__VI,

need to be programed after vgt-flush.

Tesselation picture vm fault disappeared after vgt-flush
introduced.

v2:implement vgt-flush for CI & SI.
v3:move vgt flush inside of cntx_cntrl
v4:count vgt flush in frame_size
v5:squash in typo fix

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:40 -05:00
Rex Zhu
79abf1add6 drm/amdgpu: enable uvd mgcg for Fiji.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:39 -05:00
Rex Zhu
b02d4081a5 drm/amdgpu: refine cz uvd clock gate logic.
sw clockgate was used on uvd6.0.
when uvd is idle, we gate the uvd clock.
when decode, we ungate the uvd clock.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:39 -05:00
Peter Wu
1db4496f16 drm/amdgpu: fix power state when port pm is unavailable
When PCIe port PM is not enabled (system BIOS is pre-2015 or the
pcie_port_pm=off parameter is set), legacy ATPX PM should still be
marked as supported. Otherwise the GPU can fail to power on after
runtime suspend. This affected a Dell Inspiron 5548.

Ideally the BIOS date in the PCI core is lowered to 2013 (the first year
where hybrid graphics platforms using power resources was introduced),
but that seems more risky at this point and would not solve the
pcie_port_pm=off issue.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98505
Reported-and-tested-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Peter Wu <peter@lekensteyn.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: <stable@vger.kernel.org> # 4.8+
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 13:57:14 -05:00
Rex Zhu
da7800a88c drm/amd/powerplay: avoid out of bounds access on array ps.
check array index first and then visit the array.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-16 14:26:17 -05:00
Daniel Vetter
2d1e331fa9 drm/irq: Unexport drm_vblank_on/off
Only remaining use was in amdgpu, and trivial to convert over to
drm_crtc_vblank_* variants.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161114090255.31595-5-daniel.vetter@ffwll.ch
2016-11-15 23:33:48 +01:00
Daniel Vetter
778e1a5419 drm/amdgpu: Use drm_crtc_vblank_on/off for dce6
This old code pattern was reintroduced in

Author: Ken Wang <Qingqing.Wang@amd.com>
Date:   Tue Jan 19 14:03:24 2016 +0800

    drm/amdgpu: add display controller implementation for si v10

Realign it with later display code. Tsk, tsk for massive copypasting
;-)

Cc: Christian König <christian.koenig@amd.com>
Cc: Ken Wang <Qingqing.Wang@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com> for the whole series.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161114090255.31595-1-daniel.vetter@ffwll.ch
2016-11-15 22:54:40 +01:00
Monk Liu
1da2c326e4 drm/amdgpu:fix vpost_needed routine
1,cleanup description/comments
2,for FIJI & passthrough, force post when smc fw version below 22.15
3,for other cases, follow regular rules

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-15 14:06:07 -05:00
Alex Deucher
cb434658a8 drm/amdgpu/powerplay: drop a redundant NULL check
Left over from an earlier rev of the patch.

Acked-by: Colin Ian King <colin.king@canonical.com>
Cc: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Colin King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-15 14:05:52 -05:00
Rex Zhu
58a6a7dd19 drm/amdgpu: change log level to KERN_INFO in ci_dpm.c
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-15 12:36:53 -05:00
Rex Zhu
953618cf1c drm/amdgpu: always un-gate UVD REGS path.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-15 12:36:36 -05:00
Alex Deucher
6bf3f9c3cb drm/amdgpu/sdma: fix typo in packet setup
Use the correct define.  No functional change as both
defines are equivalent.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-15 11:36:45 -05:00
Stefan Christ
ea4ffffea3 drm/amdgpu: use DRM_FB_HELPER_DEFAULT_OPS for fb_ops
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Stefan Christ <contact@stefanchrist.eu>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1479078208-25221-4-git-send-email-contact@stefanchrist.eu
2016-11-14 07:54:04 +01:00
Eric Engestrom
b3c11ac267 drm: move allocation out of drm_get_format_name()
The function's behaviour was changed in 90844f0004, without changing
its signature, causing people to keep using it the old way without
realising they were now leaking memory.
Rob Clark also noticed it was also allocating GFP_KERNEL memory in
atomic contexts, breaking them.

Instead of having to allocate GFP_ATOMIC memory and fixing the callers
to make them cleanup the memory afterwards, let's change the function's
signature by having the caller take care of the memory and passing it to
the function.
The new parameter is a single-field struct in order to enforce the size
of its buffer and help callers to correctly manage their memory.

Fixes: 90844f0004 ("drm: make drm_get_format_name thread-safe")
Cc: Rob Clark <robdclark@gmail.com>
Cc: Christian König <christian.koenig@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Sinclair Yeh <syeh@vmware.com> (vmwgfx)
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161112011309.9799-1-eric@engestrom.ch
2016-11-12 14:19:38 +01:00
Tom St Denis
7251826971 drm/amd/amdgpu: Port GMC v6 driver to new SI headers (v2)
Port the GMC v6 driver over to the new SI headers.

Tested with a Tahiti SI ASIC.

(v2) Fixed a couple of typos (in commented code) and moved
     defines to si_enums.h

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:14 -05:00
Rex Zhu
cf54d6d9f8 drm/amd/powerplay: add mask bit for fan control mode.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:13 -05:00
Christian König
e9472a0771 drm/amdgpu: remove extra placement for AMDGPU_GEM_CREATE_NO_CPU_ACCESS
This only has the effect of scanning the invisible range twice
since the topdown flag is given anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: JimQu <Jim.Qu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:12 -05:00
Christian König
5befb22a4d drm/amdgpu: disable the VRAM manager on special placements v2
This disables the VRAM manager when a special placement is requested, otherwise
we play ping/pong with the buffers on every command submission.

v2: only check lpfn

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: JimQu <Jim.Qu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:12 -05:00
Rex Zhu
809a6a62b6 drm/amdgpu: refine uvd 5.0 clock gate feature.
1. fix uvd cg status not correct.
2. fix uvd pg can't work on tonga.
3. enable uvd mgcg.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:11 -05:00
Rex Zhu
68260f340e drm/amd/powerplay: partial revert commit 01b0e7fb1.
when uvd is idle, we gate uvd clock.
and uvd is busy, we ungate uvd clock.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:11 -05:00
Rex Zhu
0401eb403d drm/amdgpu: not set bypass mode for uvd5.0/uvd6.0
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:10 -05:00
Tom St Denis
3ee73ed854 drm/amd/amdgpu: add wave reader to gfx v6
Add support for the debugfs wave reader.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:09 -05:00
Tom St Denis
25069e0696 drm/amd/amdgpu: port gfx6 over to new si headers (v2)
This changes the gfx v6 driver to use the new AMDGPU style
SI headers.  Also fixes a variety of coding style issues, white
space issues, and uses WREG32_FIELD in a few places where
appropriate.

Tested with a Tahiti 0x679A.

v2: Squash in typo fix patch

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:09 -05:00
Tom St Denis
5e2e211995 drm/amd/amdgpu: add SI defines/registers
Add missing gca MMIO registers and defines necessary for the
next patch which re-works a lot of gfx v6 to use the new SI
headers.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:08 -05:00
Tom St Denis
de2bdb3dcf drm/amd/amdgpu: Introduction of SI registers (v2)
This introduces the SI registers in the amdgpu
driver style.

v2: squash duplicates fix

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:07 -05:00
Ravikant B Sharma
3f12325ab8 drm/amd/amdgpu : Fix NULL pointer comparison
Replace direct comparisons to NULL i.e.
'x == NULL' with '!x'. As per coding standard.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ravikant B Sharma <ravikant.s2@samsung.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:07 -05:00
Tom St Denis
bc24fbe9df drm/amd/amdgpu: Clean up wave gfx8 helper
De-numberify indirect register access for gfx v8.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:06 -05:00
Tom St Denis
4098e6cd61 drm/amd/amdgpu: Clean up wave gfx7 helper
De-numberify indirect register access for gfx v7.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:06 -05:00
jimqu
526bae372c drm/amdgpu: fix logic error for checking amdgpu_vram_page_split
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: JimQu <Jim.Qu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:05 -05:00
Trigger Huang
061995540d drm/amd/powerplay:Tonga not to start SMC if SRIOV
This patch is used for virtualization support. In virtualization case,
Tonga SMC should not be started and SMU firmware should not be loaded
if in SRIOV environment. The same operation will be applied on FIJI in
other patch.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Trigger Huang <trigger.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:04 -05:00
Rex Zhu
aa4747c00a drm/amdgpu: refine uvd_4.2 clock gate sequence.
1. partial revert commit 91db308d6e96.
   not set uvd bypass mode.
2. enable uvd cg before initialize uvd.
3. set uvd clock to default value 100MHz.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:04 -05:00
Rex Zhu
dc2f8a9aa9 drm/amd/powerplay: delete duplicate code in smu7_hwmgr.c
Voltage Controller have been enabled (SMC message)
before ULV enablement.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:03 -05:00
Rex Zhu
4c696ecf4f drm/amd/powerplay: enable voltage control by default for dgpu.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:03 -05:00
Rex Zhu
ce4286bfa7 drm/amd/powerplay: fix code style
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:02 -05:00
Rex Zhu
3ca67300ac drm/amdgpu: delete duplicate module parameter.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:01 -05:00
Rex Zhu
801caaf663 drm/amdgpu: use mask bit for deep sleep feature on dpm.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:01 -05:00
Rex Zhu
55ff548378 drm/amd/powerplay: use mask bit for deepsleep/power tune feature.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:00 -05:00
Rex Zhu
ba5f884cfa drm/amdgpu/powerplay: pp module only enable smu when dpm disabled.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:20:59 -05:00
Trigger Huang
acd546b9fd drm/amdgpu:bypass avfs event manager for sriov
This patch is used for virtualization support. In virtualization case,
the initialization sequences are not totally the same as
non-Virtualization's. The avfs event manager should be bypassed if in
SRIOV virtualization case. At the same, this patch will also bypass
starting SMC within SRIOV in FIJI, so the SMU firmware loading will be
avoid, which is required in SRIOV.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Trigger Huang <trigger.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:20:59 -05:00
Trigger Huang
e22504425f drm/amdgpu:no gpu scheduler for KIQ
KIQ is used for interaction between driver and
CP, and not exposed to outside client, as such it
doesn't need to be handled by GPU scheduler.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Trigger Huang <trigger.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:20:58 -05:00
Trigger Huang
2068751d09 drm/amdgpu: Add a ring type KIQ definition
Add a new ring type definition for KIQ. KIQ is used for interaction
between driver and CP.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Trigger Huang <trigger.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:20:58 -05:00
Maruthi Srinivas Bayyavarapu
f8bdce3e86 drm/amdgpu: enable UVD clockgating in Polaris-10/11
UVD clocks are set to be disabled, when not in use.

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tom StDenis <Tom.StDenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:20:57 -05:00
Grazvydas Ignotas
81c1514bf8 drm/amd/amdgpu: expose fan rpm though hwmon
Only for cards that are supported by powerplay.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:20:56 -05:00
Grazvydas Ignotas
72a16a9d59 drm/amd/powerplay: export a function to read fan rpm
Powerplay hwmgr already has an implementation, all we need to do is to call it.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:20:56 -05:00
Huang Rui
47ecd3c4e0 drm/amdgpu: remove amdgpu_cs_handle_lockup
In fence waiting, it never return -EDEADLK yet, so drop this function
here.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:20:55 -05:00
Huang Rui
a414cd708b drm/amdgpu: cleanup amdgpu_cs_ioctl to make code logicality clear
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:20:55 -05:00
Rex Zhu
a08d8c929f drm/amd/powerplay: make CAC feature controlled by module parameter.
use same module parameter with powercontainment

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:20:54 -05:00
Rex Zhu
53b963b603 drm/amd/powerplay: add new bit mask to ctrl clock stretch feature.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:20:53 -05:00
Mario Kleiner
8e94a46c17 drm/amdgpu: Attach exclusive fence to prime exported bo's. (v5)
External clients which import our bo's wait only
for exclusive dmabuf-fences, not on shared ones,
ditto for bo's which we import from external
providers and write to.

Therefore attach exclusive fences on prime shared buffers
if our exported buffer gets imported by an external
client, or if we import a buffer from an external
exporter.

See discussion in thread:
https://lists.freedesktop.org/archives/dri-devel/2016-October/122370.html

Prime export tested on Intel iGPU + AMD Tonga dGPU as
DRI3/Present Prime render offload, and with the Tonga
standalone as primary gpu.

v2: Add a wait for all shared fences before prime export,
    as suggested by Christian Koenig.

v3: - Mark buffer prime_exported in amdgpu_gem_prime_pin,
    so we only use the exclusive fence when exporting a
    bo to external clients like a separate iGPU, but not
    when exporting/importing from/to ourselves as part of
    regular DRI3 fd passing.

    - Propagate failure of reservation_object_wait_rcu back
    to caller.

v4: - Switch to a prime_shared_count counter instead of a
      flag, which gets in/decremented on prime_pin/unpin, so
      we can switch back to shared fences if all clients
      detach from our exported bo.

    - Also switch to exclusive fence for prime imported bo's.

v5: - Drop lret, instead use int ret -> long ret, as proposed
      by Christian.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95472
Tested-by: Mike Lothian <mike@fireburn.co.uk> (v1)
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>.
Cc: Christian König <christian.koenig@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-11-11 10:20:04 -05:00
Dave Airlie
3e91168a6a Merge tag 'topic/drm-misc-2016-11-10' of git://anongit.freedesktop.org/drm-intel into drm-next
- better atomic state debugging from Rob
- fence prep from gustavo
- sumits flushed out his backlog of pending dma-buf/fence patches from
  various people
- drm_mm leak debugging plus trying to appease Kconfig (Chris)
- a few misc things all over

* tag 'topic/drm-misc-2016-11-10' of git://anongit.freedesktop.org/drm-intel: (35 commits)
  drm: Make DRM_DEBUG_MM depend on STACKTRACE_SUPPORT
  drm/i915: Restrict DRM_DEBUG_MM automatic selection
  drm: Restrict stackdepot usage to builtin drm.ko
  drm/msm: module param to dump state on error irq
  drm/msm/mdp5: add atomic_print_state support
  drm/atomic: add debugfs file to dump out atomic state
  drm/atomic: add new drm_debug bit to dump atomic state
  drm: add helpers to go from plane state to drm_rect
  drm: add helper for printing to log or seq_file
  drm: helper macros to print composite types
  reservation: revert "wait only with non-zero timeout specified (v3)" v2
  drm/ttm: fix ttm_bo_wait
  dma-buf/fence: revert "don't wait when specified timeout is zero" (v2)
  dma-buf/fence: make timeout handling in fence_default_wait consistent (v2)
  drm/amdgpu: add the interface of waiting multiple fences (v4)
  dma-buf: return index of the first signaled fence (v2)
  MAINTAINERS: update Sync File Framework files
  dma-buf/sw_sync: put fence reference from the fence creation
  dma-buf/sw_sync: mark sync_timeline_create() static
  drm: Add stackdepot include for DRM_DEBUG_MM
  ...
2016-11-11 09:28:44 +10:00
Rex Zhu
954e6bee03 drm/amd/powerplay: implement get_clock_by_type for iceland.
iceland use pptable v0.

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=185681
https://bugs.freedesktop.org/show_bug.cgi?id=98357

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-10 14:04:27 -05:00
Alex Deucher
0f12f73c51 drm/amd/powerplay/smu7: fix checks in smu7_get_evv_voltages (v2)
Only check if the tables exist in relevant configs.  This
fixes a failure on V0 tables.

v2: fix version check as suggested by Rex

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=185681
https://bugs.freedesktop.org/show_bug.cgi?id=98357

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-10 11:11:40 -05:00
Alex Deucher
90ebf11857 drm/amd/powerplay: update phm_get_voltage_evv_on_sclk for iceland
Was missing the handling for iceland.

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=185681
https://bugs.freedesktop.org/show_bug.cgi?id=98357

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-10 11:11:33 -05:00
Alex Deucher
0a866d38ef drm/amd/powerplay: propagate errors in phm_get_voltage_evv_on_sclk
Missing for one case.

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=185681
https://bugs.freedesktop.org/show_bug.cgi?id=98357

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-10 11:10:27 -05:00
Junwei Zhang
eef18a827a drm/amdgpu: add the interface of waiting multiple fences (v4)
v2: agd: rebase and squash in all the previous optimizations and
changes so everything compiles.
v3: squash in Slava's 32bit build fix
v4: rebase on drm-next (fence -> dma_fence),
    squash in Monk's ioctl update patch

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
 [sumits: fix checkpatch warnings]
Link: http://patchwork.freedesktop.org/patch/msgid/1478290570-30982-2-git-send-email-alexander.deucher@amd.com
2016-11-09 00:28:42 +05:30
Andrew Shadura
f20024d8ba drm/amd/powerplay: return false instead of -EINVAL
Returning -EINVAL from a bool-returning function
phm_check_smc_update_required_for_display_configuration has an unexpected
effect of returning true, which is probably not what was intended.
Replace -EINVAL by false.

The only place this function is called from is
psm_adjust_power_state_dynamic in
drivers/gpu/drm/amd/powerplay/eventmgr/psm.c:106:

	if (!equal || phm_check_smc_update_required_for_display_configuration(hwmgr)) {
		phm_apply_state_adjust_rules(hwmgr, requested, pcurrent);
		phm_set_power_state(hwmgr, &pcurrent->hardware, &requested->hardware);
		hwmgr->current_ps = requested;
	}

It seems to expect a boolean value here.

This issue has been found using the following Coccinelle semantic patch
written by Peter Senna Tschudin:
<smpl>
@@
identifier f;
constant C;
typedef bool;
@@
bool f (...){
<+...
* return -C;
...+>
}
</smpl>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-08 11:43:05 -05:00
Arnd Bergmann
a29d126027 drm/amdgpu/powerplay/smu7: fix unintialized data usage
A recent bugfix replaced an out-of-bounds access with direct
use of unintialized data:

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c: In function 'smu7_patch_limits_vddc':
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:2033:6: error: 'vddc' may be used uninitialized in this function [-Werror=maybe-uninitialized]
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:2146:11: note: 'vddc' was declared here
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:2033:6: error: 'vddci' may be used uninitialized in this function [-Werror=maybe-uninitialized]
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:2146:17: note: 'vddci' was declared here
  uint32_t vddc, vddci;

This initializes the data as before using the correct type.

Fixes: 77f7f71f5b ("drm/amdgpu/powerplay/smu7: fix static checker warning")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-08 10:34:29 -05:00
Alex Deucher
757124d95c drm/amdgpu: fix crash in acp_hw_fini
On CZ/ST systems with AZ rather than ACP audio, we need to bail
early in hw_fini since there is nothing to do.

bug: https://bugs.freedesktop.org/show_bug.cgi?id=98276

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-11-07 12:40:52 -05:00
Dave Airlie
672c989158 Merge branch 'drm-fixes-4.9' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
A few more fixes for 4.9.

* 'drm-fixes-4.9' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: add some error handling to amdgpu_init v2
  drm/amd: fix scheduler fence teardown order v2
  drm/amd/powerplay: don't succeed in getters if fan is missing
  drm/amdgpu: make sure ddc_bus is valid in connector unregister
  drm/radeon: Fix kernel panic on shutdown
  drm/amdgpu: disable runtime pm in certain cases
  drm/radeon: disable runtime pm in certain cases
  drm/amdgpu: add support for new smc firmware on iceland
  drm/amdgpu: add support for new smc firmware on tonga
2016-11-07 09:40:40 +10:00
Dave Airlie
7b624ad8fe Linux 4.9-rc4
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Backmerge tag 'v4.9-rc4' into drm-next

Linux 4.9-rc4

This is needed for nouveau development.
2016-11-07 09:37:09 +10:00
Dave Airlie
5f7f8f6edb Merge branch 'drm-fixes-staging' of ssh://people.freedesktop.org/~/linux into drm-fixes
Pull the staging fixes tree I had into rc3 to make real -fixes again.
2016-11-01 09:05:54 +10:00
Christian König
245ae5e915 drm/amdgpu: add some error handling to amdgpu_init v2
Just to be clean should we ever run into -ENOMEM during module init.

v2: fix typo in commit message

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-31 12:44:58 -04:00
Christian König
c24784f015 drm/amd: fix scheduler fence teardown order v2
Some fences might be alive even after we have stopped the scheduler leading
to warnings about leaked objects from the SLUB allocator.

Fix this by allocating/freeing the SLUB allocator from the module
init/fini functions just like we do it for hw fences.

v2: make variable static, add link to bug

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=97500

Reported-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-10-31 12:43:20 -04:00
Grazvydas Ignotas
91efdb2718 drm/amd/powerplay: don't succeed in getters if fan is missing
Otherwise callers end up using uninitialized data.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-31 12:33:31 -04:00
Alex Deucher
eef2b41122 drm/amdgpu: make sure ddc_bus is valid in connector unregister
This should only happen on boards TV connectors which do not
have a ddc bus for those connectors.  None of the asics supported
by amdgpu support tv, so we shouldn't hit this, but check
to be on the safe side (e.g., bios bug for example).

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-31 12:27:52 -04:00
Alex Deucher
84b1528e8c drm/amdgpu: disable runtime pm in certain cases
If the platform does not support hybrid graphics or ATPX dGPU
power control.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-10-31 11:49:58 -04:00
Alex Deucher
3b496626ee drm/amdgpu: add support for new smc firmware on iceland
Newer iceland parts require new smc firmware.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-10-28 15:26:51 -04:00
Alex Deucher
646cccb55b drm/amdgpu: add support for new smc firmware on tonga
Newer tonga parts require new smc firmware.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-10-28 15:15:08 -04:00
Dave Airlie
220196b384 Merge tag 'topic/drm-misc-2016-10-27' of git://anongit.freedesktop.org/git/drm-intel into drm-next
Pull request already again to get the s/fence/dma_fence/ stuff in and
allow everyone to resync. Otherwise really just misc stuff all over, and a
new bridge driver.

* tag 'topic/drm-misc-2016-10-27' of git://anongit.freedesktop.org/git/drm-intel:
  drm/bridge: fix platform_no_drv_owner.cocci warnings
  drm/bridge: fix semicolon.cocci warnings
  drm: Print some debug/error info during DP dual mode detect
  drm: mark drm_of_component_match_add dummy inline
  drm/bridge: add Silicon Image SiI8620 driver
  dt-bindings: add Silicon Image SiI8620 bridge bindings
  video: add header file for Mobile High-Definition Link (MHL) interface
  drm: convert DT component matching to component_match_add_release()
  dma-buf: Rename struct fence to dma_fence
  dma-buf/fence: add an lockdep_assert_held()
  drm/dp: Factor out helper to distinguish between branch and sink devices
  drm/edid: Only print the bad edid when aborting
  drm/msm: add missing header dependencies
  drm/msm/adreno: move function declarations to header file
  drm/i2c/tda998x: mark symbol static where possible
  doc: add missing docbook parameter for fence-array
  drm: RIP mode_config->rotation_property
  drm/msm/mdp5: Advertize 180 degree rotation
  drm/msm/mdp5: Use per-plane rotation property
2016-10-28 11:33:52 +10:00
Rex Zhu
3495a10357 drm/amdgpu: turn on/off uvd clock when dpm enable/disable on CI
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-27 15:18:58 -04:00
Rex Zhu
415282b15e drm/amdgpu: disable dpm before turn off clock when vce idle.
v2: move return value check as well

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-27 15:18:48 -04:00
Rex Zhu
4be5097ccb drm/amdgpu: enable uvd bypass mode for CI/VI.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-27 15:18:38 -04:00
Rex Zhu
3f767e3d07 drm/amdgpu: just not load smc firmware if smu is already running
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-27 15:18:29 -04:00
Rex Zhu
86f8c599b0 drm/amdgpu: when suspend, set boot state instand of disable dpm.
fix pm-hibernate bug, when suspend/resume, dpm start failed.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-27 15:18:19 -04:00
Huang Rui
8ed8147abc drm/amdgpu: use failed label to handle context init failure
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-27 15:18:09 -04:00
Rex Zhu
a2941d0126 drm/amd/powerplay: fix bug get wrong evv voltage of Polaris.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-27 13:59:36 -04:00
Alex Deucher
71451bdfc2 drm/amdgpu/si_dpm: workaround for SI kickers
Consolidate existing quirks. Fixes stability issues
on some kickers.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-27 13:59:24 -04:00
Rex Zhu
49a5d73fd0 drm/amdgpu: fix s3 resume back, uvd dpm randomly can't disable.
the value of last_mclk_dpm_enable_mask will be changed if
other clients(vce,dal) trigger set power state between enable
and disable uvd dpm.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-26 15:39:32 -04:00
Dave Airlie
7cf321d118 drm/drivers: add support for using the arch wc mapping API.
This fixes a regression in all these drivers since the cache
mode tracking was fixed for mixed mappings. It uses the new
arch API to add the VRAM range to the PAT mapping tracking
tables.

Fixes: 87744ab383 (mm: fix cache mode tracking in vm_insert_mixed())
Reviewed-by: Christian König <christian.koenig@amd.com>.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-10-26 16:48:01 +10:00
Christian König
9982ca681e drm/amdgpu: add amdgpu_ttm_bo_eviction_valuable callback
This way we can correctly check split VRAM buffers as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:44:04 -04:00
Christian König
a2ab19fed9 drm/ttm: make eviction decision a driver callback v2
This way the driver can decide if it is valuable to evict a BO or not.

The current implementation is added as default to all existing drivers.

v2: fix some typos found during internal testing

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:44:04 -04:00
Colin Ian King
fad742f89d drm/amd/powerplay: fix spelling mistake and add KERN_WARNING to printks
Fix trivial spelling mistake cant't -> can't and add KERN_WARNING to
printk messages.  Remove redundant spaces before \n too (thanks to
Joe Perches for spotting those).

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:44:02 -04:00
Monk Liu
aafcafa0fa drm/amdgpu:new ids flag for preempt
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:59 -04:00
Baoyou Xie
d1936cc2fc drm/amdgpu: mark symbols static where possible
We get 2 warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/si.c:908:5: warning: no previous prototype for 'si_pciep_rreg' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/si.c:921:6: warning: no previous prototype for 'si_pciep_wreg' [-Wmissing-prototypes]

In fact, both functions are only used in the file in which they are
declared and don't need a declaration, but can be made static.
So this patch marks these functions with 'static'.

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:58 -04:00
Baoyou Xie
356aee305a drm/amdgpu: change function declarations and add missing header dependencies
We get a few warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c:38:6: warning: no previous prototype for 'amdgpu_atombios_crtc_overscan_setup' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c:661:6: warning: no previous prototype for 'dce_v8_0_disable_dce' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:40:5: warning: no previous prototype for 'amdgpu_gfx_scratch_get' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:62:6: warning: no previous prototype for 'amdgpu_gfx_scratch_free' [-Wmissing-prototypes]
....

In fact, these functions are declared in
drivers/gpu/drm/amd/amdgpu/atombios_crtc.h
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
drivers/gpu/drm/amd/amdgpu/dce_v8_0.h
drivers/gpu/drm/amd/amdgpu/dce_v10_0.h
drivers/gpu/drm/amd/amdgpu/dce_v11_0.h
drivers/gpu/drm/amd/powerplay/inc/pp_acpi.h.
So this patch adds missing header dependencies.

By the way, this patch changes declaration of amdgpu_gfx_parse_disable_cu()
to subject to its implement, and clean three function declarations
in pp_acpi.h up.

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:58 -04:00
Alex Deucher
f93932bcdc drm/amdgpu: s/amdgpuCrtc/amdgpu_crtc/ in pageflip code
Fix random CamelCase that has annoyed me for a while.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:57 -04:00
Alex Deucher
f1e68a7cf5 drm/amdgpu/atom: remove a bunch of unused functions
Leftovers from the radeon.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:56 -04:00
Alex Deucher
72a57438d1 drm/amdgpu: consolidate atom scratch reg handling for hangs
Move from asic specific code to common atom code.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:56 -04:00
Alex Deucher
a76ed485c5 drm/amdgpu: use amdgpu_bo_[create|free]_kernel for wb
Rather than open coding it.

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:55 -04:00
Christian König
9861470181 drm/amdgpu: add VCE VM session tracking
Fix the problems with killing VCE sessions in VM mode.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:55 -04:00
Christian König
45088efc85 drm/amdgpu: improve parse_cs handling a bit
This way we can use parse_cs and still keep VM mode enabled.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:54 -04:00
Rex Zhu
5e876c62d8 drm/amdgpu: refine set power state logic for dpm.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:53 -04:00
Rex Zhu
8c8e2c30d2 drm/amdgpu: update current ps/requeset ps in adev with real ps.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:53 -04:00
Alex Deucher
6061789a45 drm/amdgpu: add an implement for check_power_state equal for KV
KV/KB/ML was missed these was implemented for other asics.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:52 -04:00
Rex Zhu
3411717501 drm/amdgpu: add an implement for check_power_state equal for Si.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:52 -04:00
Rex Zhu
73909a746a drm/amdgpu: add an implement for check_power_state equal for Cz.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:51 -04:00
Rex Zhu
1d516c41d9 drm/amdgpu: add an implement for check_power_state equal for CI
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:50 -04:00
Rex Zhu
fbebf2c6bc drm/amdgpu: add new callback to check power state info
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:50 -04:00
Rex Zhu
db82b67c57 drm/amdgpu: check min clock set by DAL before set ps.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:49 -04:00
Tom St Denis
74f3ce31e9 drm/amd/amdgpu: Put in rest of wave fields
Add the rest of the basic SQ WAVE fields to
finish off the implementation.  Eventually,
a separate interface will be needed for GPRs.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:49 -04:00
Tom St Denis
472259f026 drm/amd/amdgpu: re-factor debugfs wave reader
Move IP version specific code into a callback.

Also add support for gfx7 devices.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:48 -04:00
Tom St Denis
394fdde256 drm/amd/amdgpu: Make debugfs write compliment read
Add PG lock support as well as bank selection to
the MMIO write function.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:47 -04:00
Tom St Denis
32977f93b4 drm/amd/amdgpu: Allow broadcast on debugfs read (v2)
Allow any of the se/sh/instance fields to be
specified as a broadcast by submitting 0x3FF.

(v2) Fix broadcast range checking

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:47 -04:00
Tom St Denis
5ecfb3b8fc drm/amd/amdgpu: Fix debugfs wave reader
On non VI/CZ platforms it would not free
the grbm index lock.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:46 -04:00
Tom St Denis
273d7aa13c drm/amd/amdgpu: Add wave reader to debugfs
Currently supports CZ/VI.  Allows nearly atomic read
of wave data from GPU.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:46 -04:00
Alex Deucher
a125510721 drm/amdgpu: rework IP block registration (v2)
This makes it easier to replace specific IP blocks on
asics for handling virtual_dce, DAL, etc. and for building
IP lists for hw or tables.  This also stored the status
information in the same structure.

v2: split out spelling fix into a separate patch
    add a function to add IPs to the list

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:45 -04:00
Alex Deucher
cf35c7ca3d drm/amdgpu/powerplay: fix spelling in amdgpu_powerplay.h
and update a comment as well.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:44 -04:00
Alex Deucher
623fea1868 drm/amdgpu/virtual_dce: move define into source file
It's not used outside the file.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:44 -04:00
Alex Deucher
2120df475d drm/amdgpu: enable virtual dce on SI
Add the proper IP module when requested.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:43 -04:00
Alex Deucher
07fecde5d3 drm/amdgpu: fill in vce clock info ioctl query (v2)
Returns the vce clock table for the user mode driver.
The user mode driver can fill this data into vce clock
data packet for optimal VCE DPM.

v2: update to the new API

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:43 -04:00
Alex Deucher
597be302f1 drm/amdgpu/powerplay: add an implementation for get_vce_clock_state (v3)
Used by the powerplay dpm code.

v2: update to the new API
v3: drop old include

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:42 -04:00
Alex Deucher
825cc9974d drm/amdgpu/dpm: add an implementation for get_vce_clock_state (v2)
Used by the non-powerplay dpm code.

v2: update to the new API

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:41 -04:00
Alex Deucher
230cf1ba72 drm/amdgpu/dpm: add new callback to fetch vce clock state (v2)
Will be used by the new info ioctl query.

v2: fetch a single state per request

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:41 -04:00
Rex Zhu
66ba1afd85 drm/amdgpu: save number of vce states in dpm struct.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:40 -04:00
Rex Zhu
0d8de7ca0b drm/amdgpu: use same vce state definition in dpm and powerplay
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:39 -04:00
Alex Deucher
cf0978819c drm/amdgpu: move dpm related definitions to amdgpu_dpm.h
No intended functional change.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:38 -04:00
Christian König
7988714237 drm/amdgpu: move align_mask and nop into ring funcs as well (v2)
They are constant as well.

v2: update uvd and vce phys ring structures as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:38 -04:00
Christian König
21cd942e5c drm/amdgpu: move the ring type into the funcs structure (v2)
It's constant, so it doesn't make to much sense to keep it
with the variable data.

v2: update vce and uvd phys mode ring structures as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:37 -04:00
Christian König
e12f3d7a23 drm/amdgpu: move IB and frame size directly into the engine description
I should have suggested that on the initial patchset. This saves us a
few CPU cycles during CS and a bunch of loc.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:36 -04:00
Christian König
7bc6be825a drm/amdgpu: remove explicit NULL init for parse_cs
sed -i "/\.parse_cs = NULL,/d" drivers/gpu/drm/amd/amdgpu/*.c

That's just a leftover from radeon.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:36 -04:00
Christian König
e08c90a774 drm/amdgpu: remove 128 NOP hack from vm_flush v2
With the padding raised to 256 DW that shouldn't be needed any more.

v2: reduce estimation as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:35 -04:00
Christian König
c81b07e6bc drm/amdgpu: remove ring type check for conditional execution
If a ring doesn't support that it shouldn't implement the function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:35 -04:00
Christian König
66f3b2d527 drm/amdgpu: pad gfx and compute rings to 256 dw
The same as on windows to avoid further problems with CE/DE
command submission overlaps.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:34 -04:00
Alex Deucher
a0a71e49f5 drm/amdgpu: clarify why we evict vram twice on suspend
Update the comment to explain why we do this.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:33 -04:00
Alex Deucher
db9635cc14 drm/amdgpu: used cached gca values for vi_read_register (v2)
Using the cached values has less latency for bare metal
and SR-IOV, and prevents reading back bogus values if the
engine is powergated.

v2: fix typo in tile idx calculation

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:32 -04:00
Alex Deucher
34817db6c7 drm/amdgpu/gfx8: use cached raster config values in csb setup
Simplify the code and properly set the csb for harvest values.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:32 -04:00
Alex Deucher
392f0c775c drm/amdgpu/gfx8: cache rb config values
Needed when for SR-IOV and when PG is enabled.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:31 -04:00
Alex Deucher
e3fa76306f drm/amdgpu: add additional cached gca config variables
We need to cache some additional values to handle SR-IOV
and PG.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:30 -04:00
Christian König
b88c8796d8 drm/amdgpu: use amdgpu_vm_get_pd_bo in the GEM code
Instead of messing with the PD directly.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:30 -04:00
Christian König
073440d262 drm/amdgpu: move VM defines into amdgpu_vm.h
Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:29 -04:00
Christian König
7802301611 drm/amdgpu: move fence and ring defines into amdgpu_ring.h
Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:29 -04:00
Christian König
5611350499 drm/amdgpu: move sync handling into a separate header
Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:28 -04:00
Christian König
914b4dce4f drm/amdgpu: stop using a bo list entry for the VM PTs
Saves us a bit of memory.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:28 -04:00
Christian König
f7da30d979 drm/amdgpu: move PT validation back into VM code v2
Saves a bunch of CPU cycles when swapping things back in and
allows us to split the VM headers into a separate file.

v2: rename parameters

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:27 -04:00
Christian König
a7d64de659 drm/amdgpu: remove adev pointer from struct amdgpu_bo v2
It's completely pointless to have two pointers to the
device in the same structure.

v2: rename function to amdgpu_ttm_adev, fix typos

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:26 -04:00
Tom St Denis
f3fd451263 drm/amd/amdgpu: Enable UVD PG on Tonga
Tested by reading tile/clk bits during load/idle.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:26 -04:00
Tom St Denis
97f40ef049 drm/amd/powerplay: Enable UVD powergating for SMU7
This patch enables detecting VCE/UVD PG features and fixes the
UVD powergate function.

Tested on a Tonga (by reading UVD tile/clk bits during playback/idle).

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:25 -04:00
Christian König
f8991bab1a drm/amdgpu: update the shadow PD together with the real one v2
Far less CPU cycles needed for this approach.

v2: fix typo

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:25 -04:00
Frank Min
42e8cb5001 drm/amdgpu:wptr poll address of gfx8 is needed
for GFX8, gfx ring's wptr_addr is needed by SRIOV & CP for polling.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:24 -04:00
Monk Liu
4c2b2453ef drm/amdgpu:properly fix some JumpTable issues
we found some MEC ucode leads to IB test fail or even
ring test fail if Jump Table of it is not start in
FW bo with page aligned address, fixed by always make
JT address page aligned.

we don't need to patch JT2 for MEC2, because for VI,
MEC2 is a copy of MEC1, thus when converting fw_type
for MEC_JT2 we just return MEC1,hw can use the same
JT for both MEC1 & MEC2.

above two change fixed some ring/ib test failure issue
for some version of MEC ucode.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:23 -04:00
Monk Liu
bed5712e1a drm/amdgpu:add MEC_STORAGE ucode id for sriov
for sriov, SMC need MEC_STORAGE reserved in fw bo.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Frank Min <frank.min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:23 -04:00