Commit Graph

533125 Commits

Author SHA1 Message Date
Thomas Petazzoni
777572911a dmaengine: mv_xor: optimize performance by using a subset of the XOR channels
Due to how async_tx behaves internally, having more XOR channels than
CPUs is actually hurting performance more than it improves it, because
memcpy requests get scheduled on a different channel than the XOR
requests, but async_tx will still wait for the completion of the
memcpy requests before scheduling the XOR requests.

It is in fact more efficient to have at most one channel per CPU,
which this patch implements by limiting the number of channels per
engine, and the number of engines registered depending on the number
of availables CPUs.

Marvell platforms are currently available in one CPU, two CPUs and
four CPUs configurations:

 - in the configurations with one CPU, only one channel from one
   engine is used.

 - in the configurations with two CPUs, only one channel from each
   engine is used (they are two XOR engines)

 - in the configurations with four CPUs, both channels of both engines
   are used.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-19 22:32:14 +05:30
Thomas Petazzoni
6d8f7abd23 dmaengine: mv_xor: remove support for dmacap,* DT properties
The only reason why we had dmacap,* properties is because back when
DMA_MEMSET was supported, only one out of the two channels per engine
could do a memset operation. But this is something that the driver
already knows anyway, and since then, the DMA_MEMSET support has been
removed.

The driver is already well aware of what each channel supports and the
one to one mapping between Linux specific implementation details (such
as dmacap,interrupt enabling DMA_INTERRUPT) and DT properties is a
good indication that these DT properties are wrong.

Therefore, this commit simply gets rid of these dmacap,* properties,
they are now ignored, and the driver is responsible for knowing the
capabilities of the hardware with regard to the dmaengine subsystem
expectations.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-19 22:31:53 +05:30
Michal Suchanek
31495d60a0 dmaengine: pl330: do not emit loop for 1 byte transfer.
When there is only one burst required do not emit loop instructions to
loop exactly once. Emit just the body of the loop.

Signed-off-by: Michal Suchanek <hramrach@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-19 22:11:46 +05:30
Rob Herring
2f27b81c0e dmaengine: kill off set_irq_flags usage
set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill off set_irq_flags. The translation of flags is as follows:

IRQF_VALID -> !IRQ_NOREQUEST
IRQF_PROBE -> !IRQ_NOPROBE
IRQF_NOAUTOEN -> IRQ_NOAUTOEN

For IRQs managed by an irqdomain, the irqdomain core code handles clearing
and setting IRQ_NOREQUEST already, so there is no need to do this in
.map() functions and we can simply remove the set_irq_flags calls. Some
users also modify IRQ_NOPROBE and this has been maintained although it
is not clear that is really needed. There appears to be a great deal of
blind copy and paste of this code.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-19 21:31:58 +05:30
Zidan Wang
d078cd1b41 dmaengine: imx-sdma: Add imx6sx platform support
The new Solo X has more requirements for SDMA events. So it creates
a event mux to remap most of event numbers in GPR (General Purpose
Register). If we want to use SDMA support for those module who do
not get the even number as default, we need to configure GPR first.

Thus this patch adds this support of GPR event remapping configuration
to the SDMA driver.

Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-19 21:28:55 +05:30
Ludovic Desroches
e900c30dc1 dmaengine: at_xdmac: fix bug in prep_dma_cyclic
In cyclic mode, the round chaining has been broken by the introduction
of at_xdmac_queue_desc(): AT_XDMAC_MBR_UBC_NDE is set for all descriptors
excepted for the last one. at_xdmac_queue_desc() has to be called one
more time to chain the last and the first descriptors.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Fixes: 0d0ee751f7 ("dmaengine: xdmac: Rework the chaining logic")
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-19 21:21:28 +05:30
Alex Smith
ae9c02b421 dmaengine: jz4780: Kill tasklets before unregistering the device
Tasklets may have been scheduled as a result of an earlier interrupt
that could still be running. Kill them before unregistering the
device.

Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:28:50 +05:30
Alex Smith
d509a83cea dmaengine: jz4780: Don't use devm_*_irq() functions
We must explicitly free the IRQ before the device is unregistered in
case any device interrupt still occurs, so there's no point in using
the managed variations of the IRQ functions. Change to the regular
versions.

Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:28:50 +05:30
Alex Smith
d3597236fd dmaengine: jz4780: Remove request type number definitions header
The header just includes definitions of hardware-specific numbers which
can be written directly in the device tree, there's no need for a public
header containing these definitions.

Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:28:49 +05:30
Alex Smith
026fd406c8 dmaengine: jz4780: Ensure channel is on correct controller in filter
When scanning for a free DMA channel, the filter function should ensure
that the channel is on the controller that it was requested to be on in
the DT.

Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:28:49 +05:30
Alex Smith
d3273e10ad dmaengine: jz4780: Use dma_get_slave_channel when requesting a specific channel
When the DT requests a specific channel to use it is not necesssary
to scan through all DMA channels in the system. Just return the
requested channel using dma_get_slave_channel().

Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:28:49 +05:30
Alex Smith
839896ef3f dmaengine: jz4780: Fix error handling/signedness issues
There are a some signedness bugs such as testing for < 0 on unsigned
return values. Additionally there are some cases where functions which
should return NULL on error actually return a PTR_ERR value which can
result in oopses on error. Fix these issues.

Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:28:49 +05:30
Alex Smith
dc578f314e dmaengine: jz4780: Fall back on smaller transfer sizes where necessary
For some reason the controller does not support 8 byte transfers (but
does support all other powers of 2 up to 128). In this case fall back
to 4 bytes. In addition, fall back to 128 bytes when any larger power
of 2 would be possible within the alignment constraints, as this is
the maximum supported.

It makes no sense to outright reject 8 or >128 bytes just because the
alignment constraints make those the maximum possible size given the
parameters for the transaction. For instance, this can result in a DMA
from/to an 8 byte aligned address failing.

It is perfectly safe to fall back to smaller transfer sizes, the only
consequence is reduced transfer efficiency, which is far better than
not allowing the transfer at all.

Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:28:49 +05:30
Alex Smith
46fa516869 dmaengine: jz4780: Fix up dmaengine API function prototypes
Several function prototypes did not match the dmaengine API they were
implementing, resulting in build warnings. Correct these.

Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:28:49 +05:30
Yanchang Li
ac9bd0ef5d dmaengine: sirf: clear pending DMA interrupt when DMA terminates
If DMA interrupt comes and is latched by IRQ controller during the
execution of dma_terminate_all(), dma_irq routine will be executed
after dma terminated, and it will cause kernel panic.
We clear DMA interrupts in dma_terminate_all() to avoid this useless
interrupt.

Signed-off-by: Yanchang Li <Yanchang.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:13:59 +05:30
Joachim Eastwood
df48f3ff95 doc: dt: dma: add bindings for lpc1850-dmamux
Add device tree bindings documentation for the
lpc1850-dmamux DMA router.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:12:14 +05:30
Joachim Eastwood
e5f4ae84be dmaengine: add driver for lpc18xx dmamux
Add support for DMA on NXP LPC18xx/43xx platforms which has
a multiplexer in front of the PL080 dma request lines.

The mux is a single register in the LPC18xx/43xx CREG block
and can multiplex up to 4 request lines to each of the 16
lines on the PL080.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:12:14 +05:30
Linus Walleij
fbd7e41005 doc: dt: dma: add binding doc for pl08x
This introduces device tree bindings for the PL08x DMA controllers
when used with fixed signal assignment per channel, i.e. if each
channel on the PL08x is assigned precisely one burst/single signal
set.

[je: remove channel sub-node parsing, use cell value to assign AHB]

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:12:14 +05:30
Linus Walleij
aa4734da66 dmaengine: pl08x: support dt channel assignment
Add support for assigning DMA channels from a device tree.

[je: remove channel sub-node parsing, dynamic channel creation on xlate]

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:12:14 +05:30
Robert Jarzmik
4a736d156d dmaengine: pxa_dma: fix debug information
This fixes the following error:
drivers/dma/pxa_dma.c: In function ‘dbg_show_requester_chan’:
drivers/dma/pxa_dma.c:192:2: error: void value not ignored as it ought to be
  pos += seq_printf(s, "DMA channel %d requester :\n", phy->idx);
  ^
drivers/dma/pxa_dma.c:197:8: error: void value not ignored as it ought to be
        !!(drcmr & DRCMR_MAPVLD));
        ^
scripts/Makefile.build:258: recipe for target 'drivers/dma/pxa_dma.o' failed

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-18 22:10:09 +05:30
Jarkko Nikula
1dc0428854 dmaengine: Make __dma_request_slave_channel_compat() name argument constant
Inline function __dma_request_slave_channel_compat() doesn't modify "name"
argument but passes it to dma_request_slave_channel() which already takes
it as a constant.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 14:52:10 +05:30
Robert Jarzmik
0e95fb9ceb dmaengine: pxa_dma: don't use config direction parameter
Don't use the direction passed in the configuration, and rely on each
transfer's direction to prepare the transfers. This will enable
future removal of direction parameter from dma_slave_config.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 14:52:09 +05:30
Vinod Koul
272420214d dmaengine: Add DMA_CTRL_REUSE
This adds new descriptor flag for reusing a descriptor by submitting
multiple times by a client, for example video buffer.
Add helper APIs for this as well

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Acked-by:Robert Jarzmik <robert.jarzmik@free.fr>
2015-08-17 14:52:02 +05:30
Vinod Koul
60884ddecd Documentation: dmaengine: Add DMA_CTRL_REUSE documentation
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Acked-by:Robert Jarzmik <robert.jarzmik@free.fr>
2015-08-17 13:46:22 +05:30
Vinod Koul
06f10e2f93 Documentation: dmaengine: fix the DMA_CTRL_ACK documentation
As discussed recently the meaning of DMA_CTRL_ACK is that a desc cannot be
reused by provider until the client acknowledges receipt, i.e. has has a
chance to establish any dependency chains. So update documentation

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Acked-by:Robert Jarzmik <robert.jarzmik@free.fr>
2015-08-17 13:46:22 +05:30
Dave Jiang
09659a5978 dmaengine: ioatdma: Clean up IOAT_COMPLETION_PENDING flag
IOAT_COMPLETION_PENDING flag was deprecated for v2 and v3 drivers but was
not cleaned up. Doing that now. The commit deprecated this flag was
4dec23d7 ioatdma: fix race between updating ioat->head and
IOAT_COMPLETION_PENDING.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:31 +05:30
Dave Jiang
c7b0e8d7b5 dmaengine: ioatdma: fixup kernel doc errors from dma.h
./scripts/kerne-doc is reporting errors on dma.h. Clean up all reported
errors.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:31 +05:30
Dave Jiang
ef97bd0f59 dmanegine: ioatdma: remove function ptrs in ioatdma_device
Since we are a "single" device driver now we no longer require the function
pointers in ioatdma_device. Remove.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:30 +05:30
Dave Jiang
3372de5813 dmaengine: ioatdma: removal of dma_v3.c and relevant ioat3 references
Moving the relevant functions to their respective .c files and removal of
dma_v3.c file. Also removed various ioat3 references when appropriate.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:30 +05:30
Dave Jiang
599d49de7f dmaengine: ioatdma: move dma prep functions to single location
Move all DMA descriptor prepping functions to prep.c file. Fixup all
broken bits caused by the move.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:30 +05:30
Dave Jiang
c0f28ce66e dmaengine: ioatdma: move all the init routines
Moving all the init routines to init.c and fixup anything broken during
the move.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:30 +05:30
Dave Jiang
80b1973659 dmaengine: ioatdma: move all sysfs related code
Move and fixup all sysfs related bits to sysfs.c file.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:30 +05:30
Dave Jiang
885b201056 dmaengine: ioatdma: remove dma_v2.*
Clean out dma_v2 and remove ioat2 calls since we are moving everything
to just ioat.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:30 +05:30
Dave Jiang
55f878ec47 dmaengine: ioatdma: fixup ioatdma_device namings
Changing the variable names for ioatdma_device to be consistently named
ioat_dma instead of device/dma in order to avoid confusion and distinct
from struct device. This will clearly indicate that it is an
ioatdma_device. This also make all the naming consistent that the dma
device is ioat_dma and all the channels are ioat_chan.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:30 +05:30
Dave Jiang
5a976888c9 dmaengine: ioatdma: clean up local dma channel data structure
Kill the common ioatdma channel structure and everything that is not
dma_chan to be ioat_dma_chan. Since we don't have to worry about v1
and v2 ioatdma anymore this makes it much cleaner and obvious for
maintenance.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:30 +05:30
Dave Jiang
7f832645d0 dmaengine: ioatdma: remove ioatdma v2 registration
Removal of support for ioatdma v2 device support.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:30 +05:30
Dave Jiang
85596a1947 dmaengine: ioatdma: remove ioat1 specific code
Cleaning up of ioat1 specific code as it is no longer supported

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:30 +05:30
Dave Jiang
d73f277b32 dmaengine: ioatdma: deprecating and removal of old ioatdma devices
Removal of any devices that are ioatdma pre-3.0. This is the first step
in attempting to clean up the ioatdma driver and remove hw no longer
supported.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:37:29 +05:30
Allen Hubbe
5484526ac1 dmaengine: ioatdma: fix u16 overflow in cleanup
If the allocation order is 16, then the u16 count will overflow and wrap
to zero when assigned the value 1 << 16.

Change the type of 'total_descs' to int, so that it is large enough to
store a value equal or greater than 1 << 16.

Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:35:58 +05:30
Allen Hubbe
870ce49022 dmaengine: ioatdma: fix u16 overflow in reshape
If the allocation order is 16, then the u16 index will overflow and wrap
to zero instead of being equal or greater than 1 << 16.  The loop
condition will always be true, and the loop will run until all the
memory resources are depleted.

Change the type of index 'i' to u32, so that it is large enough to store
a value equal or greater than 1 << 16.

Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 13:35:58 +05:30
Thomas Gleixner
3d8cc00073 dmaengine: ipu: Consolidate duplicated irq handlers
The functions irq_irq_err and ipu_irq_fn are identical plus/minus the
comments. Remove one.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-06 08:30:57 +05:30
Thomas Gleixner
425e20fd08 dmaengine: ipu: Prepare irq handlers for irq argument removal
The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.

Search and update was done with coccinelle and the invaluable help of
Julia Lawall.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-06 08:30:57 +05:30
Maxime Ripard
67a6eedc4d dmaengine: xdmac: Add scatter gathered memset support
The XDMAC also supports memset operations over discontiguous areas. Add the
necessary logic to support this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-06 08:30:56 +05:30
Maxime Ripard
50c7cd2bd3 dmaengine: Add scatter-gathered memset
The current API allows the driver to accelerate memset by using the DMA
controller.

However, it does so over a contiguous memory area, which might proves
inefficient when you have to do it over a non-contiguous yet repititive
pattern, since you have to create a number of descriptors and then submit
each other.

Add a memset operation going over a scatter list to handle such cases in a
single call.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-06 08:30:56 +05:30
Maxime Ripard
77a68e56aa dmaengine: Add an enum for the dmaengine alignment constraints
Most drivers need to set constraints on the buffer alignment for async tx
operations. However, even though it is documented, some drivers either use
a defined constant that is not matching what the alignment variable expects
(like DMA_BUSWIDTH_* constants) or fill the alignment in bytes instead of
power of two.

Add a new enum for these alignments that matches what the framework
expects, and convert the drivers to it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-05 10:53:52 +05:30
Geert Uytterhoeven
056f6c8702 dmaengine: shdma: Make dummy shdma_chan_filter() always return false
If CONFIG_SH_DMAE_BASE (which is required for DMA engine support for
legacy SH, SH/R-Mobile, and R-Car Gen1, but not for R-Car Gen2) is not
enabled, but CONFIG_RCAR_DMAC (for R-Car Gen2 DMA engine support) is,
and the DTS doesn't provide a "dmas" property for a device,
dma_request_slave_channel_compat() incorrectly succeeds, and returns a
DMA channel.

However, when trying to use that DMA channel later, it fails with:

    rcar-dmac e6700000.dma-controller: rcar_dmac_prep_slave_sg: bad parameter: len=1, id=-22

(Fortunately most drivers can handle this failure, and fall back to
PIO)

The reason for this is that a NULL legacy filter function is used, which
actually means "all channels are OK", not "do not match".
If CONFIG_SH_DMAE_BASE is enabled (like in shmobile_defconfig, which
supports other SoCs besides R-Car Gen2), shdma_chan_filter() correctly
returns false, as no available channel on R-Car Gen2 matches a
shdma-base channel.
If the DTS does provide a "dmas" property, dma_request_slave_channel()
succeeds, and legacy filter-based matching is not used.

To fix this, change shdma_chan_filter from being NULL to a dummy
function that always returns false, like is done on other platforms.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-05 08:48:00 +05:30
Shengjiu Wang
8391ecf465 dmaengine: imx-sdma: Add device to device support
This patch adds DEV_TO_DEV support for i.MX SDMA driver to support data
transfer between two peripheral FIFOs.
The per_2_per script requires two peripheral addresses and two DMA
requests, and it need to check the src addr and dst addr is in the SPBA
bus space or in the AIPS bus space.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-05 08:46:34 +05:30
Jiang Liu
4d9efdfce7 dmaengine: ipu: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc
Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.

This is also a preparation for the removal of the 'irq' argument from
interrupt flow handlers.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-07-16 18:41:18 +05:30
Thomas Gleixner
d7fdb35690 dmaengine: ipu: Consolidate chained IRQ handler install/remove
Chained irq handlers usually set up handler data as well. We now have
a function to set both under irq_desc->lock. Replace the two calls
with one.

Search and conversion was done with coccinelle.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-07-16 18:40:52 +05:30
Andy Shevchenko
03734485b7 dmaengine: hsu: remove excessive lock
All hardware accesses are done under virtual channel lock. That's why specific
channel lock is excessive and can be removed safely. This has been tested on
Intel Medfield and Merrifield.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-07-16 18:30:46 +05:30