Now that we have switched to using IBs for page table updates,
we can switch back the using the DMA ring.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
For very large page table updates, we can exceed the
size of the ring. To avoid this, use an IB to perform
the page table update.
v2(ck): cleanup the IB infrastructure and the use it instead
of filling the struct ourself.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
fetch the reset mask and check if the relevant ring flags
are set to determine whether the ring is hung or not.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
When we attempt the reset the GPU, look at the status registers
to determine what blocks need to be reset.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
When we attempt the reset the GPU, look at the status registers
to determine what blocks need to be reset.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
When we attempt the reset the GPU, look at the status registers
to determine what blocks need to be reset.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
When we attempt the reset the GPU, look at the status registers
to determine what blocks need to be reset.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Used by all asic families from r600+.
Flag for the vbios and later instances of the driver
that the GPU is hung.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
KMS support is out and stable for a couple of years now and
the userspace code has deprecated or abandoned the old UMS interface.
So make the KMS interface the default and deprecate the UMS interface
in the kernel as well.
v2: rebased on alex/drm-next-3.9-wip
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This simplify and cleanup the async dma checking.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
After refactoring the _cs logic, we ended up with many
macros and constants that #define the same thing.
Clean'em up.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This patch eliminates ASIC-specific ***_cs_packet_next_reloc
functions and hooks up the new common function.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
next_reloc function does the same thing in all ASICs with
the exception of R600 which has a special case in legacy mode.
Pull out the common function in preparation for refactoring.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This function is not limited to r100, but it can dump a
(raw) packet for any ASIC. Rename it accordingly and move
its declaration to radeon.h
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
WAIT_REG_MEM on register does not allow the use of PFP.
Enforce this restriction when checking packets sent from
userland.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
vline packet parsing function for R600 and Evergreen+ are
the same, except that they use different registers. Factor
out the algorithm into a common function that uses register
table passed from ASIC-specific caller.
This reduces ASIC-specific function to (trivial) setup
of register table and call into the common function.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Once we factored out radeon_cs_packet_parse function,
evergreen_cs_next_is_pkt3_nop and r600_cs_next_is_pkt3_nop
functions became identical, so they can be factored out
into a common function.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
We now have a common radeon_cs_packet_parse function
that is good for all ASICs. Hook it up and eliminate
ASIC-specific versions.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
CS packet parse functions have a lot of in common across
all ASICs. Implement a common function and take care of
small differences between families inside the function.
This patch is a prep for major refactoring and consolidation
of CS parsing code.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Preparatory patch: patches to follow will touch a piece of code
that had broken indentication, so fix it before touching it.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
length_dw field was assigned twice. While at it, move user_ptr
assignment together with all other assignments to p->chunks[i]
structure to make the code more readable.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
For large VM page table updates, we can sometimes generate
more packets than there is space on the ring. This happens
more readily with the DMA ring since it is 64K (vs 1M for the
CP). For now, switch back to the CP. For the next kernel,
I have a patch to utilize IBs for VM PT updates which
alleviates this problem.
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=58354
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
If the requested number of DWs on the ring is larger than
the size of the ring itself, return an error.
In testing with large VM updates, we've seen crashes when we
try and allocate more space on the ring than the total size
of the ring without checking.
This prevents the crash but for large VM updates or bo moves
of very large buffers, we will need to break the transaction
down into multiple batches. I have patches to use IBs for
the next kernel.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
When kzalloc() failed in radeon_user_framebuffer_create(), need to
call object_unreference() to match the object_reference().
Signed-off-by: liu chuansheng <chuansheng.liu@intel.com>
Signed-off-by: xueminsu <xuemin.su@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Some chips seem to need a little delay after blacking out
the MC before the requests actually stop. Stop DMAR errors
reported by Shuah Khan.
Reported-by: Shuah Khan <shuahkhan@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Force the crtc mem requests on/off immediately rather
than waiting for the double buffered updates to kick in.
Seems we miss the update in certain conditions. Also
handle the DCE6 case.
Signed-off-by: Christopher Staite <chris@yourdreamnet.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Just a few small things:
- 2x workaround bits from Chris to fix up the new scanline waits enabled
in 3.8 on snb. People who've been struck by this on dual-screen also
need to upgrade the ddx.
- Dump the kernel version into i915_error_state, we've had a few mixups
there recently.
- Disable gfx DMAR on gen4 devices, acked by David Woodhouse.
* 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel:
drm/i915: dump UTS_RELEASE into the error_state
iommu/intel: disable DMAR for g4x integrated gfx
drm/i915: GFX_MODE Flush TLB Invalidate Mode must be '1' for scanline waits
drm/i915: Disable AsyncFlip performance optimisations
Inki writes:
"This pull request includes some bug fixes, code cleanups and exception codes.
If there is any problem, please kindly let me know."
* 'exynos-drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos:
drm/exynos: add check for the device power status
drm/exynos: Make 'drm_hdmi_get_edid' static
drm/exynos: fimd and ipp are broken on multiplatform
drm/exynos: don't include plat/gpio-cfg.h
drm/exynos: Remove "internal" interrupt handling
drm/exynos: Add missing static specifiers in exynos_drm_rotator.c
drm/exynos: Replace mdelay with usleep_range
drm/exynos: Make ipp_handle_cmd_work static
drm/exynos: Make g2d_userptr_get_dma_addr static
drm/exynos: consider DMA_NONE flag to dmabuf import
drm/exynos: free sg object if dma_map_sg is failed
drm/exynos: added validation of edid for vidi connection
drm/exynos: let drm handle edid allocations
V2: Add mutex protection, while read.
The hdmi and mixer win_commit calls currently are
not checking the status of IP before updating the
respective registers, this patch adds this check.
Signed-off-by: Shirish S <s.shirish@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Fixes the following warning:
drivers/gpu/drm/exynos/exynos_drm_hdmi.c:111:13: warning:
symbol 'drm_hdmi_get_edid' was not declared. Should it be static?
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
While the exynos DRM support in principle can work on
multiplatform, the FIMD and IPP sections of it both
include the plat/map-base.h header file, which is
not available on multiplatform. Rather than disabling
the entire driver, we can just conditionally build
these two parts.
Without this patch, building allyesconfig results in:
drivers/gpu/drm/exynos/exynos_drm_fimc.c:19:27: fatal error: plat/map-base.h: No such file or directory
drivers/gpu/drm/exynos/exynos_drm_ipp.c:20:27: fatal error: plat/map-base.h: No such file or directory
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Patch 9eb3e9e6f3 "drm/exynos: add support for ARCH_MULTIPLATFORM"
allowed building the exynos hdmi driver on non-samsung platforms,
which unfortunately broke compilation in combination with 22c4f42897
"drm: exynos: hdmi: add support for exynos5 hdmi", which added
an inclusion of the samsung-specific plat/gpio-cfg.h header file.
Fortunately, that header file is not required any more here, so
we can simply revert the inclusion in order to build the ARM
allyesconfig again without getting this error:
drivers/gpu/drm/exynos/exynos_hdmi.c:37:27: fatal error: plat/gpio-cfg.h: No such file or directory
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Remove the "internal" interrupt handling since it's never invoked and
remove "external" reference. This patch removes a bunch of dead code
and clarifies how hotplugging is handled in the HDMI driver.
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
