The commit 53441b8ef7 ("arm64: dts: allwinner: h6: PineH64 model B:
Add bluetooth") introduced the Bluetooth chip for the PineH64 model B,
but the GPIOs property didn't conform to the binding of the bluetooth
chip. Let's fix this.
Fixes: 53441b8ef7 ("arm64: dts: allwinner: h6: PineH64 model B: Add bluetooth")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-19-maxime@cerno.tech
The commit 7fa40ca7ef ("arm64: allwinner: dts: a64: add DT for Early
Adopter's PineTab") introduced an ili9881-based panel device node but
didn't conform to the binding. Fix this.
Fixes: 7fa40ca7ef ("arm64: allwinner: dts: a64: add DT for Early Adopter's PineTab")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-18-maxime@cerno.tech
DTC and the dt-validate tools report warnings for opp with the format
opp@$frequency: dtc for a missing reg property, and dt-validate since
the binding requires child nodes to have the format opp-$frequency.
Change this to the latter format.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-16-maxime@cerno.tech
Similar to krane-sku176 but using a different panel source.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210113110400.616319-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Config dsi node for mt8183 kukui. Set panel and ports.
Several kukui boards share the same panel property and only compatible
is different. So compatible will be set in board dts for comparison
convenience.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Link: https://lore.kernel.org/r/20210113110400.616319-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
To use the reduced reporting mode the threshold values need to be set
explicitly. Configure the threshold to be less than 0.5% of the full
touchscreen range. This seems to be a good compromise between system
load and input accurancy.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The ALERT signaling happens on the falling edge of the signal, as rising
edge doesn't really have any notion, as it may happen much later (due to
shared IRQ line) or too early if the chip resolves the fault itself. So
only trigger the IRQ on the edge we are actually interested in.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The internal USB is connected to a USB2 hub, the front-panel USB
is wired directly, but does not support USB3 speeds electrically.
Limit both ports accordingly.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Reduce slew rate and set drive strength to 105 Ohm. The previous settings
had some issues with signal ringing, due to the slew rate being too fast.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds all the necessary nodes to get audio support on both the
RMB3 and Zest boards.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Dcfg was overlapping with clockgen address space which resulted
in failure in memory allocation for dcfg. According regs description
dcfg size should not be bigger than 4KB.
Signed-off-by: Zyta Szpak <zr@semihalf.com>
Fixes: 8126d88162 ("arm64: dts: add QorIQ LS1046A SoC support")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
LS1028A supports two flexcan controllers similar to LX2160A.
There's already a compatible entry defined i.e "fsl,lx2160ar1-flexcan"
which can be further reused for LS1028A.
Please note, "fsl,ls1028ar1-flexcan" compatible entry doesn't exists and
can be safely removed.
LS1028A has a single peripheral clock (i.e platform clock) source
connected to both "ipg" and "per" and therefore, remove "sysclk" as
clock source from device-tree.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
LX2160A supports two flexcan controllers. Add the support.
Enable support further for LX2160A-RDB/QDS.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fixes an issue with HDA codec detection by properly wiring up the
power-domain for the HDA controller. This also fixes one of the USB-C
ports on Jetson AGX Xavier and enables support for audio on various
Tegra210, Tegra186 and Tegra194 boards. The Jetson Nano and Jetson TX1
also gain QSPI support.
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Merge tag 'tegra-for-5.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.12-rc1
Fixes an issue with HDA codec detection by properly wiring up the
power-domain for the HDA controller. This also fixes one of the USB-C
ports on Jetson AGX Xavier and enables support for audio on various
Tegra210, Tegra186 and Tegra194 boards. The Jetson Nano and Jetson TX1
also gain QSPI support.
* tag 'tegra-for-5.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Audio graph sound card for Jetson AGX Xavier
arm64: tegra: Audio graph sound card for Jetson TX2
Revert "arm64: tegra: Disable the ACONNECT for Jetson TX2"
arm64: tegra: Add RT5658 device entry
arm64: tegra: Add support for Jetson Xavier NX with eMMC
arm64: tegra: Prepare for supporting the Jetson Xavier NX with eMMC
arm64: tegra: Enable QSPI on Jetson Xavier NX
arm64: tegra: Add QSPI nodes on Tegra194
arm64: tegra: Enable QSPI on Jetson Nano
arm64: tegra: Audio graph sound card for Jetson Nano and TX1
arm64: tegra: Audio graph header for Tegra210
arm64: tegra: Order nodes alphabetically on Tegra210
arm64: tegra: Enable Jetson-Xavier J512 USB host
arm64: tegra: Add XUSB pad controller's "nvidia,pmc" property on Tegra210
arm64: tegra: Add power-domain for Tegra210 HDA
dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM
Link: https://lore.kernel.org/r/20210129193254.3610492-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable support for audio-graph based sound card on Jetson AGX Xavier.
Following I/O interfaces are enabled.
* I2S1, I2S2, I2S4 and I2S6
* DMIC3
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enable support for audio-graph based sound card on Jetson TX2. Based
on the board design following I/O modules are enabled.
* All I2S instances (I2S1 ... I2S6)
* All DSPK instances (DSPK1, DSPK2)
* DMIC1, DMIC2 and DMIC3
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The 'marvell,pwm-offset' property of both GPIO blocks (per CP component)
point to the same counter registers offset. The driver will decide how
to use counters A/B.
This is different from the convention of pwm on earlier Armada series
(370/38x). On those systems the assignment of A/B counters to GPIO
blocks is coded in both DT and the driver. The actual behaviour of the
current driver on Armada 8K/7K is the same as earlier systems.
Add also clock properties for base pwm frequency reference.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
SATA on A3720 SOC can use only comphy2, so move this definition from board
specific DTS file armada-3720-espressobin.dtsi into main A3720 SOC file
armada-37xx.dtsi.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds necessary flags in the device tree
which enable HS400 mode on AP807 MMC controller
on the CN913x-DB board.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds new compatible string to AP807 DTSI to avoid
its SDHCI controller to run in "slow mode" with disabled UHS.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The partition called "u-boot" in reality contains TF-A and U-Boot, and
TF-A is before U-Boot.
Rename this parition to "a53-firmware" to avoid confusion for users,
since they cannot simply build U-Boot from U-Boot repository and flash
the resulting image there. Instead they have to build the firmware with
the sources from the mox-boot-builder repository [1] and flash the
a53-firmware.bin binary there.
[1] https://gitlab.nic.cz/turris/mox-boot-builder
Signed-off-by: Marek Behún <kabel@kernel.org>
Fixes: 7109d817db ("arm64: dts: marvell: add DTS for Turris Mox")
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds spi-uart controller to LS1012A-FRDM board dts.
Device is equipped in SC16IS740 from NXP.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- Further cleanups of the hisilicon DTS to align with the dtschema
- Add or update the I2C, pinctrl and reset nodes for Hikey970
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Merge tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon ARM64 DT updates for 5.12
- Further cleanups of the hisilicon DTS to align with the dtschema
- Add or update the I2C, pinctrl and reset nodes for Hikey970
* tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: hi3670.dtsi: add I2C settings
arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings
arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst
arm64: dts: hisilicon: delete unused property smmu-cb-memtype
arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes
arm64: dts: hisilicon: normalize the node name of the localbus
arm64: dts: hisilicon: normalize the node name of the module thermal
arm64: dts: hisilicon: place clock-names "bus" before "core"
arm64: dts: hisilicon: separate each group of data in the property "ranges"
Link: https://lore.kernel.org/r/6013D1C7.90902@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There is a QSPI chip connected to the FlexSPI bus. Enable it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX8M Nano has the same Flexspi controller used in the i.MX8M
Mini. Add the node and disable it by default.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The I2C buses are not declared at the device tree. As this will
be needed by further patches, add them, keeping all in
disabled state. Per-board settings can override it.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
There are several pinctrl settings that are missing at this
DT file.
Also, the entries are out of order.
Add the missing bits, as they'll be required by the DRM driver - and
probably by other drivers not upstreamed yet.
Reorder the entres, adding the missing bits.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This is required in order to support USB.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The "smmu-cb-memtype" is a private property developed by the Hisilicon
driver in the early stage and is not used now. So delete it.
Otherwise, below YAML check warnings are reported:
arch/arm64/boot/dts/hisilicon/hip06-d03.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/hisilicon/hip07-d05.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Currently, the names of several nodes incorrectly match common PHY
provider schema. And the phy-provider.yaml requires them must have
property "#phy-cells". As a result, false positives similar to the
following are reported:
usb2-phy@120: '#phy-cells' is a required property
Change their names slightly so that they do not match pattern:
"^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Change the node name of the localbus to match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'. This error
is detected by simple-bus.yaml.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
1. Change the node name of the thermal zone to match
'^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', add suffix "-thermal".
2. Change the node name of the trip point to match
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', delete character "@".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Look at the clock-names schema defined in arm,mali-utgard.yaml:
clock-names:
items:
- const: bus
- const: core
The "bus" needs to be placed before the "core".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Do not write the "ranges" of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported:
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not valid under \
any of the given schemas (Possible causes of the failure):
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not of type 'boolean'
soc: pcie@a0090000:ranges:0: [33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add librem5-r4 with specifics to that revision like the near-level,
battery and charger properties. For schematics and more information,
see https://developer.puri.sm/Librem5/Hardware_Reference/Evergreen.html
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Expect all those regulators to be turned on initially.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This enables the Librem5's ft8006p based LCD panel driven by the
imx8mq's Northwest Logic DSI IP core and mxsfb display controller.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It's a supply for to touch and LCD.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The tps65982 feeds the bq25895 charge controller on the Librem 5.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
With the pmic driver fixed we can now shut off the regulator in the gpc.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This is consistent with other IRQs and makes keeps currents low.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
"make dtbs_check" fails with:
arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dt.yaml: eeprom@50: compatible: 'oneOf' conditional failed, one must be fixed:
'microchip,at24c64' does not match '^(atmel|catalyst|microchip|nxp|ramtron|renesas|rohm|st),(24(c|cs|lc|mac)[0-9]+|spd)$'
Fix this by dropping the bogus "at" prefix.
Fixes: a1d8a344f1 ("arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210128110136.2293490-1-geert+renesas@glider.be
Increase the SmartEEE Tw parameter for Atheros PHYs to stop gigabit
links from sporadically dropping. Testing on this platform shows that
a value of 24 results in a stable link, whereas 23 or below has the
occasional drop.
Tested with a Netgear GS116 unmanaged switch link partner with Cat 5e
cabling.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We are using Jailhouse Hypervsior which has virtual pci node that
use dt domains. so also use dt domains for pci node, this will avoid
conflict with Jailhouse Hypervisor to trigger the following error:
pr_err("Inconsistent \"linux,pci-domain\" property in DT\n");
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/net/can/dev.c
b552766c87 ("can: dev: prevent potential information leak in can_fill_info()")
3e77f70e73 ("can: dev: move driver related infrastructure into separate subdir")
0a042c6ec9 ("can: dev: move netlink related code into seperate file")
Code move.
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
57ac4a31c4 ("net/mlx5e: Correctly handle changing the number of queues when the interface is down")
214baf2287 ("net/mlx5e: Support HTB offload")
Adjacent code changes
net/switchdev/switchdev.c
20776b465c ("net: switchdev: don't set port_obj_info->handled true when -EOPNOTSUPP")
ffb68fc58e ("net: switchdev: remove the transaction structure from port object notifiers")
bae33f2b5a ("net: switchdev: remove the transaction structure from port attributes")
Transaction parameter gets dropped otherwise keep the fix.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
The MT8183 display PWM device will not work until the associated
power-domain is enabled. Add the power-domain reference to the node
allows the display PWM driver to operate and the backlight turn on.
Fixes: f15722c0fe ("arm64: dts: mt8183: Add pwm and backlight node")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210113215723.71966-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add support for the variant of the Jetson Xavier NX Developer Kit that
has a system-on-module which includes an eMMC.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
There are two versions of the Jetson Xavier NX system-on-module; one
with a micro SD-card slot and one with an eMMC. Currently, only the
system-on-module with the micro SD-card slot is supported. Before adding
support for the eMMC variant, move the common device-tree parts of the
existing Jetson Xavier NX system-on-module board (p3668-0000) and
reference carrier board (p3509-0000) into include files that can be used
by both Jetson Xavier NX variants.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
property name must include only lowercase and '-'
Fixes: 91f9c963ce ("arm64: dts: mt8183: Add display nodes for MT8183")
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210128112314.1304160-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
We can use CPU specific pmu configuration to expose the appropriate
CPU specific events rather than just the basic generic pmuv3 perf
events.
Reported-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Tero Kristo <kristo@kernel.org>
Link: https://lore.kernel.org/r/20210120195145.32259-1-nm@ti.com
wrongly used dt properties and parts that shouldn't be enabled.
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Merge tag 'v5.11-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
Wrong irq number on px30 and cleanups of stuff on rk3399 regarding
wrongly used dt properties and parts that shouldn't be enabled.
* tag 'v5.11-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Disable display for NanoPi R2S
arm64: dts: rockchip: remove interrupt-names property from rk3399 vdec node
arm64: dts: rockchip: Fix PCIe DT properties on rk3399
arm64: dts: rockchip: Use only supported PCIe link speed on Pinebook Pro
arm64: dts: rockchip: fix vopl iommu irq on px30
Link: https://lore.kernel.org/r/5429065.DvuYhMxLoT@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
For the proper reboot Odroid-C4 board requires to switch TFLASH_VDD_EN
pin to the high impedance mode, otherwise the board is stuck in the
middle of loading early stages of the bootloader from SD card.
This can be achieved by using the OPEN_DRAIN flag instead of the
ACTIVE_HIGH, what will leave the pin in input mode to achieve high state
(pin has the pull-up) and solve the issue.
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Fixes: 326e57518b ("arm64: dts: meson-sm1: add support for Hardkernel ODROID-C4")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210122055218.27241-1-m.szyprowski@samsung.com
Remove SATA from Stingray as it is unsupported.
Acked-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
BCM4908 has internal switch with 5 GPHYs. Ports 0 - 3 are always
connected to the internal PHYs. Remaining ports depend on device setup.
Asus GT-AC5300 has an extra switch with its PHYs accessible using the
internal MDIO.
CPU port and Ethernet interface remain to be documented.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Enable support for audio-graph based sound card on Jetson-Nano and
Jetson-TX1. Depending on the platform, required I/O interfaces are
enabled.
* Jetson-Nano: Enable I2S3, I2S4, DMIC1 and DMIC2.
* Jetson-TX1: Enable all I2S and DMIC interfaces.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Expose a header which describes DT bindings required to use audio-graph
based sound card. All Tegra210 based platforms can include this header
and add platform specific information. Currently, from SoC point of view,
all links are exposed for ADMAIF, AHUB, I2S and DMIC components.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Device tree nodes are ordered by unit-address and alphabetically by name
if a node doesn't have a unit-address. The thermal sensor and timer
nodes were not sorted in the correct order, so do that now.
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit enables USB host mode at J512 type-C port of Jetson-Xavier.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
PMC driver provides USB sleepwalk registers access to XUSB PADCTL
driver. This commit adds a "nvidia,pmc" property which points to
PMC node to XUSB PADCTL device node.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
HDA initialization is failing occasionally on Tegra210 and following
print is observed in the boot log. Because of this probe() fails and
no sound card is registered.
[16.800802] tegra-hda 70030000.hda: no codecs found!
Codecs request a state change and enumeration by the controller. In
failure cases this does not seem to happen as STATETS register reads 0.
The problem seems to be related to the HDA codec dependency on SOR
power domain. If it is gated during HDA probe then the failure is
observed. Building Tegra HDA driver into kernel image avoids this
failure but does not completely address the dependency part. Fix this
problem by adding 'power-domains' DT property for Tegra210 HDA. Note
that Tegra186 and Tegra194 HDA do this already.
Fixes: 742af7e7a0 ("arm64: tegra: Add Tegra210 support")
Depends-on: 96d1f078ff ("arm64: tegra: Add SOR power-domain for Tegra210")
Cc: <stable@vger.kernel.org>
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This fixes a regression in Lenovo Yoga C630, where the touchpad in some
units stopped working, by re-enabling the "tsc2" device.
It also marks the LPASS related clocks as protected to allow DB845c and
the Lenovo Yoga C630 to boot even if CONFIG_SDM_LPASSCC_845 is enabled.
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Merge tag 'qcom-arm64-fixes-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm ARM64 fixes for 5.11
This fixes a regression in Lenovo Yoga C630, where the touchpad in some
units stopped working, by re-enabling the "tsc2" device.
It also marks the LPASS related clocks as protected to allow DB845c and
the Lenovo Yoga C630 to boot even if CONFIG_SDM_LPASSCC_845 is enabled.
* tag 'qcom-arm64-fixes-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: dts: qcom: sdm845: Reserve LPASS clocks in gcc
arm64: dts: qcom: c630: keep both touchpad devices enabled
Link: https://lore.kernel.org/r/20210125232039.642565-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
It has been reported on IRC and in KernelCI boot tests, this change breaks
internal PHY support on the Amlogic G12A/SM1 Based boards.
We suspect the added signal to reset more than the Ethernet MAC but also
the MDIO/(RG)MII mux used to redirect the MAC signals to the internal PHY.
This reverts commit f3362f0c18 while we find
and acceptable solution to cleanly reset the Ethernet MAC.
Reported-by: Corentin Labbe <clabbe@baylibre.com>
Acked-by: Jérôme Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210126080951.2383740-1-narmstrong@baylibre.com
NanoPi R2S is headless, so rightly does not enable any of the display
interface hardware, which currently provokes an obnoxious error in the
boot log from the fake DRM device failing to find anything to bind to.
It probably isn't *too* hard to obviate the fake device shenanigans
entirely with a bit of driver reshuffling, but for now let's just
disable it here to shut up the spurious error.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/c4553dfad1ad6792c4f22454c135ff55de77e2d6.1611186099.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The NanoPi M4B is a minor revision of the original M4.
The differences against the original Nanopi M4 that are common with the
other M4V2 revision include:
- microphone header removed
- power button added
- recovery button added
Additional changes specific to the M4B:
- USB 3.0 hub removed; board now has 2x USB 3.0 type-A ports and 2x
USB 2.0 ports
- ADB toggle switch added; this changes the top USB 3.0 host port to
a peripheral port
- Type-C port no longer supports data or PD
- WiFi/Bluetooth combo chip switched to AP6256, which supports BT 5.0
but only 1T1R (down from 2T2R) for WiFi
Add a new dts file for the new board revision that shows the difference
against the original.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20210121162321.4538-5-wens@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Only the NanoPC T4 hs the PCIe reset pin routed to the SoC. For the
NanoPi M4 family, no such signal is routed to the expansion header on
the base board.
As the schematics for the expansion board were not released, it is
unclear how this is handled, but the likely answer is that the signal
is always pulled high.
Move the ep-gpios property from the common nanopi4.dtsi file to the
board level nanopc-t4.dts file. This makes the nanopi-m4 lack ep-gpios,
matching the board design.
A companion patch "PCI: rockchip: make ep_gpio optional" for the Linux
driver is required, as the driver currently requires the property to be
present.
Fixes: e7a0959082 ("arm64: dts: rockchip: Add devicetree for NanoPC-T4")
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20210121162321.4538-4-wens@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds support for the following Xperias:
* Z3+ [aka Z4 in some regions] (Ivy)
* Z4 Tablet (Karin)
* Z4 Tablet Wi-Fi (Karin_windy) [APQ8094]
* Z5 Compact (Suzuran)
* Z5 Premium (Satsuki)
These devices are very similar in terms of hardware, with main
differences being display panels.
While at it, update comments describing hardware used:
SMB charger seems to not be used after all, PMI8994 charger
is in use instead.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
SCIF0 has been enabled by the firmware, so it worked already. Still, add
the proper nodes to make it work in any case.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121110008.15894-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This is the result of multiple patches taken from the BSP, combined,
rebased, and properly sorted. SCIF0 gets DMA properties, other SCIFs are
entirely new.
Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121110008.15894-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Define the generic parts of Ethernet-AVB device nodes. Only AVB0 was
tested because it was the only port with a PHY on current hardware.
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
[wsa: double checked, rebased, added "internal-delay" properties]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121100619.5653-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Some SDHI instances are solely used for eMMC. Disable SD and SDIO
for faster initialization.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Adam Ford <aford173@gmail.com> (beacon)
Link: https://lore.kernel.org/r/20210119133322.87289-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The thermal devicetree binding requires the "-thermal" suffix for all
thermal zones. Hence, add the missing suffix for PMIC based thermal
zones.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-8-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Now the dtbs_check produces below warnings
sdhci@4f80000: clock-names:0: 'clk_ahb' was expected
sdhci@4f80000: clock-names:1: 'clk_xin' was expected
$nodename:0: 'sdhci@4f80000' does not match '^mmc(@.*)?$'
Fix above warnings by updating mmc DT definitions to follow
sdhci-am654.yaml bindings:
- rename sdhci dt nodes to 'mmc@'
- swap clk_xin/clk_ahb clocks, the clk_ahb clock expected to be defined
first
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20210115193016.5581-1-grygorii.strashko@ti.com
The "modem-remoteproc" property is no longer required for the IPA
driver, so get rid of it.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
The "modem-remoteproc" property is no longer required for the IPA
driver, so get rid of it.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Add the registers and clock for the Inline Crypto Engine (ICE) to the
device tree node for the sdhci-msm host controller on sdm630. This
allows sdhci-msm to support inline encryption on sdm630.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20210121090140.326380-9-ebiggers@kernel.org
[bjorn: Changed indentation]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Port thermal zones definitions from msm-4.19 tree. Enable and add
channel configuration to PMIC's ADC-TM definitions. Declare thermal
zones and respective trip points.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210119054848.592329-5-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The commit 3eb619b2f7 ("scripts/dtc: Update to upstream version
v1.6.0-11-g9d7888cbf19c") updated dtc version which also contained DTC
commit
"81e0919a3e21 checks: Add interrupt provider test"
where reasons for this checking are mentioned as
"A missing #address-cells property is less critical, but creates
ambiguities when used in interrupt-map properties, so warn about this as
well now."
That's why add address-cells property to gic and gpio nodes to get rid of
this warning.
CC: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e4f54ddce33b79a783aa7c76e0dc6e9787933610.1606918493.git.michal.simek@xilinx.com
In commit 208921bae6 ("arm64: dts: qcom: pmi8998: Add nodes for
LAB and IBB regulators") bindings for the lab/ibb regulators were
added to the pmi8998 dt, but the original committer has never
specified what the interrupts were for.
LAB and IBB regulators provide two interrupts, SC-ERR (short
circuit error) and VREG-OK but, in that commit, the regulators
were provided with two different types of interrupts;
specifically, IBB had the SC-ERR interrupt, while LAB had the
VREG-OK one, none of which were (luckily) used, since the driver
didn't actually use these at all.
Assuming that the original intention was to have the SC IRQ in
both LAB and IBB, as per the names appearing in documentation,
fix the SCP interrupt.
While at it, also add the OCP interrupt in order to be able to
enable the Over-Current Protection feature, if requested.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210119174421.226541-8-angelogioacchino.delregno@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The ZTE ZX set-top-box SoC platform was added in 2015 by Jun Nie, with
Baoyou Xie and Shawn Guo subsequently becoming maintainers after the
addition of the 64-bit variant.
However, the only machines that were ever supported upstream are the
reference designs, not actual set-top-box devices that would benefit
from this support. All ZTE set-top-boxes from the past few years seem
to be based on third-party SoCs. While there is very little information
about zx296702 and zx296718 on the web, I found some references to other
chips from the same family, such as zx296716 and zx296719, which were
never submitted for upstream support. Finally, there is no support for
the GPU on either of them, with the lima and panfrost device drivers
having been added after work on the zx platform had stopped.
Shawn confirmed that he has not seen any interest in this platform for
the past four years, and that it can be removed.
Thanks to Jun and Shawn for maintaining this platform over the past
five years.
Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Switch reset pin of ov8856 node from GPIO_ACTIVE_HIGH to GPIO_ACTIVE_LOW,
this issue prevented the ov8856 from probing properly as it did not respon
to I2C messages.
Fixes: d4919a4456 ("arm64: dts: qcom: sdm845-db845c: Add ov8856 & ov7251
camera nodes")
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://lore.kernel.org/r/20201221100955.148584-1-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
A test with the command below gives this error:
/arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: video-codec@ff660000:
'interrupt-names' does not match any of the regexes: 'pinctrl-[0-9]+'
The rkvdec driver gets it irq with help of the platform_get_irq()
function, so remove the interrupt-names property from the rk3399
vdec node.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/
media/rockchip,vdec.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210117181653.24886-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Radxa ROCK Pi E is a router oriented SBC based on Rockchip's RK3328 SoC.
As the official wiki page puts it, "E for Ethernets".
It features the RK3328 SoC, gigabit and fast Ethernet RJ45 ports, both
directly served by Ethernet controllers in the SoC, a USB 3.0 host port,
a power-only USB type-C port, a 3.5mm headphone jack for audio output,
two LEDs, a 40-pin Raspberry Pi style GPIO header, and optional WiFi+BT
and PoE header.
The board comes in multiple configurations, differing in the amount of
onboard RAM, the level of WiFi+BT (none, 802.11n 2.4GHz, or 802.11ac
2.4 GHz & 5 GHz), and whether PoE is supported or not. These variants
can all share the same device tree.
The USB 2.0 OTG controller is available on the 40-pin header. This is
not enabled in the device tree, since it is possible to use it in a
host-only configuration, or in OTG mode with an extra pin from the
header as the ID pin.
The device tree is based on the one of the Rock64, with various parts
modified to match the ROCK Pi E, and some parts updated to newer styles,
such as the gmac2io node's mdio sub-node.
Add a new device tree file for the new board.
The voltages for the adc-keys were selected to have some tolerances for
resistor variances and the ADC itself also causing voltage drops. Since
the recover button is the only button on the adc line, this should not
cause any issues.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20210117100710.4857-4-wens@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The gmac2phy is integrated with the PHY within the SoC. Any properties
related to this integration can be included in the .dtsi file, instead
of having board dts files specify them separately.
Add the clock_in_out property to specify the direction of the PHY clock.
This is the minimum required to have gmac2phy working on Linux. Other
examples include assigned-clocks, assigned-clock-rates, and
assigned-clock-parents properties, but the hardware default plus the
implementation requesting the appropriate clock rate also works.
Fixes: 9c4cc910fe ("ARM64: dts: rockchip: Add gmac2phy node support for rk3328")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20210117100710.4857-2-wens@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives for example this error:
/arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml:
thermal-zones: 'cpu', 'gpu' do not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+'
Rename Rockchip rk3399 thermal subnodes so that it ends
with "-thermal"
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/
thermal/thermal-zones.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210117150953.16475-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives for example this error:
/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dt.yaml:
thermal-zones: 'cpu', 'gpu' do not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+'
Make the rk3368 thermal subnode names in line with the rest of
the Rockchip dts files. Add a label and rename them so that it ends
with "-thermal"
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/
thermal/thermal-zones.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210117150953.16475-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add mac address in efuse, so that FEC driver can parse it from nvmem
cell.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
CLK_ENET_TIMER assigned clocks twice, should be a typo, correct to
CLK_ENET_PHY_REF clock.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The pwm-backlight binding requires a power supply. Make sure we provide
one.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-7-maxime@cerno.tech
According to the LED bindings, the LED node names are supposed to be led
plus an optional suffix. Let's fix our users to use that new scheme.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20210114113538.1233933-6-maxime@cerno.tech
Add device nodes for the Clock-Synchronized Serial Interface with
FIFO (MSIOF) instances on the Renesas R-Car V3U (r8a779a0) SoC.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210108104345.2026857-1-geert+renesas@glider.be
On i.MX8MP, The GPIO3's secondary gpio-ranges's 'gpio controller offset'
cell value should be 26, so correct it.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Fixes: 6d9b8d2043 ("arm64: dts: freescale: Add i.MX8MP dtsi support")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that we have a proper driver for the FlexSPI interface use it. This
will fix SCK frequency switching on Layerscape SoCs.
This was tested on the Kontron sl28 board.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The H6 SoC contains an undocumented but fully functional RSB controller.
Add support for it. The MMIO register address matches other SoCs of the
same generation, and the IRQ matches a hole in the documented IRQ list.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
[wens@csie.org: Use raw numbers instead of macros for clock/reset index]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
