The AudioSS block on Exynos 5420 has an additional clock gate for the
ADMA bus clock.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
There is no gate for the PCM clock input to the AudioSS block, so
the parent of sclk_pcm is div_pcm0. Add a clock ID for it so that
we can reference it in device trees.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
The patch adds header file defining clock IDs.
This allows to use macros instead of magic numbers in DT bindings.
Signed-off-by: Andrzej Hajda <a.hajda-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Kyungmin Park <kyungmin.park-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
The patch adds header file defining clock IDs.
This allows to use macros instead of magic numbers in DT bindings.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
The patch adds header file defining clock IDs.
This allows to use macros instead of magic numbers in DT bindings.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
The patch adds header file defining clock IDs.
This allows to use macros instead of magic numbers in DT bindings.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
As we have one to three pinctrl-single instances for each SoC it is
a bit confusing to configure the padconf register offset from the
base of the padconf register base.
Let's add macros that allow using the physical address of the
padconf register directly, or in most cases, just the last 16-bits
of the address as they are shown in the documentation.
Note that most documentation shows two padconf registers for each
32-bit address, so adding 2 to the documentation address is needed for
the second padconf register as we treat them as 16-bit registers
for omap3+.
For example, omap36xx documentation shows sdmmc2_clk at 0x48002158,
so we can just use the last 16-bits of that value:
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)
...
>;
And we don't need to separately calculate the offset from the 0x2030
base:
pinctrl-single,pins = <
0x128 (PIN_INPUT_PULLUP | MUX_MODE0)
...
>;
Naturally both ways of defining the registers can be used, and I'm
not saying we should replace all the existing defines. But it may
be handy to use these macros for new entries and when doing other
related .dts file clean-up.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
[tony@atomide.com: updated for 3430 vs 3630 core2 range]
Signed-off-by: Tony Lindgren <tony@atomide.com>
- Add the initial i.MX50 SoC support
- Support device tree boot for i.MX35
- Move imx5 clock driver to use macros for clock ID
- Some random updates and non-critical fixes on clock drivers
- A few defconfig updates and minor cleanups
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJSwiPBAAoJEFBXWFqHsHzO3/AIALlP6m/7taIQW5wO4o4aqdwk
GsN7IdsfWH/biG9VyxgpIoJKUqaOJckGA0eyLSeEG7p78xlf0n7cVPUNwzz9z1Vc
zxLSaVNznVOa4fTIsbMK9U+gUP931hjXskxD3tH98MUFqlM0JLQYoofr/lXG7Esf
N2p8B9aUND3WSxDa+d+CsW0B3FBj1piOQDMDgrdc3p7kjcAJs31KaKfUa06o7gzM
a81OaD9Vk0ONf44wh1LGlg0hDRsatQOa4tUTimeV14CnESKqsKxT4qAJ6pZLdfOt
KyRqSk4f4mkpimv4bGdhXTIsIko1CD9wg7G9fsSaolh3OEP0yyNf1savR1fmwCI=
=Hhbl
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo:
i.MX SoC changes for 3.14:
- Add the initial i.MX50 SoC support
- Support device tree boot for i.MX35
- Move imx5 clock driver to use macros for clock ID
- Some random updates and non-critical fixes on clock drivers
- A few defconfig updates and minor cleanups
* tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6: (37 commits)
ARM: imx: improve the comment of CCM lpm SW workaround
ARM: imx: improve status check of clock gate
ARM: imx: add necessary interface for pfd
ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100
ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support
ARM: imx: Add cpu frequency scaling support
ARM i.MX35: Add devicetree support.
ARM: imx: update imx_v6_v7_defconfig
ARM: imx6sl: Add missing spba clock to clock tree
ARM: imx6sl: Add missing pll4_audio_div to the clock tree
ARM: imx6: Derive spdif clock from pll3_pfd3_454m
ARM: imx: use __initconst for const init definition
ARM i.MX5: fix obvious typo in ldb_di0_gate clk definition
ARM i.MX5: set CAN peripheral clock to 24 MHz parent
ARM: imx: pllv1: Fix PLL calculation for i.MX27
ARM i.MX5: fix "shift" value for lp_apm_sel on i.MX50 and i.MX53
ARM: imx: imx53: Add SATA PHY clock
ARM: imx_v6_v7_defconfig: Enable STMPE touchscreen
ARM: imx: rename IMX6SL_CLK_CLK_END to IMX6SL_CLK_END
ARM: imx: select PINCTRL at sub-architecure level
...
Signed-off-by: Olof Johansson <olof@lixom.net>
We are missing spba clock in imx6sl's clock tree, thus add it.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add SATA PHY clock which are derived from the USB PHY1 clock. Note that this
patch derives the SATA PHY clock from USB PHY1 clock gate so that the SATA
driver can ungate both the SATA PHY clock and USB PHY1 clock for the SATA to
work correctly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Linux-IDE <linux-ide@vger.kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Use clock defines in order to make devicetrees more
human readable.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This branch contains all the changes to Tegra's device tree. The
highlights are:
* Many patches for Tegra124 SoC support, and the Venice2 board which
uses that SoC.
* Conversion to use more headers providing named constants for pinctrl
and key codes, which improves readability.
* A few cleanups.
This branch is based on tag tegra-for-3.14-dmas-resets-rework in order
to avoid conflicts with the DT changes required to use the common
bindings for DMAs and resets.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSr3KtAAoJEMzrak5tbycxWpIP/A1zpgEBb8f0k/6aBRmiKisW
G97QGbKVGL9ZJzi/CC12nD68URwN8mVfSRn9d+r7jN5zcEh+RAnCflj6LzX5c0nV
XZndE9GnnpqpbsoWY+ubDPRvJnG2ZWPciMoR1p/ftNOHweELPG/5qTCoZLvi3abI
7L0EzMcNY6pC5RB0unCkTHWbmCsgTjDFQ0UI/iKJy+WYzSt0YLFW7TCMkEUBDfcg
ElD2qhNYEZI5eRWO/ccl5lsoBwg47YSCXFti1rAZEyp7/SXRGm7gbdW0d/UpywoY
66V2GMP6mHeAMk6RFHSo1R2XGP5uxTY/n9UThtX5YuKTFYUwy541+xK4qWlVlpf+
SIukOFbHexPqvBbZWSB7lgdUemh2Cw/RTSDkp//hAHDcxMN5exjswgJIo9eIjzdi
W78JaBZVBmsfJx+jEan6kNTV0TEbNLLnEhDdulLZjF2XxbGcWsYeJa3BmEGP8Lf1
VlzEOMXCkbar9kO8nJxCLXCK7JFR+GGZr2pF0hV9PIjrAao67INqDZpXvIZg5TnB
aNoT+vzO19AoA7vj/aGmjVoahr/U3z+wFeHWoWyagq2Kxmx8RdYuV8IAo7CK9wo0
ok6J/MSdqq8WZYhIA/5BZffSl0RrlY2fHOpj3Jga72fjzgoH4BGmUQaWrHjQlzhh
uqLwJymOSLsFIUD6itof
=3M5I
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.14-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
From Stephen Warren:
ARM: tegra: device tree changes
This branch contains all the changes to Tegra's device tree. The
highlights are:
* Many patches for Tegra124 SoC support, and the Venice2 board which
uses that SoC.
* Conversion to use more headers providing named constants for pinctrl
and key codes, which improves readability.
* A few cleanups.
This branch is based on tag tegra-for-3.14-dmas-resets-rework in order
to avoid conflicts with the DT changes required to use the common
bindings for DMAs and resets.
* tag 'tegra-for-3.14-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (24 commits)
ARM: tegra: Add SPI controller nodes for Tegra124
ARM: tegra: Fix misconfiguration of pin PH2 on Venice2
ARM: tegra: fix pinctrl misconfiguration on Venice2
ARM: tegra: add default pinctrl nodes for Venice2
ARM: tegra: correct Colibri T20 regulator settings
ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines
ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl defines
ARM: tegra: convert dts files of Tegra114 platforms to use pinctrl defines
ARM: tegra: Add header file for pinctrl constants
ARM: tegra: convert device tree files to use key defines
ARM: tegra: Enable PWM on Venice2
ARM: tegra: Add Tegra124 PWM support
ARM: tegra: add sound card to Venice2 DT
ARM: tegra: add audio-related device to Tegra124 DT
ARM: tegra: enable I2C controllers on Venice2
ARM: tegra: add I2C controllers to Tegra124 DT
ARM: tegra: add MMC controllers to Tegra124 DT
ARM: tegra: add Tegra124 pinmux node to DT
ARM: tegra: add APB DMA controller to Tegra124 DT
ARM: tegra: add reset properties to Tegra124 DTs
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Bringing in the tegra dma/reset framework cleanup as a base for the DT changes.
* tegra/dma-reset-rework: (320 commits)
spi: tegra: checking for ERR_PTR instead of NULL
ASoC: tegra: update module reset list for Tegra124
clk: tegra: remove bogus PCIE_XCLK
clk: tegra: remove legacy reset APIs
ARM: tegra: remove legacy DMA entries from DT
ARM: tegra: remove legacy clock entries from DT
USB: EHCI: tegra: use reset framework
Input: tegra-kbc - use reset framework
serial: tegra: convert to standard DMA DT bindings
serial: tegra: use reset framework
spi: tegra: convert to standard DMA DT bindings
spi: tegra: use reset framework
staging: nvec: use reset framework
i2c: tegra: use reset framework
ASoC: tegra: convert to standard DMA DT bindings
ASoC: tegra: allocate AHUB FIFO during probe() not startup()
ASoC: tegra: call pm_runtime APIs around register accesses
ASoC: tegra: use reset framework
dma: tegra: register as an OF DMA controller
dma: tegra: use reset framework
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This series converts the Tegra DTs and drivers to use the common/
standard DMA and reset bindings, rather than custom bindings. It also
adds complete documentation for the Tegra clock bindings without
actually changing any binding definitions.
This conversion relies on a few sets of patches in branches from outside
the Tegra tree:
1) A patch to add an DMA channel request API which allows deferred probe
to be implemented.
2) A patch to implement a common part of the of_xlate function for DMA
controllers.
3) Some ASoC patches (which in turn rely on (1) above), which support
deferred probe during DMA channel allocation.
4) The Tegra clock driver changes for 3.14.
Consequently, this branch is based on a merge of all of those external
branches.
In turn, this branch is or will be pulled into a few places that either
rely on features introduced here, or would otherwise conflict with the
patches:
a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid
conflicts.
b) The DRM tree, which introduces new code that relies on the reset
controller framework introduced in this branch, and to avoid
conflicts.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSr3AnAAoJEMzrak5tbycxfMwQAMeffTFreJqDiQ4Vj0XmuhSn
RFlXiZQsWtQ6gGgNfKyDsXzDMaz1KDAabcUYRcZwrluxuSCPBcK1JirCj5R8uRY7
LDZFX92CO8zRgiij0mhgokV4zzuEQ56q1uhPxqI3o+wG3v44jlMSMgFHQJUevdET
aKr2Pss8Hb00XDztnpxprs6FUoU/W99NRH0i/5znbBwuHqYFP37zlKe2MRwbqDwR
AMgkrnGoawe85Stz4p/iR9pCLpAMa0dH94V4JrAP4+IQrl0DEKWbrolpQHii4gzh
NCGazMELTqkaZaorC/n1SmczH1kTj4vcjbbmeB8dwS8Vqhr+uf7W1oLlJ46TUOsp
ESO0uD2GfpHKQQwLxEfgjfmwsIUMbdWHef8f2HUuvl6Js+LCpaPkxd52Pt/qL4sU
0sKqTbldRZXzGhvwa0/MK32WhmH4v31s7IZAg5A2YxqDR6yWryl7legWyvrI96C0
OlmVe1C/2NGk0QCfK0G/xTa9V7YzMfj8k4ICSZOgUoF4BeGGj6d3svWvLbKbbrU1
0fVvR7aCm78pRXixI6kURpj9D0mEfqus9Hx7VoWcL0TS4QH2dSYlGI+jDCiliQmj
+kWrZWHsASSvPmUZk4RBNaviCbnGU8/t5nNdJSdFIUM/PIswzZ4GaAu6gdVksIY8
hcx410PyAzTZL2lENamE
=8T7+
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup
From Stephen Warren:
ARM: tegra: implement common DMA and resets DT bindings
This series converts the Tegra DTs and drivers to use the common/
standard DMA and reset bindings, rather than custom bindings. It also
adds complete documentation for the Tegra clock bindings without
actually changing any binding definitions.
This conversion relies on a few sets of patches in branches from outside
the Tegra tree:
1) A patch to add an DMA channel request API which allows deferred probe
to be implemented.
2) A patch to implement a common part of the of_xlate function for DMA
controllers.
3) Some ASoC patches (which in turn rely on (1) above), which support
deferred probe during DMA channel allocation.
4) The Tegra clock driver changes for 3.14.
Consequently, this branch is based on a merge of all of those external
branches.
In turn, this branch is or will be pulled into a few places that either
rely on features introduced here, or would otherwise conflict with the
patches:
a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid
conflicts.
b) The DRM tree, which introduces new code that relies on the reset
controller framework introduced in this branch, and to avoid
conflicts.
* tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits)
spi: tegra: checking for ERR_PTR instead of NULL
ASoC: tegra: update module reset list for Tegra124
clk: tegra: remove bogus PCIE_XCLK
clk: tegra: remove legacy reset APIs
ARM: tegra: remove legacy DMA entries from DT
ARM: tegra: remove legacy clock entries from DT
USB: EHCI: tegra: use reset framework
Input: tegra-kbc - use reset framework
serial: tegra: convert to standard DMA DT bindings
serial: tegra: use reset framework
spi: tegra: convert to standard DMA DT bindings
spi: tegra: use reset framework
staging: nvec: use reset framework
i2c: tegra: use reset framework
ASoC: tegra: convert to standard DMA DT bindings
ASoC: tegra: allocate AHUB FIFO during probe() not startup()
ASoC: tegra: call pm_runtime APIs around register accesses
ASoC: tegra: use reset framework
dma: tegra: register as an OF DMA controller
dma: tegra: use reset framework
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Merging in external dependencies for the Tegra DMA and reset controller
refactoring from external trees.
Per Stephen Warren, the stability of these branches have been negotiated
with the relevant parties (Vinod/Mark/Mike)
* depends/asoc-dma:
ASoC: dmaengine: fix deferred probe detection
ASoC: dmaengine: support deferred probe for DMA channels
dma: add channel request API that supports deferred probe
ASoC: dmaengine: add custom DMA config to snd_dmaengine_pcm_config
ASoC: don't leak on error in snd_dmaengine_pcm_register
ASoC: restructure dmaengine_pcm_request_chan_of()
ASoC: generic-dmaengine-pcm: Set BATCH flag when residue reporting is not supported
ASoC: Add resource managed snd_dmaengine_pcm_register()
* depends/dma-of:
dma: add dma_get_any_slave_channel(), for use in of_xlate()
* depends/tegra-clk: (42 commits)
clk: tegra: fix __clk_lookup() return value checks
clk: tegra: Do not print errors for clk_round_rate()
clk: tegra: Initialize DSI low-power clocks
clk: tegra: add FUSE clock device
clk: tegra: Properly setup PWM clock on Tegra30
clk: tegra: Initialize secondary gr3d clock on Tegra30
clk: tegra114: Initialize clocks needed for HDMI
clk: tegra124: add suspend/resume function for tegra_cpu_car_ops
clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_ops
clk: tegra124: Add support for Tegra124 clocks
clk: tegra124: Add new peripheral clocks
clk: tegra124: Add common clk IDs to clk-id.h
clk: tegra: add TEGRA_PERIPH_NO_GATE
clk: tegra: add locking to periph clks
clk: tegra: Add periph regs bank X
clk: tegra: Add support for PLLSS
clk: tegra: move tegra20 to common infra
clk: tegra: move tegra30 to common infra
clk: tegra: introduce common gen4 super clock
clk: tegra: move PMC, fixed clocks to common files
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This reverts commit b652896b02.
Unfortunately this commit prevents multiplatform from booting to
the point where a serial console is available. Revert it while
a solution is sought.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This reverts commit 6dea2c1ebc.
Unfortunately this commit prevents multiplatform from booting to
the point where a serial console is available. Revert it while
a solution is sought.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add macros usable by device tree sources to reference r8a7791 clocks by
index.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add macros usable by device tree sources to reference r8a7790 clocks by
index.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This new header file defines pincontrol constants for Tegra to
use from Tegra's DTS file for pincontrol properties option.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
NVIDIA Tegra124 supports has the new GPIO port as GPIO_FF.
Add the macro for this port name.
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The "pcie_xclk" clock is not actually a clock at all, but rather a reset
domain. Now that the custom Tegra module reset API has been removed, we
can remove the definition of any "clocks" that existed solely to support
it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
This patch introduces a device tree bindings for
describing the hardware thermal behavior and limits.
Also a parser to read and interpret the data and feed
it in the thermal framework is presented.
This patch introduces a thermal data parser for device
tree. The parsed data is used to build thermal zones
and thermal binding parameters. The output data
can then be used to deploy thermal policies.
This patch adds also documentation regarding this
API and how to define tree nodes to use
this infrastructure.
Note that, in order to be able to have control
on the sensor registration on the DT thermal zone,
it was required to allow changing the thermal zone
.get_temp callback. For this reason, this patch
also removes the 'const' modifier from the .ops
field of thermal zone devices.
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Enable common clock driver of Hi3620 SoC. clkgate-seperated driver is
used to support the clock gate that enable/disable/status registers
are seperated.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
This patch adds a new macro file for PMC macros.
This macro file includes the definitions of SR (status register) bit
offsets and will be use to reference PMC irqs.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
These clocks were named gr2d and gr3d on Tegra20 and Tegra30, so use the
same names on Tegra114 for consistency.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
commit 992bb598f6 forgot to move dfll_soc and
dfll_ref to include/dt-bindings/clock/tegra114-car.h. Add them again in this
patch as TEGRA114_CLK_DFLL_SOC and TEGRA114_CLK_DFLL_REF.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
AS3722 PMIC and for STMicroelectronics STw481x PMIC.
Although this is a smaller update than usual, we also have:
- Device tree support for the max77693 driver.
- linux/of.h inclusion for all DT compatible MFD drivers, to avoid build
breakage in the future.
- Support for Intel Wildcat Point-LP PCH through the lpc_ich driver.
- A small arizona update for new wm5110 DSP registers and a few fixes.
- A small palmas update as well, including an of_device table addition
and a few minor fixes.
- Two small mfd-core changes, one including a memory leak fix for when
mfd_add_device() fails.
- Our usual round of minor cleanups and janitorial fixes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
iQIcBAABAgAGBQJShjufAAoJEIqAPN1PVmxKRoEP/jKe0UgrNA6G4xHSPX1Xcktc
/kaQdcwJcTTHMpkIyQPFayItCcBPyb8bN1SdrQs4sds4ut7xyjve2uHz0KpZI6JO
F+Rh6UVNkUIbcEx3jfh0DDv3pHv0vryFPnerkOIr0TFmSF1Tj29dRORQzpEqZ2fZ
rstxmxNTG0ggP0Ug4ivv/YWjhGmO9CvKePJzQyImrC8QWCRDiARu072bG8xhVyHZ
PkJTzJr2kjkI3whIY7Z04Nx90AtpikM4G27JiCwsHyv4vCCOtTtC9lRYb/IBUHWJ
UhJiPvTygsU63opGOyAodR9LJxta0UCWm2Qn71ZuBAJmQ4oFxdZ7iVkWePjeSF5U
2Jx9dUi1UWJQNCSB8HEpaUExybXdsNTwnSw8NIb6Gg2kygClj5KvzPMwz3ZHRKU/
Ef1TGpWTeuok0zOijhBDUqAhq4KQv/H9Xjbm8FIMSBVGQgRBT3dkYTRZv30deeg/
SIzoJGg7QiMDwlu/33k7aX7aIwJA2r6st/Q3OUKp/aBVqd6i24rL5+ZMykqcx5HJ
x9GnvjrHgz+nAgF2yU6KQT1FrX1IQEM4F1tgMtroXQcCAGgoWoJRjW82gQqp6NE+
eVbvsE56z2MiSNbiYUL4hdC03b/z8LbzP1zEt95Xc+sOf7NewMHYln7XkByBxrPH
tlR20ZV44W25s7DYg7xh
=nQ/p
-----END PGP SIGNATURE-----
Merge tag 'mfd-3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-next
Pull MFD updates from Samuel Ortiz:
"For the 3.13 merge window we have a couple of new drivers for the AMS
AS3722 PMIC and for STMicroelectronics STw481x PMIC.
Although this is a smaller update than usual, we also have:
- Device tree support for the max77693 driver
- linux/of.h inclusion for all DT compatible MFD drivers, to avoid
build breakage in the future
- Support for Intel Wildcat Point-LP PCH through the lpc_ich driver
- A small arizona update for new wm5110 DSP registers and a few fixes
- A small palmas update as well, including an of_device table
addition and a few minor fixes
- Two small mfd-core changes, one including a memory leak fix for
when mfd_add_device() fails
- Our usual round of minor cleanups and janitorial fixes"
* tag 'mfd-3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-next: (63 commits)
Documentation: mfd: Update s2mps11.txt
mfd: pm8921: Potential NULL dereference in pm8921_remove()
mfd: Fix memory leak in mfd_add_devices()
mfd: Stop setting refcounting pointers in original mfd_cell arrays
mfd: wm5110: Enable micd clamp functionality
mfd: lpc_ich: Add Device IDs for Intel Wildcat Point-LP PCH
mfd: max77693: Fix up bug of wrong interrupt number
mfd: as3722: Don't export the regmap config
mfd: twl6040: Remove obsolete cleanup for i2c clientdata
mfd: tps65910: Remove warning during dt node parsing
mfd: lpc_sch: Ignore resource conflicts when adding mfd cells
mfd: ti_am335x_tscadc: Avoid possible deadlock of reg_lock
mfd: syscon: Return -ENOSYS if CONFIG_MFD_SYSCON is not enabled
mfd: Add support for ams AS3722 PMIC
mfd: max77693: Include linux/of.h header
mfd: tc3589x: Detect the precise version
mfd: omap-usb: prepare/unprepare clock while enable/disable
mfd: max77686: Include linux/of.h header
mfd: max8907: Include linux/of.h header
mfd: max8997: Include linux/of.h header
...
bug fixes along with updates to existing clock drivers and the
additional of new clock drivers.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJSgXEHAAoJEDqPOy9afJhJpp4P+gLir1FJsFiD9gK6UmRU2QZ6
zUBAyIyvuIOnXKRAPYD88C2d86ztaH0fMoyd3VBjrqCobS2ybTWCd0u28xsKEFZN
30GkvUYH+mOYaI73u9Q1onHH5qNpfvJAkv+dbXv+BWutzd4ygTjzB1dKSYRL3RtP
2YikqvWzvICJ+P5Med2YKDfE1BkEsA/BDCdynUOdABH4xSG+AI+/2P7TbHGz0bQC
odyT4eh0uA5IlkeOtG8243ysM/u287bJnvBkFzQKkdcv1ZoNWyIytgfpSqldcYCv
bf7OfgQPXqoIUqTlcjxbSyDxH1rBj0hHH2J4Hc+vlVixnu8in4XMjTEN8wJRqH94
W1wbxGM8v7fVj4OgJf//bjXWDZgr692o444ACvv3GHTT1RTD4WwBg9ouJ7faREeQ
06/tJsfgZ7bRaCLKWrdabGxgjUudj8vfGXjnL3DJjztEQEtp9lWuT84phU0kvcH/
JpxDfkxynZSbCHMHiOYAFP2bQjwCisU4vJrNo2jvYARVgGSfbkP9rncXaVjEMQVB
3gsJs9IRRCFTOVJiVVyWjWILPigDl96/pTDEEp33cvAOLHCLsa6RSYXnd+fY7h+W
0iNEuTTmZT3B3bTGMGx7c6beSppgiUFkvpH1KaKwnZI3d4TCutrPOwfzUFe8ULX+
LJzWqln7g/cRfQvmv0US
=wBeW
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus-3.13' of git://git.linaro.org/people/mturquette/linux
Pull clock framework changes from Mike Turquette:
"The clock changes for 3.13 are an even mix of framework improvements &
bug fixes along with updates to existing clock drivers and the
additional of new clock drivers"
* tag 'clk-for-linus-3.13' of git://git.linaro.org/people/mturquette/linux:
clk: new driver for efm32 SoC
clk: of: helper for determining number of parent clocks
clk/zynq: Fix possible memory leak
clk: keystone: Build Keystone clock drivers
clk: keystone: Add gate control clock driver
clk: keystone: add Keystone PLL clock driver
Documentation: Add documentation for APM X-Gene clock binding
clk: arm64: Add DTS clock entry for APM X-Gene Storm SoC
clk: Add APM X-Gene SoC clock driver
clk: wm831x: get rid of the implementation of remove function
clk: Correct lookup logic in clk_fetch_parent_index()
clk: Use kcalloc() to allocate arrays
clk: Add error handling to clk_fetch_parent_index()
- Blackfin ADI pin control driver, we move yet another
architecture under this subsystem umbrella.
- Incremental updates to the Renesas Super-H PFC pin control
driver. New subdriver for the r8a7791 SoC.
- Non-linear GPIO ranges from the gpiolib side of things,
this enabled simplified device tree bindings by referring
entire groups of pins on some pin controller to act as
back-end for a certain GPIO-chip driver.
- Add the Abilis TB10x pin control driver used on the ARC
architecture. Also the corresponding GPIO driver is merged
through this tree, so the ARC has full support for pins
and GPIOs after this.
- Subdrivers for Freescale i.MX1, i.MX27 and i.MX50 pin
controller instances. The i.MX1 and i.MX27 is an entirely
new family (silicon) of controllers whereas i.MX50 is
a variant of the previous supported controller.
- Then the usual slew of fixes, cleanups and incremental
updates.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
iQIcBAABAgAGBQJSgHrbAAoJEEEQszewGV1zX/gP/R4mAl5rixzu7RDC0nlUHz2S
F7zf3nhtsAM9GnvJjh9lE43nrisDdCnnBMFeqb7fEr3sp3j+BjQZLp4w/gbkakfY
6xx6dQ+1+fGojd/gqZI9Le6afpBasAz2E8trariOXW5TmET9ai1y9JCmE2l9K3xA
jX3h138iUZ4SihBW7c/Ib46TWfe7vaeAF0WKpfNie/uMHYyc+nXQXNNvtzxtk+N3
+MMuxr9io+d3OyORHD5PlbwWs+jhEPKXfy/isudlkeGbPrA+CMxTCmRc5iu8AvTv
L0wE6FnBhrdbTUHp9fGmdo1sxmIsijYbbc16yVQOn5kAr/hZvmltjV8efBytEep/
268ruds2l3TWypaPotuj8Z3Fxm0Jr/+tcQ9Ck8CTMdrGG3J5D78U8fLwVKTcfzJ5
QjaG0c39MYBbDPO29wfr93MJF7BoNm0D4AyypOCQiH17jL0Q7sXMpeW2WYqlgFf7
uIWnN3Vsh5V4DcYSCrXoHtts1Wn7i8QEkjyj5gQYvXBU47vGToX5xO6Llvr34lVV
VGMhivC3f5Z1UmTImwhi+FkfdDVwBYEuiAo3J9ezGvls4Ywq4AjZV/QZB563CztE
riZ/Xpw3djrxMLKMjGvebTRGpFHcVoh9XV3FetIk+2SCyK7DK1jyYRE1+tvKudAF
TEIV8476kb7xIVbKt8Oy
=z9SM
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Main pin control pull request for the v3.13 cycle.
The changes hitting arch/blackfin are ACKed by the Blackfin
maintainer, and the device tree bindings are ACKed to the extent
possible by someone from the device tree maintainers group.
- Blackfin ADI pin control driver, we move yet another architecture
under this subsystem umbrella.
- Incremental updates to the Renesas Super-H PFC pin control driver.
New subdriver for the r8a7791 SoC.
- Non-linear GPIO ranges from the gpiolib side of things, this
enabled simplified device tree bindings by referring entire groups
of pins on some pin controller to act as back-end for a certain
GPIO-chip driver.
- Add the Abilis TB10x pin control driver used on the ARC
architecture. Also the corresponding GPIO driver is merged through
this tree, so the ARC has full support for pins and GPIOs after
this.
- Subdrivers for Freescale i.MX1, i.MX27 and i.MX50 pin controller
instances. The i.MX1 and i.MX27 is an entirely new family
(silicon) of controllers whereas i.MX50 is a variant of the
previous supported controller.
- Then the usual slew of fixes, cleanups and incremental updates"
The ARC DT changes are apparently still pending, that hopefully gets
sorted out in a timely manner.
* tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits)
pinctrl: imx50: add pinctrl support code for the IMX50 SoC
pinctrl: at91: copy define to driver
pinctrl: remove minor dead code
pinctrl: imx: fix using pin->input_val wrongly
pinctrl: imx1: fix return value check in imx1_pinctrl_core_probe()
gpio: tb10x: fix return value check in tb10x_gpio_probe()
gpio: tb10x: use module_platform_driver to simplify the code
pinctrl: imx27: imx27 pincontrol driver
pinctrl: imx1 core driver
pinctrl: sh-pfc: r8a7791 PFC support
sh-pfc: r8a7778: Add CAN pin groups
gpio: add TB10x GPIO driver
pinctrl: at91: correct a few typos
pinctrl: mvebu: remove redundant of_match_ptr
pinctrl: tb10x: use module_platform_driver to simplify the code
pinctrl: tb10x: fix the error handling in tb10x_pinctrl_probe()
pinctrl: add documentation for pinctrl_get_group_pins()
pinctrl: rockchip: emulate both edge triggered interrupts
pinctrl: rockchip: add rk3188 specifics
pinctrl: rockchip: remove redundant check
...
This patch adds support for the clocks provided by the Clock Management
Unit of Energy Micro's efm32 Giant Gecko SoCs including device tree
bindings.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Add a lot of N900 nodes
Add OPP table to OMAP5/DRA7
Add support for Newflow NanoBone board
Add i2c aliases
Add McASP and audio support
Add reset/idle on init bindings for OMAP
Add more nodes for AM4272
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
iQIcBAABAgAGBQJSZ6KqAAoJEBvUPslcq6VzXQ8P/2FfipJA3iJkI69sqghLDFqt
Gx9cen4CzEsMv/9sLYQxkxw01xYUivHLFAQGL593aJTobbaSeyYCcfvJPB8Y9Jel
jwoDxF3KbhnqT6PpJild+uJYeWg5UsiZcbreGgpxXj15KYSiwCUY97ga6iCQrUYt
pqzC39DP1eViynaRYSIZjxOKKxpfUS5XWAMCsEsMr8UU9p15BsgZTbg2hwgVX3PG
+e9/Mpfp7T1Tf6c85mCfCKjvVr4zvdJTgqphYfQFySzyPIww0FoHLjGoCZB8PjxG
WSVw+i+yMCIZcAq90JIzgJ2PyD65ZKMRv9/5vxAh2UHXu7xxO8gLG3KWonN5ogMT
xTiw+dPTZC8h12i2uFYxutLhV7nLVe3PKbjWMsdV7qXPVpZw9L8DmcHmIyzakKb6
jkHk6vQfR2pFw8B93TzptziQULS8TIVc3aKwalELm+4LtMkhAJIrv81BTMAb/zC6
moskG5/YbVEh6NR7x53aIXWfm2uUfLo/rRWp8kwmRQWDKe8bjZg+HGzp5/aKdqrh
/ane2I0g5qVqB3Ivn7bNTWl4rN+NlTYFKZQ653fbFPbtVeTUh6gvAo5LYdwuJzvc
DmhG176wbmkhBH2IoJKqwr9JsMTuuFKH1adT9WKi2PWvseX8Z0iwf+1dpm0l8sNl
xlxoKEHneJjVEtEq8T5K
=8KX8
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.13/dt-late' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Some more dts changes from Benoit Cousson <bcousson@baylibre.com> via
Tony Lindgren:
- Add a lot of N900 nodes
- Add OPP table to OMAP5/DRA7
- Add support for Newflow NanoBone board
- Add i2c aliases
- Add McASP and audio support
- Add reset/idle on init bindings for OMAP
- Add more nodes for AM4272
* tag 'omap-for-v3.13/dt-late' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (42 commits)
ARM: dts: omap5-uevm: Remove pinmux for dmic pins
ARM: dts: omap5-uevm: Correct twl6040 reset GPIO pinmux
ARM: dts: TWL4030: Add power button support
ARM: dts: omap3-n900: Add LP5523 support
ARM: dts: omap3-n900: Add TLV320AIC3X support
ARM: dts: omap3-n900:: Mux RX51_LCD_RESET_GPIO in DTS
ARM: dts: omap3-n900: Add NAND support
ARM: dts: omap3-n900: Specify regulator info
ARM: dts: TWL4030: Add missing regulators
ARM: dts: omap3-n900: Add LP5523 support
ARM: dts: omap3-n900: Add vibrator device
ARM: dts: omap3-n900: GPIO key definitions
ARM: dts: omap3-n900: Add support for SD cards
ARM: dts: omap3-n900: Add UART support
ARM: dts: omap3-n900: Fix i2c bus speed
ARM: dts: omap3-n900: Add pinctrl for i2c devices
ARM: dts: DRA7: Add CPU OPP table
ARM: dts: OMAP5: Add CPU OPP table
ARM: dts: dra7-evm: add smps123 supply for CPU
ARM: dts: omap5-uevm: add smps123 supply for CPU
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The ams AS3722 is a compact system PMU suitable for mobile phones,
tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
controller, 11 LDOs, RTC, automatic battery, temperature and
over-current monitoring, 8 GPIOs, ADC and a watchdog.
Add MFD core driver for the AS3722 to support core functionality.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Florian Lobmaier <florian.lobmaier@ams.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
-> Adding pinmux for cpsw, i2c0.
-> Enabling the modules that are present in AM4372 EPOS EVM
These modules are tested on AM4372 EPOS EVM.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
omap3 boards.
Note that that these are based on a merge of the
following for the dependencies:
- v3.12-rc5 for fixes to pinctrl mask
- omap-for-v3.13/dt-signed to avoid pointless merge conflicts
- omap-for-v3.13/quirk-signed for legacy pdata handling
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.15 (GNU/Linux)
iQIcBAABAgAGBQJSYXP6AAoJEBvUPslcq6Vz2fcQAJyOHsHVNs3vxpB2CbFWzgl7
D4tFyL3pHlq9+p/VJwthUoY6WIiWIgEcKoLACD39w+EQ3XThcG1coc0TFj8IPxTr
QOCn5sMu1Z11OKhegcTEhySp8GUrmtNFplMCNK3jPsLjYLdVxOopjziO7qcCd49O
7pjCPfHoU5NkAACcm2nmE2uAlYP4STpGDnzwsi/aHZZQSIni2MslyeN9LeXdwBrN
of29pw8gTA0TVQSXemq0oLnMlEYzLd0ICG2SjSmJ/tWX0vXwjQl4fdDkqHwumPxo
wyjVw744AuXy0WC7PZluQxadd0jEptAs7XSsYgTGOvececWtmZEJDzPGamfabhlX
V6aHIqwVyDOGJXjQkUuaNuD5eO+afDwyaeVOla8YgE9ugwEs3xDXfHdks9nC8n4I
OAk+hXfEBPpLQgItkP+Q3EnYIUJVh4ew5oWCHVfXM8ssKTH6bblWFVtJXP1eyC+0
qkcHOHMR5oK4p+YAmRoRkeMG+Fe2pzT7dWOli4lPVXre1MAd/DQM5+NvgMaveW/E
S8YHj5mRR7a13OAgOWtscjUz+hWE+WIBkCyFuo0w4+RMShKtsiuC+FJirsQpCxLp
aFuwGG8ixT0F4WL/9Ao4iVmIOt15YIW3ND9ubHrPL2Ll0nGPwSmJSb+B7OgSFwqo
G3r4/CSgwljeUq4FZox4
=9Iuv
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.13/board-removal-signed-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
From Tony Lindgren:
Changes needed to drop legacy booting support for some
omap3 boards.
Note that that these are based on a merge of the
following for the dependencies:
- v3.12-rc5 for fixes to pinctrl mask
- omap-for-v3.13/dt-signed to avoid pointless merge conflicts
- omap-for-v3.13/quirk-signed for legacy pdata handling
* tag 'omap-for-v3.13/board-removal-signed-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (125 commits)
ARM: OMAP2+: remove legacy support for IGEP boards
ARM: OMAP2+: Remove legacy support for zoom platforms
ARM: OMAP2+: Remove legacy booting support for omap3 EVM
ARM: OMAP2: delete board-rm680
ARM: dts: add minimal DT support for Nokia N950 & N9 phones
ARM: dts: Add basic support for zoom3
ARM: dts: Add basic support for TMDSEVM3730 (Mistral AM/DM37x EVM)
ARM: dts: Add common support for omap3-evm
ARM: dts: Shared file for omap GPMC connected smsc911x
+Linux 3.12-rc5
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Add the minimal DTS support for DRA7xx based SoC core.
Add the initial support for N900 and gta04 phones.
Enable USB3 on OMAP5 evm board.
Add support for cryto accelerators
Add new IGEP AQUILA board
Add AM33XX EDMA support
Update HSUSB node to use the reset-gpios fmwk
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSWIe0AAoJEBvUPslcq6Vz9RwP/iZ3rnaPUUYmuw4SmlOcgXe4
NaMOPAWspcKVfL5hxTKRaMBNLvbwDcD/WY0VH7Tt/Yx6+aDdtifc3bgPnwAX8kyW
408QlT3R4cOOyieDNLyFYdc0z3X5LvVaEW0bDzj1Sxdg/9uv8yKrVcPxXjo3rP4Z
6NVgYdXYYKPGOCyhs3z+7sPXb6WZeneCYoYbuXbuaIem37fhMYm4OWbKToT/0CKS
nkE+bNzoYaeouIOeNwLWs8o7yp9W9psnhkAmfSDujw8h+Y2cpemIaQQrYyy/td2P
pF6UL67fNyVtcf5Oj2/N4a6OUSyac2mbkBLvbdxDoE/PjVIBTVNqFFphQvWivTBC
WCjx9/skFS/t5P2MldmDp4qek8hTJUXFK0WbzFn00mC+i6+DOVBVEXIWO6ESWoPi
X+B3417QCzZEab+q6NlVX+WjuStNuYUc9UAExC75q43rAoS8TpBZZK+dtKZE8lRB
+xh9okQqKfybNunZbcsYTL5AJNqQQvBS5jNSmSXeCfrBBaZumfo8fg7c4dQ+ARwf
GEnJH+ntCazNJRO66mBLf5wZ9OXF0g4TtCfLWXsmj4wdWjpokg1jEJSjtOmEg3xN
cBGrfhP/o0prx/JSYAWU6ogh4bBvbkOZ4/jEsQMKOzUFHFyQ78qOt/7GZOq074p0
4/luoHeG3Ri4QoVwIf8y
=808Q
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.13/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
From Tony Lindgren:
omap device tree related changes via Benoit Cousson <bcousson@baylibre.com>:
Add the minimal DTS support for DRA7xx based SoC core.
Add the initial support for N900 and gta04 phones.
Enable USB3 on OMAP5 evm board.
Add support for cryto accelerators
Add new IGEP AQUILA board
Add AM33XX EDMA support
Update HSUSB node to use the reset-gpios fmwk
* tag 'omap-for-v3.13/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (58 commits)
ARM: dts: dra7-evm: Add mmc2 node for eMMC support
ARM: dts: dra7-evm: Add mmc1 node for micro-sd support
ARM: dts: omap5-uevm: mark TWL6037 as system-power-controller
ARM: dts: omap3-igep0020: use standard constant for IRQ flags
ARM: dts: omap3-igep0020: Add HS USB Host support
ARM: dts: omap3-igep: Add USB OTG support
ARM: dts: AM33XX beagle black: add pinmux and hdmi node to enable display
ARM: dts: AM33XX: Add LCDC info into am335x-evm
ARM: dts: AM437X: Add DES node
ARM: dts: AM437X: Add AES node
ARM: dts: AM33XX: Fix AES interrupt number
ARM: dts: AM33XX: Add AES data and documentation
ARM: dts: AM33XX: Add SHAM data and documentation
ARM: dts: OMAP4: Add DES3DES node
ARM: dts: OMAP4: Add AES node
ARM: dts: am335x-evm[sdk]: switch mmc1 to 4-bit mode
ARM: dts: am335x-bone-common: correct mux mode for cmd line
ARM: dts: AM33XX: Add support for IGEP AQUILA EXPANSION board.
ARM: dts: AM33XX: Add support for IGEP COM AQUILA
ARM: dts: am335x-boneblack: move fixed regulator to board level
...
Signed-off-by: Kevin Hilman <khilman@linaro.org>
We need the fixes in v3.12-rc5, dts changes in omap-for-v3.13/dt, and
the platform data quirk changes in omap-for-v3.13/quirk to start
removing omap3 board files without breaking things.
The wake-up interrupt bit is available on omap3/4/5 processors
unlike what we claim. Without fixing it we cannot use it on
omap3 and the system configured for wake-up events will just
hang on wake-up.
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add minimal device tree source needed for DRA7 based SoCs.
Also add a board dts file for the dra7-evm (based on dra752)
which contains 1.5G of memory with 1G interleaved and 512MB
non-interleaved. Also added in the board file are pin configuration
details for i2c, mcspi and uart devices on board.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
The platform which it pertains to is no longer supported and is actually
causing some confusion in the new common clock implementation. A recent
patch removed its use in the clock driver, let's take out the definitions
too.
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
These are required to request DBx500 PRCMU clocks from Device Tree. The
numbers used are taken directly from the Hardware Specification document.
We're moving them from the DBx500 PRCMU include file into the DT include
directory and referencing them from the former via a #include.
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Generally minor changes. A bunch of bug fixes, particularly for
initialization and some refactoring. Most notable change if feeding the
entire flattened tree into the random pool at boot. May not be
significant, but shouldn't hurt either.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJSL12LAAoJEEFnBt12D9kB64gP/RBipnYbo3RPanHg+lE/J1V7
KSVFNGKWJHxTg47VVC1YJGIG21jqxAilpdS2MQL5FP7iyd+IzvtHpQiJgp+2G+pq
di06yrdyrYErxRgZgGQi8IpR538ZzOEVLCKJGdb09YelkRzPT5au7CC1MAsX3qco
yba7PHk0/Nc4hZE4aGbgR1DlRmn86ob7mM0KFE/LORaSN2BueMgWcwKhQXYNGyoh
assX4yNhAbUG6Bgw7paBLDGqHh8c5Ei5AppU8yPb+N094jgYHBJryUoDlzzUHD23
qqiEqHhUKT0TpgHNs8KH0WZFugcmjKvYEbzdzadBxqfXnJN4fKSEcdfF3iz4T14j
U6EZks89GoHwA523OghUZkKNOqlsUdWfdKz+8/grQqKisYwDcf3fCxEYk/4weDCQ
b6fFlOv6+AI3btjXp6F511ZKxyT4ZZzkHjp/ZSrhBygyamNZfax0ma0j+ZS9AZql
kPxQS0nOve6NKaP7vXxMmW5sGMnL19ER/Hm31wthGcWI43GVebUdklnzfGaEeSjs
pmP8oiCNemceqVpiPKxcOxiguf/eyIjP1SFXbguASygUmQeTDbbJ8n1FYznCitue
xJgWttKWsEf/aMR3eJtQ3aBmHR3rijAV4E28Wlq8XMkocwvpQm2zMocS2Z5BJ80S
hi1kQVy8+RxNX96tOSp1
=GSWl
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux
Pull device tree core updates from Grant Likely:
"Generally minor changes. A bunch of bug fixes, particularly for
initialization and some refactoring. Most notable change if feeding
the entire flattened tree into the random pool at boot. May not be
significant, but shouldn't hurt either"
Tim Bird questions whether the boot time cost of the random feeding may
be noticeable. And "add_device_randomness()" is definitely not some
speed deamon of a function.
* tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux:
of/platform: add error reporting to of_amba_device_create()
irq/of: Fix comment typo for irq_of_parse_and_map
of: Feed entire flattened device tree into the random pool
of/fdt: Clean up casting in unflattening path
of/fdt: Remove duplicate memory clearing on FDT unflattening
gpio: implement gpio-ranges binding document fix
of: call __of_parse_phandle_with_args from of_parse_phandle
of: introduce of_parse_phandle_with_fixed_args
of: move of_parse_phandle()
of: move documentation of of_parse_phandle_with_args
of: Fix missing memory initialization on FDT unflattening
of: consolidate definition of early_init_dt_alloc_memory_arch()
of: Make of_get_phy_mode() return int i.s.o. const int
include: dt-binding: input: create a DT header defining key codes.
of/platform: Staticize of_platform_device_create_pdata()
of: Specify initrd location using 64-bit
dt: Typo fix
OF: make of_property_for_each_{u32|string}() use parameters if OF is not enabled
patches, both new drivers and fixes to existing. A high percentage of
these are for Samsung platforms like Exynos. Core framework fixes and
some new features like automagical clock re-parenting round out the
patches.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJSLkImAAoJEDqPOy9afJhJOjsP/Ri26AW7XB9pPWJRSU9REBZA
31wxcFo2T+PNir9duwDwjFBFycC3MisaKFlg7D134M+7txbYqm1TRvfu9OEDxpSP
4b/Yl6TarN4dhCN2R+BREO8PnxCBVpspDcsdh6Esuwuet2xUom3UtN8yvSjhPP/u
qGNmXQYXyQy4fom5r+GsDVW+HIhLkaX9b0fYc9EN/bqfgv94PMZAxAxsK9CroAGZ
0m0g9ZXw9iSvVfz+iQEqPINtvpTLHk0FGyimoSR7kvW4o4o47tVtLEWp7VjG6mr5
zvBsycaQq6NgxPu96iUWWhsO9Uj2I7/7JgidXF7r+wvEFs1mcgZtkkirSA/n4zUN
C8a87rvQrZRLr+xXhVuqiVHCgCY8vXoHqkWg6SrZ62ORL8C7uYRpog5SEe2ZzLJX
l5uGAsDM6el+Uc/YviCPoZbeFr3h3CQvvFo8+i2eN0v/Phf30rq4lotBvpQj894G
ngEIMj+D8wshdYSF2dNJ0rLnkLHTgCbiA28L6Cl5TRzRMj3Uaj9aT3cmoLUnimZu
7F7nWU4Iu/vzQKCTQ+eTvwxXJqIlE0JeVbJilqH1f2a68JdXP1LOId+2w/CP8gqQ
i2odj6JHMgBzM9rNs+y0Ir9X/bXIVi6F341c19Nl15srEiLLl8xQIpcPDaI/Kvzs
pefYgF2yS5AZAW3ac90r
=5GfA
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux
Pull clock framework changes from Michael Turquette:
"The common clk framework changes for 3.12 are dominated by clock
driver patches, both new drivers and fixes to existing. A high
percentage of these are for Samsung platforms like Exynos. Core
framework fixes and some new features like automagical clock
re-parenting round out the patches"
* tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux: (102 commits)
clk: only call get_parent if there is one
clk: samsung: exynos5250: Simplify registration of PLL rate tables
clk: samsung: exynos4: Register PLL rate tables for Exynos4x12
clk: samsung: exynos4: Register PLL rate tables for Exynos4210
clk: samsung: exynos4: Reorder registration of mout_vpllsrc
clk: samsung: pll: Add support for rate configuration of PLL46xx
clk: samsung: pll: Use new registration method for PLL46xx
clk: samsung: pll: Add support for rate configuration of PLL45xx
clk: samsung: pll: Use new registration method for PLL45xx
clk: samsung: exynos4: Rename exynos4_plls to exynos4x12_plls
clk: samsung: exynos4: Remove checks for DT node
clk: samsung: exynos4: Remove unused static clkdev aliases
clk: samsung: Modify _get_rate() helper to use __clk_lookup()
clk: samsung: exynos4: Use separate aliases for cpufreq related clocks
clocksource: samsung_pwm_timer: Get clock from device tree
ARM: dts: exynos4: Specify PWM clocks in PWM node
pwm: samsung: Update DT bindings documentation to cover clocks
clk: Move symbol export to proper location
clk: fix new_parent dereference before null check
clk: wm831x: Initialise wm831x pointer on init
...
Device tree and bindings updates for 3.12.
General additions of various on-chip and on-board peripherals on various
platforms as support gets added. Some of the bigger changes are:
- Addition of (new) PCI-e support on Tegra.
- More Tegra4 support, including PMC configuration for Dalmore.
- Addition of a new board for Exynos4 (trats2) and more bindings for 4x12 IP.
- Addition of Allwinner A20 and A31 SoC and board files.
- Move of the ST Ericsson device tree files to now use ste-* prefix.
- More move of hardware description of shmobile platforms to DT.
- Two new board dts files for Freescale MXs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSKhJrAAoJEIwa5zzehBx3O6YP/AzskDtXdgdaopgZXVQxCIhE
svby8xG2pcFvuAYEv7KNwgk02oC+B5JrUj7ZG42IOPeVo4HN7k80ehxmP5MZwnqs
LpvBRXqUGAzEoJRhCD/lF4tuw+J5R/XgVWkIVz4nQ8tLdsSWJ3QY5LSS6ePTP6Qi
2B3AbeW/7DSada7lHJE9CqIX5xienLo4YgfCWXHNT8ouFGfqKjBxqIbCFyvzrGfs
jSsIsqy1IO0hnk61yHtbPCRl9FJg2rbVwqHBZvKHMW0ls19Q42chlK/dPO5JCb4w
VWMqbdOr8fnbqzicVqUPbShYZjgEd5I6PUgZMXJqEacgX9dj3SfOOtcR9kfrntHE
of7Wi3FzVzWTzclRnub9nHrBIwvThAr+WX+mvbZrD+tuQte8qkFZXO9mw5/hRA7M
K1O1HgaH1R1Xcdo69EWx9o94NYJ9Vs9F6wmS2+nb1B8u83Ee2Uq0GES5oyYqhU56
qg8FOMYUBDwXlHpjt1qiSwAYrabdCyxMx8lt351bxmiyKRFx0hmyGsv6HvlHJ7Oz
hn6xHcNyIoCIuOvWxiLmKKU2ameDn16uSd71MSwomnQ+U4V+QzoqQ4QDgYD6Sgd5
5fln3OYV3JniWeYFw9DkSLKQTYBodz06wA+XOurcNWs3Ls0E9GilKFixKC6GoEVC
uIywadgelMfDux8GGD3x
=1GuI
-----END PGP SIGNATURE-----
Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC DT updates from Olof Johansson:
"Device tree and bindings updates for 3.12.
General additions of various on-chip and on-board peripherals on
various platforms as support gets added. Some of the bigger changes
are:
- Addition of (new) PCI-e support on Tegra.
- More Tegra4 support, including PMC configuration for Dalmore.
- Addition of a new board for Exynos4 (trats2) and more bindings for
4x12 IP.
- Addition of Allwinner A20 and A31 SoC and board files.
- Move of the ST Ericsson device tree files to now use ste-* prefix.
- More move of hardware description of shmobile platforms to DT.
- Two new board dts files for Freescale MXs"
* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (177 commits)
dts: Rename DW APB timer compatible strings
dts: Deprecate ALTR as a vendor prefix
of: add vendor prefix for Altera Corp.
ARM: at91/dt: sam9x5ek: add sound configuration
ARM: at91/dt: sam9x5ek: enable SSC
ARM: at91/dt: sam9x5ek: add WM8731 codec
ARM: at91/dt: sam9x5: add SSC DMA parameters
ARM: at91/dt: add at91rm9200 PQFP package version
ARM: at91: at91rm9200: set default mmc0 pinctrl-names
ARM: at91: at91sam9n12: correct pin number of gpio-key
ARM: at91: at91sam9n12: add qt1070 support
ARM: at91: at91sam9n12: add pinctrl of TWI
ARM: at91: Add PMU support for sama5d3
ARM: at91: at91sam9260: add missing pinctrl-names on mmc
ARM: tegra: configure power off for Dalmore
ARM: DT: binding fixup to align with vendor-prefixes.txt (DT)
ARM: dts: add sdio blocks to bcm28155-ap board
ARM: dts: align sdio numbers to HW definition
ARM: sun7i: Add Olimex A20-Olinuxino-Micro support
ARM: sun7i: Add Allwinner A20 DTSI
...
- HDPM: Updates for AIO/RayDAT support, TCO/sync support
- RME96: Add PCM sync support
- HD-audio:
* A few HDMI/DP audio updates (CA assignment fix, stream switching
fix, Intel DP device list support)
* Device specific fixes (ASUS/CXT HP mic support, Thinkpad mic
improvements, Chromebook fixes, STAC9228 Dell fixes)
* Replace the all static quirks for AD codecs with the generic
parser
* WAKEEN support for handling irqs in the power saving mode
- USB-audio: Clean up implicit fb handling and related codes
- DAPM is now mandatory for ASoC CODEC drivers; all existing drivers
have had some level of DAPM support added. In addition, a lot of
cleanups and improvements in DAPM.
- Support for ASoC cross-platform compile test
- New drivers and support for Analog Devices ADAU1702 and ADAU1401(a),
Asahi Kasei Microdevices AK4554, Atmel AT91ASM9x5 and WM8904 based
machines, Freescale S/PDIF and SSI AC'97, Renesas R-Car SoCs, Samsung
Exynos5420 SoCs, Texas Instruments PCM1681 and PCM1792A and Wolfson
Microelectronics WM8997
- DT bindings for kirkwood and i.MX S/PDIF
- Clean up and bug fixes: ssm2602, rt5640 and sgtl5000.
- Core helpers for bitbanged AC'97 reset
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQIcBAABAgAGBQJSJ2E+AAoJEGwxgFQ9KSmkQQgP/izfCaTbvFsFOCwn8V8qgKCv
fBnakk1IQp7vaMxx1g0wall9clZbnae7sCgst5aCeLjCglzIUHqgsX5xr23QQfPF
WEVzW2LhrTmrRIVDnG0v1W5gUaYJk8H6qyMOkVWGtZvpn1M88TbJDv+P2ff3VqqU
G1yqeogXGduForHkhDw2TCvnu5WNQGWtvd5O+QtT8kqWqUWqM5sWBbdl1oMpQUnm
0/YmFDSkNRSi8tXerYnfUf1qQuh40efHJ2oql3vfh8+I8nwPqZWScl5e+IwfgBPb
azF0oeQM++R8/iZ89vk3hwndKzSN1y6Ok47gM2v+PwcJYoaEGDuIP8mVklUNQR9v
ZK1n6AwlyxGH8snBKBX9upqcuT2xycBleh4sYw/t61/T4ne9L7WYY6a69dIetZ5e
ALbzI1UP12S0oWiot/mqOcVLEneRNgKAD+K6Xcq7MYEA4g3MXbwWNrQRKRk3Hy5b
BDWh39lb7Uh/v+D81UJEfy1UgsSOunUdsGV6AAsam9THW47+2+gO10MvALNueJhH
QGOUVapLS553i6i7dZPj1tdumM8AKiqTRE9Bgsn4nWS3jOLtaO7EajOHoBha1JuG
S9IxAMgI8y6h2ZXBTcdGrTFBjvbN9o0S3xYTAG0Z1hWGPTbKCxkpopZdbmHs1qJi
Xsy9nBk9Dg2DEKDnZ555
=wbLt
-----END PGP SIGNATURE-----
Merge tag 'sound-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"Changes are seen in a wide range of codes, mainly due to ASoC DAPM
requirements; HD-audio shows a high peak in diffstat, it's just a
removal of bunch of old static quirks.
Some highlights:
- HDPM: Updates for AIO/RayDAT support, TCO/sync support
- RME96: Add PCM sync support
- HD-audio:
* A few HDMI/DP audio updates (CA assignment fix, stream switching
fix, Intel DP device list support)
* Device specific fixes (ASUS/CXT HP mic support, Thinkpad mic
improvements, Chromebook fixes, STAC9228 Dell fixes)
* Replace the all static quirks for AD codecs with the generic
parser
* WAKEEN support for handling irqs in the power saving mode
- USB-audio: Clean up implicit fb handling and related codes
- DAPM is now mandatory for ASoC CODEC drivers; all existing drivers
have had some level of DAPM support added. In addition, a lot of
cleanups and improvements in DAPM.
- Support for ASoC cross-platform compile test
- New drivers and support for Analog Devices ADAU1702 and
ADAU1401(a), Asahi Kasei Microdevices AK4554, Atmel AT91ASM9x5 and
WM8904 based machines, Freescale S/PDIF and SSI AC'97, Renesas
R-Car SoCs, Samsung Exynos5420 SoCs, Texas Instruments PCM1681 and
PCM1792A and Wolfson Microelectronics WM8997
- DT bindings for kirkwood and i.MX S/PDIF
- Clean up and bug fixes: ssm2602, rt5640 and sgtl5000.
- Core helpers for bitbanged AC'97 reset"
* tag 'sound-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (375 commits)
ALSA: hda - Re-setup HDMI pin and audio infoframe on stream switches
ALSA: hda - hdmi: Fallback to ALSA allocation when selecting CA
ASoC: mxs-sgtl5000: Configure the dai_links as unidirectional
ASoC: soc-pcm: Allow to specify unidirectional dai_link
ASoC: fsl_spdif: Staticse non-exported symbols
ASoC: ssm2602: Fix cache sync
ASoC: Remove unused sysfs_registered field from snd_soc_codec struct
ASoC: Remove unused debugfs_dapm field from snd_soc_{platform,codec} struct
ASoC: Remove unused control_type field from snd_soc_codec struct
ASoC: fsl: Add one blank space after ':=' in Makefile
ASoC: fsl: Add wrapping for dev_dbg() in fsl_spdif.c
ASoC: rt5640: change widget sequence for depop
ASoC: dapm: Fix auto-disable for inverted controls
ASoC: fsl: Drop SND_SOC_FSL_UTILS from SND_SOC_IMX_SPDIF
ASoC: Samsung: Do not queue cyclic buffers multiple times
ASoC: ep93xx-i2s: Remove unnecessary dev_set_drvdata()
ASoC: designware_i2s: Remove unnecessary dev_set_drvdata()
ASoC: fsl_spdif: remove redundant dev_err call in fsl_spdif_probe()
ASoC: fsl: Add S/PDIF machine driver
ASoc: kirkwood: Use the Kirkwood audio driver in Dove boards
...
Define a PWM_POLARITY_INVERTED macro in include/dt-bindings/pwm/pwm.h to
be used by device tree sources.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
development cycle:
- Various cleanups like remove non-existant hardware from
the Snowball device tree, prefix all files with "ste-*"
- External regulators
- Documentation updates
- Delete some minor dangling platform data
- Pin control settings for U8540 through DT
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.13 (GNU/Linux)
iQIcBAABAgAGBQJSDfMsAAoJEEEQszewGV1zg+cQAJBUM8IRpck+wgYyhEL9TsfO
Lt98kq8fw2iiC3wYbC6VtGVTocOuaum6wchwuOPjK2bylPggrzCwjD3cLaNTUymD
8wy/fZtWF0KEWa81pkpDDVFqWa6gc9H5UIPVFknf4wDaxb+vvw12o3wApKh/ThC/
8j0zE5gXQMmRehLRaM/cXqK1QBcFPZxL060e8s5N4CE47JeaLHn1GAlbYCi0QXmg
rV0trMaZhRQvj+FCJe1vHaf32rjjE071feFnqq3Q519puQulVQI/ULIP4zE584UO
Vu4Wys5SAiqJuj2IbnTxYJRvP1Xbr/rHTOhXIoh2Zy52JXm9fvCASTJ4GvUxHHeR
UXnwiaiyp03qDiwB/EKb5dpINqiwAY64I+jkN9sj2LULTwtVR6wsV4jMuIAHAPfz
w1ZU8Ea4U4dgF9XzWIs5nYNDxoHaBK8m/uj6qETcCjTKuGGixP6ziNgobH8g3DMZ
KxklRVFozyZwrC7MMk8vgEqhNtFUrnl3sQw/SUCUSMRk4PzWOCSaAvPFicpRXT8D
FmmG8h4jf95GaA+ndF3i92NCk2R6PO04SUlMGlBNEjc+okyGHkLnL7v1MkIom6EB
nM1+DaY4urYSeKdA72I4VG/RJBjToAdk2qysJ9xQtWOqAx1C3diL/57QKkltC+d7
7tETJOTTm42QtgmTQmQq
=Wm2y
-----END PGP SIGNATURE-----
Merge tag 'ux500-devicetree-for-v3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
From: Linus Walleij:
Ux500 device tree enablement base for the v3.12
development cycle:
- Various cleanups like remove non-existant hardware from
the Snowball device tree, prefix all files with "ste-*"
- External regulators
- Documentation updates
- Delete some minor dangling platform data
- Pin control settings for U8540 through DT
* tag 'ux500-devicetree-for-v3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (22 commits)
ARM: ux500: fix devicetree builds
ARM: ux500: Remove u9540.dts as it's been replaced
ARM: ux500: Apply a ste-* prefix onto dbx5x0.dtsi
ARM: ux500: Apply a ste-* prefix onto stuib.dtsi
ARM: ux500: Apply a ste-* prefix onto hrefv60plus.dts
ARM: ux500: Apply a ste-* prefix onto hrefprev60.dts Signed-off-by: Lee Jones <lee.jones@linaro.org>
ARM: ux500: Apply a ste-* prefix onto href.dtsi
ARM: ux500: Apply a ste-* prefix onto ccu9540.dts
ARM: ux500: Apply a ste-* prefix onto ccu8540.dts
ARM: ux500: Apply a ste-* prefix onto snowball.dts
ARM: ux500: Remove Snowball DTS entry for ROHM BH1780GLI ambient light sensor
ARM: ux500: Remove Snowball DTS entry for TPS61052 chip
ARM: ux500: Remove Snowball DTS entry for National Semiconductor LP5521 LED chip
ARM: ux500: Remove Toshiba TC35892 I/O Expander's DT entry from Snowball's DTS
ARM: u8540: DT: Set pinctrl mapping to i2c0,1,2,4 & 5
ARM: u8540: Add Pinctrl Device Tree settings for uart0, uart2
ARM: ux500: Stop passing MMC's platform data for Device Tree boots
Documentation: Update binding for Nomadik and DBx5x based platforms
ARM: ux500: Supply external regulator names for Snowball's DT
ARM: ux500: Provide a supply name for the AB8500 AUX regulators to use
...
Many of Key device tree bindings uses the constant number as key code
which matches with kernel header key code and then comment as follows
for reference/better readability:
linux,code = <102>; /* KEY_HOME */
Create a DT header which defines all the key code so that DT key bindings
can use it as follows:
linux,code = <KEY_HOME>;
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Move imx-audmux macro definitions to include/dt-bindings, so they can be
used for devicetree.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds pinctrl device tree settings for uart0 and uart2
for ccu8540 board.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds new, Common Clock Framework-based clock driver for Samsung
S3C64xx SoCs. The driver is just added, without actually letting the
platforms use it yet, since this requires more intermediate steps.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
- Driver fixes for AM33xx, SIRF and PFC pin controllers.
- Fix a compile warning from the pinctrl single-register
driver.
- Fix a little nasty memory leak.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.13 (GNU/Linux)
iQIcBAABAgAGBQJR9YhoAAoJEEEQszewGV1zfl8P/jk2VjlRE0P4LRLSRn3Rt7yj
Wz7IyZTol+mFnaY0yKQS9rToK+GqtJQHA1zuNP8iQnJbQh+UromAZwBd58dP7cnu
mYSi2QS4osYT5RjvVtB2yYy9sRrc4iTb+qJFekanA4IcHt0zKDZysyN8moU5JxmN
TVr+cauFm7qimkjps2Dns94UhVGpgB7A6Y8yC3SYtPv1GPdWQgSaDabWqMYq0bn1
ARUaz3XcbjMAGbPi8kDEFsP/SkM2OcMXpjX23G6ifgO9pyEKeum5+FWtllVeeAzb
LmymMJYVcTPLFw0yj+9lkRBew2K9JKmPp8rAUBvbDn53vbguMkDJTczM3IUZ279h
lRvR+w9F2M1rqIfwSa0/ZqTYKXbsF/IASYMXL/awNywnss+caPUxiN4EWRuKDssS
Wh6veS9l4roMupaez6GU7gQ8UgNnFTQg2BYzeFYbAg1jJ1b/U+E0MK/9yUzewXQw
phlcFFibYce+1qhJhQ3lIYb6O512vw+2Xk+G6JBZVuwzMVvUUJwJqfGRKCoobxZz
DRBIQJ9U4DRMethjfp5mP0H6nH7/fwKqvftKlsnOb9SXZregpcLV+ymrkkmW/Ey2
XuEHQqUbmD0zoPHvFgoUmAYlzmhxtmHK5uJDSH1aZ4b9IOzr2mV1RSt0xwo3BpTS
gwtDvmutV/JQ8RZMLLvw
=URtB
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-for-v3.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij:
- Driver fixes for AM33xx, SIRF and PFC pin controllers
- Fix a compile warning from the pinctrl single-register driver
- Fix a little nasty memory leak
* tag 'pinctrl-for-v3.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: fix a memleak when freeing maps
pinctrl: pinctrl-single: fix compile warning when no CONFIG_PM
pinctrl: sh-pfc: fix SDHI0 VccQ regulator on sh73a0 with DT
arm/dts: sirf: fix the pingroup name mismatch between drivers and dts
pinctrl: sirf: add usp0_uart_nostreamctrl pin group for usp-uart without flowctrl
pinctrl: sirf: fix the pin number and mux bit for usp0
pinctrl: am33xx dt binding: correct include path
Using #include <include/...> is a bit odd. It happens to work because the DTC
flags include -Iarch/FOO/boot/dts as well as arch/FOO/boot/dts/include and
arch/FOO/boot/dts/include/dt-bindings is a symlink to include/dt-bindings.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The fec/enet driver calculates MDC rate with the formula below.
ref_freq / ((MII_SPEED + 1) x 2)
The ref_freq here is the fec internal module clock, which is missing
from clk-vf610 clock driver right now. And clk-vf610 driver mistakenly
supplies RMII clock (50 MHz) as the source to fec. This results in the
situation that fec driver gets ref_freq as 50 MHz, while physically it
runs at 66 MHz (fec module clock physically sources from ipg which runs
at 66 MHz). That's why software expects MDC runs at 2.5 MHz, while the
measurement tells it runs at 3.3 MHz. And this causes the PHY KSZ8041
keeps swithing between Full and Half mode as below.
libphy: 400d0000.etherne:00 - Link is Up - 100/Full
libphy: 400d0000.etherne:00 - Link is Up - 100/Half
libphy: 400d0000.etherne:00 - Link is Up - 100/Full
libphy: 400d0000.etherne:00 - Link is Up - 100/Half
libphy: 400d0000.etherne:00 - Link is Up - 100/Full
libphy: 400d0000.etherne:00 - Link is Up - 100/Half
Add the missing module clock for ENET0 and ENET1, and correct the clock
supplying in device tree to fix above issue.
Thanks to Alison Wang <b18965@freescale.com> for debugging the issue.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
- A large slew of improvements of the Genric pin configuration
support, and deployment in four different platforms:
Rockchip, Super-H PFC, ABx500 and TZ1090. Support BIAS_BUS_HOLD,
get device tree parsing and debugfs support into shape.
- We also have device tree support with generic naming conventions
for the generic pin configuration.
- Delete the unused and confusing direct pinconf API. Now state
transitions is *the* way to control pins and multiplexing.
- New drivers for Rockchip, TZ1090, and TZ1090 PDC.
- Two pin control states related to power management are now
handled in the device core: "sleep" and "idle", removing a lot
of boilerplate code in drivers. We do not yet know if this is
the final word for pin PM, but it already make things a lot
easier to handle.
- Handle sparse GPIO ranges passing a list of disparate pins, and
utilize these in the new BayTrail (x86 Atom SoC) driver.
- Make the sunxi (AllWinner) driver handle external interrupts.
- Make it possible for pinctrl-single to handle the case where
several pins are managed by a single register, and augment it to
handle sleep modes.
- Cleanups and improvements for the abx500 drivers.
- Move Sirf pin control drivers to their own directory, support
save/restore of context and add support for the SiRFatlas6 SoC.
- PMU muxing for the Dove pinctrl driver.
- Finalization and support for VF610 in the i.MX6 pinctrl driver.
- Smoothen out various Exynos rough edges.
- Generic cleanups of various kinds.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJR0Z07AAoJEEEQszewGV1zx+oP/j+bh39e1Fc8ySFNvpwLFFRb
EbQZx21XsK+d4fUVYQJ1IBh3e5FTqkmvHarbO1aNttqyk7eN5P4EFb3dLExIX+81
6SJYtldH5ZdvLpJNvSXAX6fUjTD1CtBCDs5z5AvDQjqUArQ2tKlzJJgFXW8MSd3B
5hd7XdU5g30GbVzFwrPbVUZwRM12YVs/HACkP6uFqDjB8KX6nXpETlqeeFW+ApvW
RPT7iN/CsFls7gl6mHsPvScdfXar0ilZfu0hTf3EmhlVK1/iPOV6aqAF9z4j2Yxf
ICL/x3phJ0Q7yNeZslif0KN3iJnrRGbdNvBi6wim35Ds5Uf3lY2SAhSvxNmkjT8n
DB9oBTvQzr5OEv8fstWJAT+BWIdZ6Z91IqJ5Gy40A91oVUU9NDDBR3ur2gIneEUz
51kOUhucCzpiht5A/7djAx6MYYOEUwjGNzjOs7tGcxCxz4+Rb2DbAXZ3Cew45ddh
1QsfL3588A0DTp7ccw7f4QwYveX/cquzia/MD8AtdrUSYFEPfkexEo540/VqMl8j
aMJ8Uuca9GSnyXDk+ziwkzLg2DjTw+p+6IygNr2GLrXFH2LTAKRpz/SidyLArDsw
0sTFan0sdU3497rHX5Xc8yCyDY4sXCdQm3/er+TE+Z7V2dS99GuEysCAInIdvM1I
Wupqaxw4A25YSmbRFVpR
=EbAf
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control changes from Linus Walleij:
- A large slew of improvements of the Genric pin configuration support,
and deployment in four different platforms: Rockchip, Super-H PFC,
ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing
and debugfs support into shape.
- We also have device tree support with generic naming conventions for
the generic pin configuration.
- Delete the unused and confusing direct pinconf API. Now state
transitions is *the* way to control pins and multiplexing.
- New drivers for Rockchip, TZ1090, and TZ1090 PDC.
- Two pin control states related to power management are now handled in
the device core: "sleep" and "idle", removing a lot of boilerplate
code in drivers. We do not yet know if this is the final word for
pin PM, but it already make things a lot easier to handle.
- Handle sparse GPIO ranges passing a list of disparate pins, and
utilize these in the new BayTrail (x86 Atom SoC) driver.
- Make the sunxi (AllWinner) driver handle external interrupts.
- Make it possible for pinctrl-single to handle the case where several
pins are managed by a single register, and augment it to handle sleep
modes.
- Cleanups and improvements for the abx500 drivers.
- Move Sirf pin control drivers to their own directory, support
save/restore of context and add support for the SiRFatlas6 SoC.
- PMU muxing for the Dove pinctrl driver.
- Finalization and support for VF610 in the i.MX6 pinctrl driver.
- Smoothen out various Exynos rough edges.
- Generic cleanups of various kinds.
* tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits)
pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe()
pinctrl: remove bindings for pinconf options needing more thought
pinctrl: remove slew-rate parameter from tz1090
pinctrl: set unit for debounce time pinconfig to usec
pinctrl: more clarifications for generic pull configs
pinctrl: rip out the direct pinconf API
pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver
pinctrl-tz1090: add TZ1090 pinctrl driver
pinctrl: samsung: Staticize drvdata_list
pinctrl: rockchip: Add missing irq_gc_unlock() call before return error
pinctrl: abx500: rework error path
pinctrl: abx500: suppress hardcoded value
pinctrl: abx500: factorize code
pinctrl: abx500: fix abx500_gpio_get()
pinctrl: abx500: fix abx500_pin_config_set()
pinctrl: abx500: Add device tree support
sh-pfc: Guard DT parsing with #ifdef CONFIG_OF
pinctrl: add Intel BayTrail GPIO/pinctrl support
pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc
pinctrl: Staticize local symbols
...
Conflicts:
drivers/net/ethernet/ti/davinci_mdio.c
drivers/pinctrl/Makefile
These changes are all driver specific and cross over between arm-soc
contents and some other subsystem, in these cases cpufreq, crypto,
dma, pinctrl, mailbox and usb, and the subsystem owners agreed to
have these changes merged through arm-soc. As we proceed to untangle
the dependencies between platform code and driver code, the amount of
changes in this category is fortunately shrinking, for 3.11 we have
16 branches here and 101 non-merge changesets, the majority of which
are for the stedma40 dma engine driver used in the ux500 platform.
Cleaning up that code touches multiple subsystems, but gets rid
of the dependency in the end.
The mailbox code moved out from mach-omap2 to drivers/mailbox
is an intermediate step and is still omap specific at the moment.
Patches exist to generalize the subsystem and add other drivers
with the same API, but those did not make it for 3.11.
Conflicts:
* In cpu-db8500.c results from the removal of the u8500_of_init_devices
function in combination with the split of u8500_auxdata_lookup.
* In arch/arm/mach-omap2/devices.c, the includes got reshuffled.
we need to keep linux/wl12xx.h and linux/platform_data/mailbox-omap.h.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAUdLnomCrR//JCVInAQJI/A/9FydsQa9sdnzLFgcdX5BeRRwkXLfDifCM
zDTfUBo+LriKOs7QHblmDg1MnY1UMB2IfrdHD0FsjK7WbZ/91EMAGDPYcI7Fu4+u
pGStxwWi2v+oCT1jjeOkCPT7hdCqogsSpybYq8itSb+zdvdOi6U35dWEKz8xGqz4
vTL9gTZbJP0kowkjIcaryk7FIj7BTIvMCW8n55JZEkDe0BuSJGYn5c3Mntut12ZK
5xM2PeNe2sd3dIdA6XbM2ye/XmYa8xY8Qu4/ijxfH1gnJLvz9Unp96nRXpEbIeMb
BH2Sro8dxsMCaweIQhSRKGnUWMYO/Rh7/+5EqzJ163Ezthx9nvHXJY2ndWuD7uM1
IcGrMxLtqP22TEMtZAVEATDp/5ymxEo5GM+eayUojQDn213wOJjRs5xz5IBsH4KM
8CM/gpadWmLjWku72yEV4lryLcdS0NVQzpTnEbILEGOU4u7qJtxRAp7x7tWBtFg8
4m/eWcSVk/U2SYbXmQHsfukuWgKY0cnZbctPcdnaqXwTP7toJEAK3gxoMtWh49Jq
2M2PVFyFejaaq5b/71wAJ7ePYw56H0N/F3RsGpPE55AY15++gSoQ+3t2Si68hDw8
NtyJMkQYpTvtqJbHXWpQQ3Zfs7pDBe01WDV7i+m4JTNggxUDaO/t1Fqp+fEksm4J
r+luEf5Gcgk=
=mJsI
-----END PGP SIGNATURE-----
Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver specific changes from Arnd Bergmann:
"These changes are all driver specific and cross over between arm-soc
contents and some other subsystem, in these cases cpufreq, crypto,
dma, pinctrl, mailbox and usb, and the subsystem owners agreed to have
these changes merged through arm-soc.
As we proceed to untangle the dependencies between platform code and
driver code, the amount of changes in this category is fortunately
shrinking, for 3.11 we have 16 branches here and 101 non-merge
changesets, the majority of which are for the stedma40 dma engine
driver used in the ux500 platform. Cleaning up that code touches
multiple subsystems, but gets rid of the dependency in the end.
The mailbox code moved out from mach-omap2 to drivers/mailbox is an
intermediate step and is still omap specific at the moment. Patches
exist to generalize the subsystem and add other drivers with the same
API, but those did not make it for 3.11."
* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (101 commits)
crypto: ux500: use dmaengine_submit API
crypto: ux500: use dmaengine_prep_slave_sg API
crypto: ux500: use dmaengine_device_control API
crypto: ux500/crypt: add missing __iomem qualifiers
crypto: ux500/hash: add missing static qualifiers
crypto: ux500/hash: use readl on iomem addresses
dmaengine: ste_dma40: Declare memcpy config as static
ARM: ux500: Remove mop500_snowball_ethernet_clock_enable()
ARM: ux500: Correct the EN_3v3 regulator's on/off GPIO
ARM: ux500: Provide a AB8500 GPIO Device Tree node
gpio: rcar: fix gpio_rcar_of_table
gpio-rcar: Remove #ifdef CONFIG_OF around OF-specific sections
gpio-rcar: Reference core gpio documentation in the DT bindings
clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2
ARM: dts: Update Samsung I2S documentation
ARM: dts: add clock provider information for i2s controllers in Exynos5250
ARM: dts: add Exynos audio subsystem clock controller node
clk: samsung: register audio subsystem clocks using common clock framework
ARM: dts: use #include for all device trees for Samsung
pinctrl: s3c24xx: use correct header for chained_irq functions
...
- use #include for all Samsung DT
- add clk for exynos audio subsystem (audss) and i2s
- support audss and i2s for exynos5250
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRwKhvAAoJEA0Cl+kVi2xqI5oP/3CgQCOQiNt+rPH4OyJvKg+D
ftZ5ZqXqdKTUtWdCqKqiO2Q6+AXeSr2ddiLO/dZAlwFZ3jfbefEgQ6IQbLNTFghz
feDQy5NrxalO0s9nkbdQ34hudDIRI39/+53W9cySnrHooSURvqR3+zLhzSewM6qz
fsivJKygq2TeXUobUDQr8HzajEIcSNCQzWOqu0JkTpe5AY+0QCpwKCFqHfTF9Ks9
9r6F9KO05EGuRwS66IGl0xvMiW5WWbFtM8RPEdRALyFBzsiHpltg9gTQq+ZBfodl
If6a7gclS+GP3WHou9NAy8/5otwFKg/DRZxgXjoVrst/4RmpcqzCnyBdmB/dP//z
ZyLIPXEAS1qv0SDTnbUA8qeW9/zrStV2nHHI5YoQq5L0J3zaSedKOeRq3m996jnw
PRo3HYIjMic6afotmnisXr2bAX9OLcrLnsJ6hDMjC0wZgCMAhKqJxIf3qAh1K8Sg
/oKyqihn/l8QbrubigcgGcwGXNb8HBEYHXgOXprVi7cJifpUaH5MOu7uBMEgQZkH
TpxDmgiNiggB1KT/xI4GhCothGJPLxh75gp5+VvII4pHym0l8jJDafMPA9i+0W/q
UML8CBLB+wfWq+gzc+OUbDQAkOWfQgAE1SuCxwK/BNanlu8ujRCuhQicuS3fNgBA
2ZDtOH6e4tsIiWgrnxz7
=0n6B
-----END PGP SIGNATURE-----
Merge tag 'common-clk-audio' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
From Kukjin Kim:
based on exynos-dt-2 and s3c24xx-dt-2
- use #include for all Samsung DT
- add clk for exynos audio subsystem (audss) and i2s
- support audss and i2s for exynos5250
* tag 'common-clk-audio' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2
ARM: dts: Update Samsung I2S documentation
ARM: dts: add clock provider information for i2s controllers in Exynos5250
ARM: dts: add Exynos audio subsystem clock controller node
clk: samsung: register audio subsystem clocks using common clock framework
ARM: dts: use #include for all device trees for Samsung
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* New SoCs i.MX6 Sololite and Vybrid VF610 support
* imx5 and imx6 clock fixes and additions
* Update clock driver to use of_clk_init() function
* Refactor restart routine mxc_restart() to get it work for DT boot
as well
* Clean up mxc specific ulpi access ops
* imx defconfig updates
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRvsJmAAoJEFBXWFqHsHzOHOIH/jjVCaAFdOskPI4d9qPPAt9C
5o0aJDjerzTm+vH2mbec2507fChaYrLybAypJUj6wDYRf03RhAgPXorY83Y+3WtG
SYz2UWza7MY8GeZv6e9tdrYS3JUSicFXPf8MsOcINsuyIub3dD96z36OqrnWZLFy
uH5V81e4gOHECd4PWIxmhdjwawqmwb/Pqzl0V3+vXi2JM07xrn7/SqlZ7VfUwM2q
DNhu5ugH7FtaFp75YrmTIhp6i+tovguRr0RIt6dnk/9gbJBQnV2Cw2MzdRPT12U5
bC79P7sojkKRtITcq9c1fnUNhkgc0+hS8HoezcQmzKMin6nFmVAh5wQFSlRJMJE=
=mZw+
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
This is a dependency for imx/dt
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pinctrl headers were not protected with #ifndef.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
The pinctrl IP inside the AM33XX family differs slightly from
what is found on OMAP2+. Define a specific header to take account
of the differences.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Most of the constants are taken from arch/arm/mach-omap2/mux.h.
Define some others for the PIN_OUTPUT_* flavours.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Audio subsystem is introduced in s5pv210 and exynos platforms.
This has seperate clock controller which can control i2s0 and
pcm0 clocks. This patch registers the audio subsystem clocks
with the common clock framework on Exynos family.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add clock support for Vybrid VF610. It uses dtc macro support to
define all clock IDs in vf610-clock.h to keep clock IDs coherence
between kernel and DT.
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add clock support for i.MX6 SoloLite. It uses the dtc marco support to
define all clock IDs in imx6sl-clock.h, which will be included by both
clock driver and device tree sources, so that the data will stay sync
all the time between kernel and DT.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This driver adds support the Cortex-A9 based SoCs from Rockchip,
so at least the RK2928, RK3066 (a and b) and RK3188.
Earlier Rockchip SoCs seem to use similar mechanics for gpio
handling so should be supportable with relative small changes.
Pull handling on the rk3188 is currently a stub, due to it being
a bit different to the earlier SoCs.
Pinmuxing as well as gpio (and interrupt-) handling tested on
a rk3066a based machine.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- DMA binding update with one patch shared with slave-dma tree
- more SPI DT activation
- enable the USB gadget HS for DT platforms
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRu5r2AAoJEAf03oE53VmQvAsIAMa06mb42kGJQ6JhUV0HcL+8
+a2FHN076DreWEtM5vq9ibIEF2pnz+XHafUYGRfjfYRsbEfy41N0OmISNBwIRgP6
yKB6ZnGQp21Fw/SwOGntuEw0PH9bQmM9pNYttMlBfvMlM3TdFWc2fztwvqpP71x4
a1zOsLRNYLk4WO33gh50bRTQeS81GRvn3hrGPKKFXuC7AQ0TCHOH/l1c1Fo5INpk
TiQMy5JvkrJNSerdq23u5uAp2zstuhiVMbSY6eWQwJy1RfOSqVYY91KzGKGpOPT2
g6LB/Z6sZ5wwJ8jbbPV1XAEl45oojPDyNl+KxJc5gir5wfWEVpoayRt1Nfggz98=
=MZkL
-----END PGP SIGNATURE-----
Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt
From Nicolas Ferre:
Again some nice DT updates for AT91:
- DMA binding update with one patch shared with slave-dma tree
- more SPI DT activation
- enable the USB gadget HS for DT platforms
* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
ARM: at91: sam9m10g45ek add udc DT support
ARM: at91: sam9g45 add udc DT support
ARM: at91: sam9x5ek add udc DT support
ARM: at91: sam9x5 add udc DT support
ARM: at91: dt: at91sam9x5: add SPI DMA client infos
ARM: at91: dt: switch DMA DT bindings to pre-processor
ARM: at91: dt: add header to define at_hdmac configuration
This branch contains all device tree updates for Tegra boards.
The changes are:
* Converted all DT files to use the C pre-processor, to support the use
of named constants. This included use of defines for GPIO, IRQ, and
clock constants.
* Enabling new features such as:
- SPI on Dalmore.
- Audio on Dalmore and Beaver.
- gpio-leds on Beaver.
- Power-supply/batter linkage on Dalmore.
* A minor fix to the RAM size node on Beaver.
It is based on previous pull request tegra-for-3.11-deps-for-usb
followed by a merge of tegra-for-3.11-deps-for-clk.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRu0J2AAoJEMzrak5tbycxUEMP/iTyH5lQZ6NadMyR765G0++Y
XzMrZDgkTu1tqbWo4NhKeYuRThoSwDReq+yfecTWLXGBHjxQ5SZ7mSi1arQLF2Gt
rdKaOe0BibeFg55OM3S02XPG5wPz7vw/f0lXXz8nI2dq59QU59+dx1zfWDrXPAKc
62AKTTx0Wnn5ZljNrvRgZd5wT17pj2CfSHyEV7tdJAxyW13V6aSoQFBxrJcStKrg
N0i5WfOgmmoraNbu7zV+7iRyQc5cmJgjGNQ5lkThHQoFV4tSM64op5cCPWW/9ZC/
USOWrGQLm3vexJnCm9Y7JmPZR4n+PgPffDYKVXHSidd74kM2t7qciHs39sEgIVRT
DJb6AU1xxJw7Lbb8pcae+8Zy4xrcQPdbYzHj1LH08VliCNO4rC5PCwCPYB0AcA6u
DSeU2eYALvnKxUoJga9cLeeUsDwfwjOcNvWM2YkAoSDe3h5hQhwVgq9HxTpKvMpz
5MSsPjQ9zLSFAdU72SIRXJlnMLxezqok9j631dyk+3rLC24ARmklQbvBcpG7hc7Y
lo9JJz4MBF3y55v71H5Ytz7dh+8cb2bPYckCI8CpxH9gx2qVFgqbK+gKucR8VbyY
jJJe6Bvb/5BA9lQOh97HObewE9sJbh3olGZTFl3yOgML0tuUXNnpPKkqGpWYlgJS
+us+/0GXZctU3vT2zlR0
=4sJe
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.11-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt
From Stephen Warren:
ARM: tegra: device tree updates
This branch contains all device tree updates for Tegra boards.
The changes are:
* Converted all DT files to use the C pre-processor, to support the use
of named constants. This included use of defines for GPIO, IRQ, and
clock constants.
* Enabling new features such as:
- SPI on Dalmore.
- Audio on Dalmore and Beaver.
- gpio-leds on Beaver.
- Power-supply/batter linkage on Dalmore.
* A minor fix to the RAM size node on Beaver.
It is based on previous pull request tegra-for-3.11-deps-for-usb
followed by a merge of tegra-for-3.11-deps-for-clk.
* tag 'tegra-for-3.11-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (21 commits)
ARM: tegra: enable audio on Beaver
ARM: tegra: enable audio on Dalmore
ARM: tegra: add power-supplies link between battery and charger
ARM: tegra: add audio-related nodes to Tegra114 DT
ARM: tegra114: convert device tree files to use CLK defines
ARM: tegra30: convert device tree files to use CLK defines
ARM: tegra20: convert device tree files to use CLK defines
ARM: tegra: Add charger subnode to tps65090 node
ARM: tegra: convert device tree files to use IRQ defines
ARM: tegra: convert device tree files to use GPIO defines
ARM: tegra: create a DT header defining GPIO IDs
ARM: tegra: use #include for all device trees
ARM: tegra: Add gpio-leds to Tegra30 Beaver
ARM: tegra: fix memory size on Beaver
ARM: tegra: enable spi4 on Dalmore
ARM: tegra114: create a DT header defining CLK IDs
ARM: tegra30: create a DT header defining CLK IDs
ARM: tegra20: create a DT header defining CLK IDs
ARM: tegra: update device trees for USB binding rework
ARM: tegra: modify ULPI reset GPIO properties
...
Signed-off-by: Olof Johansson <olof@lixom.net>
DMA-cell content is a concatenation of several values. In order to keep this
stuff human readable, macros are introduced.
The values for the FIFO configuration are not the same as the ones used in the
configuration register in order to keep backward compatibility. Most devices
use the half FIFO configuration but USART ones have to use the ASAP
configuration. This parameter was not initially planed to be into the at91 dma
dt binding. The third cell will be used to store this parameter, it will
become a concatenation of the FIFO configuration and of the peripheral ID. In
order to keep backward compatibility i.e. FIFO configuration is equal to 0, we
have to perform a translation since the value to put in the register to set
half FIFO is 1.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
All Tegra GPIOs are named after the GPIO bank and GPIO number within
the bank. Define a macro to calculate the GPIO ID based on those
parameters. Make the macro available via all Tegra .dtsip files.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Create a header file to define the clock IDs used by the Tegra114 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.
This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Create a header file to define the clock IDs used by the Tegra30 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.
This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Create a header file to define the clock IDs used by the Tegra20 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.
This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The ARM GIC binding defines a few custom cells and flags for its IRQ
specifier. Provide names for those.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Many IRQ device tree bindings use the same flags. Create a header to
define those.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Many GPIO device tree bindings use the same flags. Create a header to
define those.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
