Commit Graph

12561 Commits

Author SHA1 Message Date
Ben Skeggs
46ea16884c drm/nouveau/fbcon: bracket entrypoints with a per-device enabled check
We don't necessarily have fbcon on all devices these days.

Fixes suspend on (at least) Quadro NVS 450.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:56 +10:00
Ben Skeggs
6d8d163132 drm/nvd0-/disp: reorder writes to lane current control regs
Matches the nv94-nvc0 commit with the same title.  Doesn't fix a reported issue,
but NVIDIA use this ordering here too, so let's do it just in case.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:55 +10:00
Ben Skeggs
d7b023d87a drm/nv94-nvc0/disp: reorder writes to lane current control regs
Fixes link training issues on some boards.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:55 +10:00
Ben Skeggs
687d8f66b1 drm/nouveau/disp: log if DP link training fails
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:55 +10:00
Martin Peres
9e2b734f1c drm/nouveau/i2c: use a custom bitbanging delay for the adt7473
This patch adds a way to define a custom delay when scanning for i2c devices
because the adt7473 sometimes doesn't like the default bitbanging udelay.

Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:54 +10:00
Ilia Mirkin
fd34381b0e drm/nouveau/agp: add a quirk list to limit agp modes
Certain combinations of hardware can't actually support the maximum
detected speed. Add a quirk list that lists pairs of hostbridge/chip pci
ids and the mode that they should work with.

See https://bugs.freedesktop.org/show_bug.cgi?id=20341

Reported-by: Jason Detring <detringj@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:54 +10:00
Ben Skeggs
e8d95b22b4 drm/nvd9-/disp: disable display underflow reporting at init
Reported-by: Andy Ritger <aritger@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:53 +10:00
Ben Skeggs
d29b992470 drm/nva0/clk: fix accidental limiting of pll coefficients
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:53 +10:00
Ben Skeggs
75faef78c9 drm/nv50-nvaf/fb: split fbram oclass in preparation for reclocking
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:52 +10:00
Ben Skeggs
20cdeaf938 drm/nouveau/fb: merge more bits and pieces into oclass definitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:52 +10:00
Ben Skeggs
8613e7314a drm/nouveau/fb: remove ram oclass argument from base fb constructor
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:51 +10:00
Ben Skeggs
9ca3037e60 drm/nv50-nvaf/fb: split the class definitions up a bit
These will diverge further in the future.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:51 +10:00
Ben Skeggs
1e9fc30e38 drm/nouveau/fb: make external class definitions pointers
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:50 +10:00
Ben Skeggs
0fef9d8a59 drm/nvaa/mc: blacklist msi to off by default
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:50 +10:00
Ben Skeggs
9a9d5c64ef drm/nv50-nv86,nv92/mc: rearm msi via pci config space, rather than mmio mirror
This is what NVIDIA do on these chipsets, let's hope it works around
the reported MSI failures for us on NV86.

v2: updated to include G92, as per information provided by NVIDIA.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:38 +10:00
Ben Skeggs
1b4fea0f6a drm/nvc0,nvc4/mc: handle 0xc0's "special" msi rearm
v2. updated to cover GF104, as per information provided by NVIDIA.

Reported-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:38 +10:00
Ben Skeggs
08f6fbdb9b drm/nouveau/mc: store static data in nouveau_mc class definition
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:35 +10:00
Ben Skeggs
3c792a15ec drm/nouveau/mc: fetch NV_PMC_INTR again after re-arming MSI
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:05 +10:00
Ben Skeggs
ab5beca895 drm/nouveau/mc: bracket interrupt handler with NV_PMC_INTR_EN disable/re-enable
This looks to be what NVIDIA do pretty much everywhere, since forever.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:05 +10:00
Ben Skeggs
6dcee40a9b drm/nouveau/mc: have single entry and exit points to the interrupt handler
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:00 +10:00
Ben Skeggs
cfc2f2637a drm/nouveau/mc: msi rearm write via subdev, not device
This way we can catch it with debugging on for PMC subdev.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:38:26 +10:00
Ben Skeggs
dd5b84ac3c drm/nouveau/device: use an additional bit from NV_PMC_BOOT_0 to identify chipset
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:44 +10:00
Ben Skeggs
3db0fdb467 drm/nouveau/bios/init: return failure condition on invalid opcodes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:43 +10:00
Ben Skeggs
ab403ac96f drm/nv31/mpeg: remove need for separate refcnt on engine use
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:43 +10:00
Martin Peres
b449a43f56 drm/nouveau/therm: ack any pending IRQ at init
This is safe because ptherm hasn't been configured yet and will be a
little further down the initialization path. Ptherm should be safe
regarding to runtime reconfiguration.

v2:
  - do not limit this patch to nv84-a3 and make it nv84+

v3:
  - move the ack to fini()
  - disable IRQs on fini()
  - silently ignore un-requested IRQs

Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:43 +10:00
Ilia Mirkin
be0dd4ddef drm/nv31/mpeg: split the nv31 and nv40 dma setting implementations
NV31 has different config bits than NV40+ do. Also fix the DMA_IMAGE
VRAM-only setting to check the right bits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:42 +10:00
Ilia Mirkin
e6585cab68 drm/nv31/mpeg: store chan singleton in engine, use it for dispatch
This makes nv31+ able to actually perform the nv_call, since previously
the inst was not available.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:42 +10:00
Ilia Mirkin
912de74c81 drm/nv40/mpeg: use the nv31-provided classes
Since nv40 only covers pre-nv44 now, it can use the nv31-provided
functions.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:41 +10:00
Ilia Mirkin
5fa7543041 drm/nv44/mpeg: create a copy of the nv31/nv40 impls
The nv31/nv40 impls are actually fairly nv44-specific, since they assume
the presence of the instance register/context switching. Create a copy
before nv31/nv40 get fixed.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:41 +10:00
Ilia Mirkin
be4ba55046 drm/nv31/mpeg: no need to set compat mode differently for nv44 gr
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:40 +10:00
Ilia Mirkin
515de6b27f drm/nv10/kms: add plane support for nv10-nv40
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:40 +10:00
Ilia Mirkin
8aa816b0bb drm/nv10: fix chipset checks, mostly for the benefit of nv1a
NV1A is numerically higher than NV17 but generationally lower. Use the
new card type to help disambiguate.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:39 +10:00
Ilia Mirkin
4a0ff75418 drm/nv10: introduce a new NV_11 card type
NV11/17/1F/18 come after NV10/15/16/1A. In order to facilitate using
numerical comparisons, split up the two sets into different card types.

This change should be a no-op except that the relevant cards will see
NV11 printed instead of NV10 for the family.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:35 +10:00
Ilia Mirkin
73f4b1f893 drm/nouveau: fix backlight mask on ppc powerbook
This code was originally moved to using nv_mask by d31e078d84. This
should not have any actual effect since the mask isn't applied to the
value.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:08 +10:00
Ilia Mirkin
4449933a37 drm/nouveau: remove prototype for non-existent nouveau_connector_bpp
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:08 +10:00
Ben Skeggs
c42a7aec12 drm/nouveau/vic: rename PUNK1C1 to PVIC
NVIDIA's name for what rnndb calls PVCOMP.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:07 +10:00
Ben Skeggs
74ce291a49 drm/nouveau/therm: kill some over-zealous debugging
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:07 +10:00
Ben Skeggs
15689c3c81 drm/nouveau/core: split lock into list+exec and enable refcount locks
This fixes a reported locking inversion when interacting with the DRM
core's vblank routines.

Reviewed-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:06 +10:00
Ben Skeggs
51cb4b392a drm/nouveau/core: convert event handler apis to split create/enable semantics
This is a necessary step towards being able to work with the insane locking
requirements of the DRM core's vblank routines, and a nice cleanup as a
side-effect.

This is similar in spirit to the interfaces that Peter Hurley arrived at
with his nouveau_event rcu conversion series.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:06 +10:00
Ben Skeggs
7589563eb3 drm/nv50-/sw: share engine/channel constructor between implementations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:05 +10:00
Ben Skeggs
c46c3ddf1f drm/nouveau/sw: prepare for the sharing of constructors between implementations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:05 +10:00
Ben Skeggs
ef8d478147 drm/nv50-/sw: make vblank tracking data private to the implementations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:04 +10:00
Ben Skeggs
3bfcec35da drm/nv50-/sw: share engine/channel struct definitions between implementations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:04 +10:00
Peter Hurley
ac51bb0983 drm/nouveau/core: Allow asymmetric nouveau_event_get/_put
Most nouveau event handlers have storage in 'static' containers
(structures with lifetimes nearly equivalent to the drm_device),
but are dangerously reused via nouveau_event_get/_put. For
example, if nouveau_event_get is called more than once for a
given handler, the event handler list will be corrupted.

Signed-off-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:03 +10:00
Peter Hurley
019255797d drm/nouveau/core: Move event index check from critical section
The index_nr field is constant for the lifetime of the event, so
serialized access is unnecessary.

Signed-off-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:03 +10:00
Peter Hurley
a25f83ba89 drm/nouveau/core: Add priv field for event handlers
Provide private field for event handlers exclusive use.
Convert nouveau_fence_wait_uevent() and
nouveau_fence_wait_uevent_handler(); drop struct nouveau_fence_uevent.

Signed-off-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:02 +10:00
Dan Carpenter
ca3562226a drm/nouveau: off by one in nouveau_drm_vblank_enable()
The test here should be ">= ARRAY_SIZE()" instead of "> ARRAY_SIZE()".

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:02 +10:00
Dave Jones
1934a2add9 drm/nouveau: remove pointless assignment
self-assignment of a variable doesn't make a lot of sense.

Signed-off-by: Dave Jones <davej@fedoraproject.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:36:02 +10:00
Dave Airlie
212c444baa Merge branch 'ttm-next-3.13' of git://people.freedesktop.org/~thomash/linux into drm-next
- A couple of fixes that never made it into fixes-3.12
- Make NO_EVICT bo's available for shrinkers when on delayed-delete list
- Allow retrying page-faults that need to wait for GPU.

* 'ttm-next-3.13' of git://people.freedesktop.org/~thomash/linux:
  drm/ttm: Fix memory type compatibility check
  drm/ttm: Fix ttm_bo_move_memcpy
  drm/ttm: Handle in-memory region copies
  drm/ttm: Make NO_EVICT bos available to shrinkers pending destruction
  drm/ttm: Allow vm fault retries
2013-11-07 12:22:10 +10:00
Thomas Hellstrom
59c8e66378 drm/ttm: Fix memory type compatibility check
Also check the busy placements before deciding to move a buffer object.
Failing to do this may result in a completely unneccessary move within a
single memory type.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Cc: stable@vger.kernel.org
2013-11-06 04:36:22 -08:00