Commit Graph

3987 Commits

Author SHA1 Message Date
David Daney
4409af37b8 MIPS: perf: Cleanup formatting in arch/mips/kernel/perf_event.c
Get rid of a bunch of useless inline declarations, and join a bunch of
improperly split lines.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2793/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:26 +01:00
David Daney
4d36f59d87 MIPS: Add accessor macros for 64-bit performance counter registers.
Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2789/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:26 +01:00
David Daney
a1431b61a8 MIPS: Add probes for more Octeon II CPUs.
Detect cn61XX, cn66XX and cn68XX CPUs in cpu_probe_cavium().

Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2777/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:26 +01:00
David Daney
074ef0d275 MIPS: Add more CPU identifiers for Octeon II CPUs.
The CPU identifiers for cn68XX, cn66XX and cn61XX are known, so add
them.

Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2776/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:25 +01:00
Hillf Danton
b2788965ba MIPS: XLR, XLS: Add comment for smp setup
It seems that BSP could be setup twice, but the nlm_cpu_ready array is only
set for ASPs in smpboot.S, not including BSP.

Signed-off-by: Hillf Danton <dhillf@gmail.com>
Cc: "Jayachandran C." <jayachandranc@netlogicmicro.com>
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2695/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>,
2011-10-24 23:34:25 +01:00
Lars-Peter Clausen
933036386b MIPS: JZ4740: GPIO: Check correct IRQ in demux handler
Check the trigger direction for the triggered IRQ instead of the parent IRQ.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/2433/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:25 +01:00
Lars-Peter Clausen
fe5a8b7f06 MIPS: JZ4740: GPIO: Simplify IRQ demuxer
We already know the base IRQ for a GPIO chip, so there is no need to
recalculate it in the demux handler.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Lars-Peter Clausen <lars@metafoo.de>
Patchwork: http://patchwork.linux-mips.org/patch/2432/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:25 +01:00
Lars-Peter Clausen
83bc769200 MIPS: JZ4740: Use generic irq chip
Use the generic irq chip framework to implement the jz4740 INTC and GPIO irq
chips.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2434/
Patchwork: https://patchwork.linux-mips.org/patch/2771/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:25 +01:00
Manuel Lauss
3766386037 MIPS: Alchemy: remove all CONFIG_SOC_AU1??? defines
Now that no driver any longer depends on the CONFIG_SOC_AU1???  symbols,
it's time to get rid of them: Move some of the platform devices to the
boards which can use them, Rename a few (unused) constants in the header,
Replace them with MIPS_ALCHEMY in the various Kconfig files.  Finally
delete them altogether from the Alchemy Kconfig file.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2707/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:24 +01:00
Manuel Lauss
50d5676eba MIPS: Alchemy: kill au1xxx.h header
No longer required

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2705/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/include/asm/mach-au1x00/au1xxx.h
2011-10-24 23:34:24 +01:00
Manuel Lauss
f2e442fd2f MIPS: Alchemy: clean DMA code of CONFIG_SOC_AU1??? defines
This patch gets rid of all CONFIG_SOC_AU1XXX defines in
DMA/DBDMA-related code.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2704/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:24 +01:00
Manuel Lauss
d4f07ae748 MIPS, IDE: Alchem, au1xxx-ide: Remove pb1200/db1200 header dep
au1xxx-ide uses defines from the pb1200/db1200 headers:
get DBDMA ID through platform resource information,
hardcode register spacing.  The only 2 users of this driver (and
the only boards it can really work on realiably) use the same
register layout.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-ide@vger.kernel.org
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: linux-ide@vger.kernel.org
Acked-by: David S. Miller <davem@davemloft.net>
Patchwork: https://patchwork.linux-mips.org/patch/2716/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:24 +01:00
Manuel Lauss
7517de3486 MIPS: Alchemy: Redo PCI as platform driver
- Rewrite Alchemy PCI support as a platform driver.
- Fixup boards which have PCI.

Run-tested on DB1500 and DB1550.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2706/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/alchemy/common/pci.c
 delete mode 100644 arch/mips/pci/fixup-au1000.c
 delete mode 100644 arch/mips/pci/ops-au1000.c
 create mode 100644 arch/mips/pci/pci-alchemy.c
2011-10-24 23:34:24 +01:00
Manuel Lauss
7cc2e272da MIPS: Alchemy: more base address cleanup
remove all redundant peripheral base address defines, fix
all affected boards and drivers.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2700/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:24 +01:00
Manuel Lauss
b9581b8488 MIPS: Alchemy: rewrite USB platform setup.
Use runtime CPU detection to setup all USB parts.
Remove the Au1200 OTG and UDC platform devices since there are no
drivers for them anyway.
Clean up the USB address mess in the au1000 header.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2703/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:23 +01:00
Manuel Lauss
ce6bc92285 MIPS: Alchemy: abstract USB block control register access
Alchemy chips have one or more registers which control access
to the usb blocks as well as PHY configuration.  I don't want
the OHCI/EHCI glues to know about the different registers and bits;
new code hides the gory details of USB configuration from them.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: linux-usb@vger.kernel.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2709/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 create mode 100644 drivers/usb/host/alchemy-common.c
2011-10-24 23:34:23 +01:00
Manuel Lauss
694b8c35e9 MIPS: Remove __init from add_wired_entry()
For Alchemy-PCI I need to add a wired entry after resuming from RAM;
remove the __init from add_wired_entry() so that this actually works.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2684/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:23 +01:00
Manuel Lauss
ce1d43b9a9 MIPS: Alchemy: support multiple GPIO styles in one kernel
For GPIOLIB=y decide at runtime which gpiochips to register;
in the GPIOLIB=n case, the gpio headers need to be reshuffled
a bit to make multiple implementations coexist peacefully.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2679/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:23 +01:00
Manuel Lauss
2e8fd2e5ef MIPS: Alchemy: Always build power code
No reason NOT to build it

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2678/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:22 +01:00
Manuel Lauss
553737aa95 NET: au1000_eth: Pass MACDMA address through platform resource info.
This patch removes the last hardcoded base address from the au1000_eth
driver.  The base address of the MACDMA unit was derived from the
platform device id; if someone registered the MACs in inverse order
both would not work.
So instead pass the base address of the DMA unit to the driver with
the other platform resource information.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Acked-by: David S. Miller <davem@davemloft.net>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2674/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-24 23:34:22 +01:00
Aaro Koskinen
08fa624f50 MIPS: Fix build with C=1
When trying to compile the 3.1-rc10 kernel for my MIPS board with C=1
(sparse checking), the build fails early with the error:

	  CHK     include/linux/version.h
	  UPD     include/linux/version.h
	  CHK     include/generated/utsrelease.h
	  UPD     include/generated/utsrelease.h
	  Checking missing-syscalls for N32
	  CALL    scripts/checksyscalls.sh
	  Checking missing-syscalls for O32
	  CALL    scripts/checksyscalls.sh
	  CC      kernel/bounds.s
	  GEN     include/generated/bounds.h
	  CC      arch/mips/kernel/asm-offsets.s
	  GEN     include/generated/asm-offsets.h
	  CALL    scripts/checksyscalls.sh
	  HOSTCC  scripts/genksyms/genksyms.o
	  SHIPPED scripts/genksyms/lex.lex.c
	  SHIPPED scripts/genksyms/keywords.hash.c
	  SHIPPED scripts/genksyms/parse.tab.h
	  HOSTCC  scripts/genksyms/lex.lex.o
	  SHIPPED scripts/genksyms/parse.tab.c
	  HOSTCC  scripts/genksyms/parse.tab.o
	  HOSTLD  scripts/genksyms/genksyms
	/bin/sh: Syntax error: "(" unexpected
	make[3]: *** [scripts/mod/empty.o] Error 2
	make[2]: *** [scripts/mod] Error 2
	make[1]: *** [scripts] Error 2

It seems the shell chokes because sparse is called with command line
arguments such as:

	-D__INT8_C(c)='c'

Converting these to form:

	-D'__INT8_C(c)'='c'

seems to fix the problem.

[ralf@linux-mips.org: This affects builds with gcc 4.5 and newer.]

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2827/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20 15:00:20 +01:00
Ralf Baechle
2fd431085c MIPS: MSP71xx: Fix build error.
After the recent cleanup of the register_*_smp_ops() functions msp71xx
wasn't fixed to include the now necessary header resulting in:

/home/ralf/src/linux/upstream-linus/arch/mips/pmc-sierra/msp71xx/msp_setup.c: In function ‘prom_init’:
/home/ralf/src/linux/upstream-linus/arch/mips/pmc-sierra/msp71xx/msp_setup.c:231:2: error: implicit declaration of function ‘register_vsmp_smp_ops’ [-Werror=implicit-function-declaration]
cc1: all warnings being treated as errors

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20 15:00:19 +01:00
Ralf Baechle
d9beeecae6 MIPS: Don't install vmlinuz if compressed kernel has not been configured.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20 15:00:19 +01:00
Jayachandran C
39ad56805a MIPS: Netlogic: Specify architecture CFLAGS
Use -march=xlr if available, otherwise fallback to mips64. This allows
us to support compilation with MIPS toolchains which are not customized
for XLR.

[ralf@linux-mips.org: And more importantly it works around a gas bug in
binutils 2.21 which otherwise may result in an assertion failure building
arch/mips/kernel/genex.S.  See
http://sourceware.org/bugzilla/show_bug.cgi?id=12915 for details.]

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2534/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20 15:00:19 +01:00
Jayachandran C
a74e33535f MIPS:Netlogic:Fix section mismatch warnings.
Add __init and __cpuinit annotation to functions that need it.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2535/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20 15:00:19 +01:00
Ralf Baechle
b77bb37a2a Revert "MIPS: LD/SD o32 macro GAS fix update"
This reverts commit 97475f8b42e83be2966aa2d70ab9c98477701c53 (lmo) /
82b89152f0 (kernel.org) [MIPS: LD/SD o32
macro GAS fix update].

Turns out this patch is producing many build errors with gcc 4.2.  Based
on further testing with a test case extracted from the build errors found
further build errors and suboptimal generation even in violation of the
"R" constraint.

To make matters worse, the binutils changes also don't work quite as
intended so revert this patch for now.
2011-10-20 15:00:19 +01:00
Ralf Baechle
dd5d1380f1 MIPS: SNI: Fix conflicting wrapper symbols for headers.
If Open Firmware / Device Tree support is enabled on a SNI RM kernel both
<asm/mipsprom.h> and <asm/prom.h> will be included into some .c files.
Since both headers use the same wrapper symbol only the inclusion of the
first file will have an effect but the 2nd file will be ignored resulting
in a build error.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20 15:00:18 +01:00
Ralf Baechle
cba2efb64b MIPS: PNX8550: Fix section mismatch
Triggered by pnx8550-jbs_defconfig and pnx8550-stb810_defconfig:

WARNING: vmlinux.o(.text+0xc0c): Section mismatch in reference from the function prom_getcmdline() to the variable .init.data:arcs_cmdline
The function prom_getcmdline() references
the variable __initdata arcs_cmdline.
This is often because prom_getcmdline lacks a __initdata
annotation or the annotation of arcs_cmdline is wrong.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20 15:00:18 +01:00
Ralf Baechle
5db6acdb27 MIPS: 32-bit: Fix number of argument to epoll_wait.
The number of arguments only matters for syscalls with stack arguments that
is using 5 or more argument slots so this is just cosmetic fix.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20 15:00:18 +01:00
Ralf Baechle
901f616940 MIPS: IP27: Sort out section mismatch.
WARNING: vmlinux.o(.text+0x3059f8): Section mismatch in reference from the function pcibios_plat_dev_init() to the function .devinit.text:request_bridge_irq()
The function pcibios_plat_dev_init() references
the function __devinit request_bridge_irq().
This is often because pcibios_plat_dev_init lacks a __devinit
annotation or the annotation of request_bridge_irq is wrong.

Fixing this one leads to:

WARNING: vmlinux.o(.text+0x1790): Section mismatch in reference from the function request_bridge_irq() to the function .devinit.text:register_bridge_irq()
The function request_bridge_irq() references
the function __devinit register_bridge_irq().
This is often because request_bridge_irq lacks a __devinit
annotation or the annotation of register_bridge_irq is wrong.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20 15:00:18 +01:00
Ralf Baechle
d9cdc901af MIPS: cache: Provide cache flush operations for XFS
Until now flush_kernel_vmap_range() and invalidate_kernel_vmap_range() did
not exist on MIPS resulting in heavy cache corruption on XFS filesystems.

Left for the post-3.0 time: optimization and make this work with highmem,
too.  Since the combination of highmem + cache aliases atm doesn't work
this isn't a regression.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2505/
2011-10-20 15:00:18 +01:00
Nathan Lynch
8742cd2347 MIPS: Call oops_enter, oops_exit in die
This allows pause_on_oops and mtdoops to work.

Signed-off-by: Nathan Lynch <ntl@pobox.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2810/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-01 20:36:04 +01:00
David Daney
2f19d080fb MIPS: Octeon: Enable C0_UserLocal probing.
Octeon2 processor cores have a UserLocal register.  Remove the hard
coded negative probe and allow the standard probing to detect this
feature.

Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2578/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-24 01:44:41 +02:00
David Daney
0f4ccbc835 MIPS: No branches in delay slots for huge pages in handle_tlbl
For the case PM_DEFAULT_MASK == 0, we were placing a branch in the
delay slot of another branch.  This leads to undefined behavior.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2775/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:54:07 +02:00
David Daney
d968275921 MIPS: Don't clobber CP0_STATUS value for CONFIG_MIPS_MT_SMTC
Reported-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/2753/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:54:02 +02:00
David Daney
465aaed003 MIPS: Octeon: Select CONFIG_HOLES_IN_ZONE
Current Octeon systems do in fact have holes in their memory zones.
We need to select HOLES_IN_ZONE.  If we do not, some memory
configurations will result in crashes at boot time like this:

.
.
.
CPU 6 Unable to handle kernel paging request at virtual address 0000000000700000, epc == ffffffff8118fe00, ra == ffffffff8118fe9c
Oops[]:
Cpu 6
.
.
.
        ...
Call Trace:
[<ffffffff8118fe00>] setup_per_zone_wmarks+0x1b0/0x338
[<ffffffff815cd738>] init_per_zone_wmark_min+0x64/0xd0
[<ffffffff81100438>] do_one_initcall+0x38/0x160
.
.
.

Reported-by: Jason Kwon <jason.kwon@ericsson.com>
Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Cc: Jason Kwon <jason.kwon@ericsson.com>
Patchwork: https://patchwork.linux-mips.org/patch/2724/
Tested-by: Guenter Roeck<guenter.roeck@ericsson.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:56 +02:00
Rafael J. Wysocki
bd7100099a MIPS: PM: Use struct syscore_ops instead of sysdevs for PM (v2)
Convert some MIPS architecture's code to using struct syscore_ops
objects for power management instead of sysdev classes and sysdevs.

This simplifies the code and reduces the kernel's memory footprint.
It also is necessary for removing sysdevs from the kernel entirely in
the future.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Acked-and-tested-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-kernel@vger.kernel.org
Cc: "Rafael J.  Wysocki" <rjw@sisk.pl>
Patchwork: http://patchwork.linux-mips.org/patch/2431/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:51 +02:00
Yong Zhang
1eec6cd08b MIPS: Compat: Use 32-bit wrapper for compat_sys_futex.
We can't trust userspace to pass signed-extend arguments.  Not correctly
sign-extended arguments to futex-wait result in architecturally undefined
operation of 32-bit arithmetic instructions.

For example, if 'val' is too big and bit-31 is 1, the caller may enter
endless loop at:

futex_wait_setup()
{
	...

	if (uval != val) {
		queue_unlock(q, *hb);
		ret = -EWOULDBLOCK;

	...
}

Signed-off-by: Yong Zhang <yong.zhang@windriver.com>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2714/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:44 +02:00
Arnaud Lacombe
b8ecf341f1 MIPS: Do not use EXTRA_CFLAGS
Usage of these flags has been deprecated for nearly 4 years by:

    commit f77bf01425
    Author: Sam Ravnborg <sam@neptun.(none)>
    Date:   Mon Oct 15 22:25:06 2007 +0200

        kbuild: introduce ccflags-y, asflags-y and ldflags-y

Moreover, these flags (at least EXTRA_CFLAGS) have been documented for command
line use. By default, gmake(1) do not override command line setting, so this is
likely to result in build failure or unexpected behavior.

Replace their usage by Kbuild's `{as,cc,ld}flags-y'.

To: linux-kernel@vger.kernel.org
Cc: Sam Ravnborg <sam@ravnborg.org>
Patchwork: https://patchwork.linux-mips.org/patch/2710/
Cc: linux-mips@linux-mips.org
Signed-off-by: Arnaud Lacombe <lacombar@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:38 +02:00
Manuel Lauss
dd0a028183 MIPS: Alchemy: DB1200: Disable cascade IRQ in handler
Disable the cascade IRQ in the cascade handler.  This is required to
get the DB1300 working, and also gets rid of all spurious interrupts
previously observed on the DB1200; so Config[OD] can be disabled
again for better performance.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2708/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:32 +02:00
John Crispin
0596954681 MIPS: Lantiq: Fix setting the PCI bus speed on AR9
The bits used to set the PCI bus speed on AR9 are slightly different to
those used on Danube.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2614/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:18 +02:00
John Crispin
77fbdb30f0 MIPS: Lantiq: Fix external interrupt sources
The irq base offset needs to be ignored when matching irqs to external
interrupt pins. Taking the offset into account resulted in the EIU not
being brought up properly.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2616/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:12 +02:00
Ralf Baechle
d954ffe34a MIPS: tlbex: Fix build error in R3000 code.
Only some GCC versions such as gcc 4.2 notice that the variable wr in
build_r3000_tlb_modify_handler is used uninitialized.  When using one
of those GCCs the build will fail due to -Werror.  GCC 4.6 does not
warn about the uninitialized use of wr.

This issue was introduced by 7211f4d7a3dcbe57c5d396c334dca525315dceb2
[MIPS: Close races in TLB modify handlers.]

Reported-by: Ganesan Ramalingam <ganesan18@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:07 +02:00
Manuel Lauss
870168a031 MIPS: Alchemy: Include Au1100 in PM code.
The current code forgets the Au1100 when looking for the correct method to
suspend the chip.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2675/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:01 +02:00
Manuel Lauss
c78c488273 MIPS: Alchemy: Fix typo in MAC0 registration
Harmless typo which prints an error message although MAC0 was registered
successfully.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2672/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:52 +02:00
Ralf Baechle
a705dc7cf4 MIPS: MSP71xx: Fix build error.
CC      arch/mips/pmc-sierra/msp71xx/msp_irq.o
/home/ralf/src/linux/linux-mips/arch/mips/pmc-sierra/msp71xx/msp_irq.c:112:2: error: request for member ‘flags’ in something not a structure or union
/home/ralf/src/linux/linux-mips/arch/mips/pmc-sierra/msp71xx/msp_irq.c:118:2: error: request for member ‘flags’ in something not a structure or union
make[4]: *** [arch/mips/pmc-sierra/msp71xx/msp_irq.o] Error 1

caused by 57336bc1056798d89714b7fb1b1d197e6bda6819 [MIPS: Mark cascade and
low level interrupts IRQF_NO_THREAD].

Commas to separate struct initializers generally are considered useful to
enhance the compilation experience of the user.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:44 +02:00
Ralf Baechle
1f717929e9 MIPS: Handle __put_user() sleeping.
do_signal() does __put_user() which can fault, resulting in a might_sleep()
warning in down_read(&mm->mmap_sem) and a "scheduling while atomic" warning
when mmap_sem is contented. On Swarm this also results in:

WARNING: at kernel/smp.c:459 smp_call_function_many+0x148/0x398()
Modules linked in:
Call Trace:

[<ffffffff804b48a4>] dump_stack+0x1c/0x50
[<ffffffff8013dc94>] warn_slowpath_common+0x8c/0xc8
[<ffffffff8013dcfc>] warn_slowpath_null+0x2c/0x40
[<ffffffff801864a0>] smp_call_function_many+0x148/0x398
[<ffffffff80186748>] smp_call_function+0x58/0xa8
[<ffffffff80119b5c>] r4k_flush_data_cache_page+0x54/0xd8
[<ffffffff801f39bc>] handle_pte_fault+0xa9c/0xad0
[<ffffffff801f40d0>] handle_mm_fault+0x158/0x200
[<ffffffff80115548>] do_page_fault+0x218/0x3b0
[<ffffffff80102744>] ret_from_exception+0x0/0x10
[<ffffffff8010eb18>] copy_siginfo_to_user32+0x50/0x298
[<ffffffff8010edf0>] setup_rt_frame_32+0x90/0x250
[<ffffffff80106414>] do_notify_resume+0x154/0x358
[<ffffffff80102930>] work_notifysig+0xc/0x14

Fixed by enabling interrupts in do_notify_resume before delivering signals.

[ralf@linux-mips.org: Reported and original fix by tglx but I wanted to
minimize the amount of code being run with interrupts disabled so I moved
the local_irq_disable() call right into do_notify_resume.  Which is saner
than doing it in entry.S.]

Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:38 +02:00
Thomas Gleixner
0f462e3c12 MIPS: Allow forced irq threading
All low level interrupts have been marked NO_THREAD, so MIPS can enjoy
the wonderful world of forced threaded interrupt handlers.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2639/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:34 +02:00
Liming Wang
5c22cd4075 MIPS: i8259: Mark cascade interrupt non-threaded
Cascade interrupts cannot be threaded.

Signed-off-by: Liming Wang <liming.wang@windriver.com>
Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1314370804-21266-1-git-send-email-liming.wang@windriver.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2770/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:28 +02:00
Wu Zhangjin
77cbece767 MIPS: Loongson: Mark cascade interrupts IRQF_NO_THREAD
There are two cascade interrupts in Loongson machines, one for bonito
northbridge, another for the 8259A controller in the southbridge. Both
want to be non threaded.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/2638/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:22 +02:00