Add support to configure the GPIO pin to the specific configuration.
The GPIO pin can be configured as GPO, IRQ, SDOUT2, PDMCLK, MICBASE_EN,
GPI, MCLK, SDIN, PDMDIN1, PDMDIN2, PDMDIN3 or PDMDIN4 and the output
drive can be configured with various configuration.
Signed-off-by: Camel Guo <camelg@axis.com>
Link: https://lore.kernel.org/r/20200918114025.18205-2-camel.guo@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
As sai ip is upgraded, so update sai register list.
Shengjiu Wang (3):
ASoC: fsl_sai: Add new added registers and new bit definition
ASoC: fsl_sai: Add fsl_sai_check_version function
ASoC: fsl_sai: Set MCLK input or output direction
changes in v2:
- update commit message for first commit
- Add acked-by Nicolin
sound/soc/fsl/fsl_sai.c | 77 ++++++++++++++++++++++++++++++++++++
sound/soc/fsl/fsl_sai.h | 87 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 164 insertions(+)
--
2.27.0
Ak4458 can't support DSD512 format, but ak4497 can, so add
a new enum variable (enum ak4458_type) in ak4458_drvdata to
distinguish these two platforms.
Ak4497 has two kinds of DSD input pin, it can be selected by
the dsd-path property from DT.
In hw_params(), bit clock is calculated according to different
DSD format (DSD64, DSD128, DSD256, DSD512), then registers
are configured.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1600178220-28973-2-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Add code to allow the ASI Tx output to be placed into High-z mode
during unused ASI cycles. This allows for other devices that may be on
the bus to drive the ASI out. By default the 320adcx140 sends 0's for
unused cycles.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Link: https://lore.kernel.org/r/20200915190606.1744-4-dmurphy@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
To avoid the actual PLL settings to differ from the state expected by
the clock driver, the codec should only be fully reset before the clocks
are registered. But we also need to ensure that the software reset
happens at all before clock registration, as not all boards have a reset
GPIO.
Move the software reset from aic32x4_component_probe() to
aic32x4_probe() and reorder the reset and registration sequence:
1. Reset via GPIO (if available)
2. Reset via software
3. Register component
4. Register clocks
Note that aic32x4_component_probe() is only called after aic32x4_probe()
has finished, so the reset in aic32x4_component_probe() was happening too
late.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Link: https://lore.kernel.org/r/20200902133043.19504-2-matthias.schiffer@ew.tq-group.com
Signed-off-by: Mark Brown <broonie@kernel.org>
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING
Correct the interrupt flags, assuming the author of the code wanted some
logical behavior behind the name "ACTIVE_xxx", this is:
ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200908145954.4629-1-krzk@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds debug support for imx platforms. This is important in
order to gather information about the state of the DSP in case of an
oops and the reason for the oops.
This is done by checking if a message with a panic code has been placed
in the debug box, in the imx8_dsp_handle_request function from sof/imx.
If positive, the function imx8_dump, added in common, will be called.
The first step is to gather information about the registers, filename,
line number and stack by calling the imx8_get_registers, added in common.
Then the information will be printed to the console by calling the
get_status function.
Signed-off-by: Iulian Olaru <iulianolaru249@yahoo.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Reviewed-by: Daniel Baluta <daniel.baluta@gmail.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20200917105633.2579047-2-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Fix the BCLK inversion for DSP modes
This is how it is defined by ASoC:
* BCLK:
* - "normal" polarity means signal is available at rising edge of BCLK
* - "inverted" polarity means signal is available at falling edge of BCLK
The adcx140 defines the BCLK edge based on coding type.
The PCM (DSP_A/B) should drive on rising and sample on falling edge, so
from ASoC pov, it is IB_NF. But from the codec pov if it is configured in
DSP mode, then the BCLK should not be inverted, defaults to the coding
standard.
For i2s, it is NB_NF from ASoC pov (drive on falling, sample on rising).
>From the codec's pov BCLK should not invert either, as this is the default
for the coding.
So, inversion must take the format into account:
IB_NF + DSP_A/B == the codec bclk inversion should be disabled
NB_NF + DSP_A/B == the codec bclk inversion should be enabled
NB_NF + I2S == the codec bclk inversion should be disabled
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Link: https://lore.kernel.org/r/20200915190606.1744-2-dmurphy@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
It was observed that if the device was active and register writes were
performed there were some unwanted behaviors particularly when writing
the word length and some filter options. So when writing to the device
the device should be placed in sleep mode and then exit sleep mode once
the register update is complete.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Link: https://lore.kernel.org/r/20200915190606.1744-1-dmurphy@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
According to its datasheet, the digital gain should be -100 dB when
CHx_DVOL is 1 and 27 dB when CHx_DVOL is 255. But with the current
dig_vol_tlv, "Digital CHx Out Volume" shows 27.5 dB if CHx_DVOL is 255
and -95.5 dB if CHx_DVOL is 1. This commit fixes this bug.
Fixes: 689c7655b5 ("ASoC: tlv320adcx140: Add the tlv320adcx140 codec driver family")
Signed-off-by: Camel Guo <camelg@axis.com>
Link: https://lore.kernel.org/r/20200908090417.16695-1-camel.guo@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
When CONFIG_SND_CTL_VALIDATION is set, accesses to extended bytes
control generate spurious error messages when the size exceeds 512
bytes, such as
[ 11.224223] sof_sdw sof_sdw: control 2:0:0:EQIIR5.0 eqiir_coef_5:0:
invalid count 1024
In addition the error check returns -EINVAL which has the nasty side
effect of preventing applications accessing controls from working,
e.g.
root@plb:~# alsamixer
cannot load mixer controls: Invalid argument
It's agreed that the control interface has been abused since 2014, but
forcing a check should not prevent existing solutions from working.
This patch skips the checks conditionally if CONFIG_SND_CTL_VALIDATION
is set and the byte array provided by topology is > 512. This
preserves the checks for all other cases.
Fixes: 1a3232d2f6 ('ASoC: topology: Add support for TLV bytes controls')
BugLink: https://github.com/thesofproject/linux/issues/2430
Reported-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Jaska Uimonen <jaska.uimonen@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20200917103912.2565907-1-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The series reuses mt8183-da7219-max98357.c for supporting machine
driver with rt1015p speaker amplifier.
The 1st patch adds document for the new proposed compatible string.
The 2nd patch changes the machine driver to support "RT1015P" codec.
Tzung-Bi Shih (2):
ASoC: dt-bindings: mt8183-da7219: add compatible string for using
rt1015p
ASoC: mediatek: mt8183-da7219: support machine driver with rt1015p
.../bindings/sound/mt8183-da7219-max98357.txt | 1 +
sound/soc/mediatek/Kconfig | 1 +
.../mediatek/mt8183/mt8183-da7219-max98357.c | 40 +++++++++++++++++++
3 files changed, 42 insertions(+)
--
2.28.0.526.ge36021eeef-goog
Hi,
Changes since v1:
- Suffix the 2359296000 constant with 'u' to silence C90 warning
When j7200 SOM is connected to the CPB, the audio setup is a bit different:
Only 48KHz family have clock path, 44.1KHz is not supported.
Update the binding documentation and add support for the j7200 version of CPB
to the driver.
Regards,
Peter
---
Peter Ujfalusi (2):
ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb
ASoC: ti: j721e-evm: Add support for j7200-cpb audio
.../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++-----
sound/soc/ti/j721e-evm.c | 11 +++
2 files changed, 81 insertions(+), 22 deletions(-)
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Enable support of pm_runtime on STM32 SAI driver to allow
SAI power state monitoring.
pm_runtime_put_autosuspend() is called from ASoC framework
on pcm device close.
The pmdown_time delay is available in runtime context, and may be set
in SAI driver to take into account shutdown delay on playback.
However, this shutdown delay is already handled in the DAPMs
of the audio codec linked to SAI CPU DAI.
So, the choice is made, not to support this delay on CPU DAI side.
Signed-off-by: Olivier Moysan <olivier.moysan@st.com>
Link: https://lore.kernel.org/r/20200911081507.7276-1-olivier.moysan@st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
