Commit Graph

100 Commits

Author SHA1 Message Date
Will Deacon
4aff7b8546 dt-bindings: arm, gic-v3: require that reserved cells are always 0
The arm,gic-v3 binding was written with good intentions and doesn't
enforce interrupt-cells to be 3, therefore making it easy to extend
the irq description in future if necessary:

  > Cells 4 and beyond are reserved for future use.

Unfortunately, this sentence is immediately followed up with:

  > When the 1st cell has a value of 0 or 1, cells 4 and beyond act as
  > padding, and may be ignored. It is recommended that padding cells
  > have a value of 0.

Consequently, any extensions to the PPI or SPI interrupt specifiers must
be able to work with random crap from legacy DTs, effectively
necessitating a new interrupt type in the first cell. Sigh.

This patch fixes the text so that additional, reserved cells are
required to be zero. This looks like a reasonable thing to require and
is already satisifed by the .dts files in-tree.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2016-02-12 16:15:25 -06:00
Linus Torvalds
e2464688b5 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for MIPS for 4.5 plus some 4.4 fixes.

  The executive summary:

   - ATH79 platform improvments, use DT bindings for the ATH79 USB PHY.
   - Avoid useless rebuilds for zboot.
   - jz4780: Add NEMC, BCH and NAND device tree nodes
   - Initial support for the MicroChip's DT platform.  As all the device
     drivers are missing this is still of limited use.
   - Some Loongson3 cleanups.
   - The unavoidable whitespace polishing.
   - Reduce clock skew when synchronizing the CPU cycle counters on CPU
     startup.
   - Add MIPS R6 fixes.
   - Lots of cleanups across arch/mips as fallout from KVM.
   - Lots of minor fixes and changes for IEEE 754-2008 support to the
     FPU emulator / fp-assist software.
   - Minor Ralink, BCM47xx and bcm963xx platform support improvments.
   - Support SMP on BCM63168"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (84 commits)
  MIPS: zboot: Add support for serial debug using the PROM
  MIPS: zboot: Avoid useless rebuilds
  MIPS: BMIPS: Enable ARCH_WANT_OPTIONAL_GPIOLIB
  MIPS: bcm63xx: nvram: Remove unused bcm63xx_nvram_get_psi_size() function
  MIPS: bcm963xx: Update bcm_tag field image_sequence
  MIPS: bcm963xx: Move extended flash address to bcm_tag header file
  MIPS: bcm963xx: Move Broadcom BCM963xx image tag data structure
  MIPS: bcm63xx: nvram: Use nvram structure definition from header file
  MIPS: bcm963xx: Add Broadcom BCM963xx board nvram data structure
  MAINTAINERS: Add KVM for MIPS entry
  MIPS: KVM: Add missing newline to kvm_err()
  MIPS: Move KVM specific opcodes into asm/inst.h
  MIPS: KVM: Use cacheops.h definitions
  MIPS: Break down cacheops.h definitions
  MIPS: Use EXCCODE_ constants with set_except_vector()
  MIPS: Update trap codes
  MIPS: Move Cause.ExcCode trap codes to mipsregs.h
  MIPS: KVM: Make kvm_mips_{init,exit}() static
  MIPS: KVM: Refactor added offsetof()s
  MIPS: KVM: Convert EXPORT_SYMBOL to _GPL
  ...
2016-01-24 12:50:56 -08:00
Cristian Birsan
edf2194dc9 dt/bindings: Add bindings for PIC32 interrupt controller
Document the devicetree bindings for the interrupt controller on
Microchip PIC32 class devices.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12093/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-01-24 02:51:19 +01:00
Linus Torvalds
6d1c244803 ARM: DT updates for v4.5
As usual, the bulk of this release is again DT file contents.
 
 There's a huge number of changes here, and it's challenging to give a crisp
 overview of just what is in here. To start with:
 
 New boards:
 
 - TI-based DM3730 from LogicPD (Torpedo)
 - Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
 - Raspberry Pi 2 DT files
 - Watchdog on Meson8b
 - Veyron-mickey (ASUS Chromebit) DTS
 - Rockchip rk3228 SoC and eval board
 - Sigma Designs Tango4
 
 Improvements:
 
 - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
 - Misc new devices for Rockchip rk3036 and rk3288
 - Allwinner updates for misc SoCs and systems
 
 ... and a _large_ number of other changes across the field. Devices
 added to SoC DTSI and board DTS files for a number of SoC vendors, new
 product boards on already-supported SoCs, cleanups and refactorings of
 existing DTS/DTSI files and a bunch of other changes.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "As usual, the bulk of this release is again DT file contents.

  There's a huge number of changes here, and it's challenging to give a
  crisp overview of just what is in here.  To start with:

  New boards:

   - TI-based DM3730 from LogicPD (Torpedo)
   - Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
   - Raspberry Pi 2 DT files
   - Watchdog on Meson8b
   - Veyron-mickey (ASUS Chromebit) DTS
   - Rockchip rk3228 SoC and eval board
   - Sigma Designs Tango4

  Improvements:

   - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
   - Misc new devices for Rockchip rk3036 and rk3288
   - Allwinner updates for misc SoCs and systems

  ... and a _large_ number of other changes across the field.  Devices
  added to SoC DTSI and board DTS files for a number of SoC vendors, new
  product boards on already-supported SoCs, cleanups and refactorings of
  existing DTS/DTSI files and a bunch of other changes"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits)
  ARM: dts: compulab: add new board description
  ARM: versatile: add the syscon LEDs to the DT
  dts: vt8500: Fix errors in SDHC node for WM8505
  ARM: dts: imx6q: clean up unused ipu2grp
  ARM: dts: silk: Add compatible property to "partitions" node
  ARM: dts: gose: Add compatible property to "partitions" node
  ARM: dts: porter: Add compatible property to "partitions" node
  ARM: dts: koelsch: Add compatible property to "partitions" node
  ARM: dts: lager: Add compatible property to "partitions" node
  ARM: dts: bockw: Add compatible property to "partitions" node
  ARM: dts: meson8b: Add watchdog node
  Documentation: watchdog: Add new bindings for meson8b
  ARM: meson: Add status LED for Odroid-C1
  ARM: dts: uniphier: fix a typo in comment block
  ARM: bcm2835: Add the auxiliary clocks to the device tree.
  ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B
  ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT.
  ARM: bcm2835: Split the DT for peripherals from the DT for the CPU
  ARM: realview: set up cache correctly on the PB11MPCore
  ARM: dts: Unify G2D device node with other devices on exynos4
  ...
2016-01-20 18:16:29 -08:00
Linus Torvalds
5339f9d4c2 DeviceTree updates for 4.5:
- Rework and export the changeset API to make it available to users
 other than DT overlays
 
 - ARM secure devices binding
 
 - OCTEON USB binding
 
 - Clean-up of various SRAM binding docs
 
 - Various other binding doc updates
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Merge tag 'devicetree-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull DeviceTree updates from Rob Herring:

 - Rework and export the changeset API to make it available to users
   other than DT overlays

 - ARM secure devices binding

 - OCTEON USB binding

 - Clean-up of various SRAM binding docs

 - Various other binding doc updates

* tag 'devicetree-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (21 commits)
  drivers/of: Export OF changeset functions
  Fix documentation for adp1653 DT
  ARM: psci: Fix indentation in DT bindings
  of/platform: export of_default_bus_match_table
  of/unittest: Show broken behaviour in the platform bus
  of: fix declaration of of_io_request_and_map
  of/address: replace printk(KERN_ERR ...) with pr_err(...)
  of/irq: optimize device node matching loop in of_irq_init()
  dt-bindings: tda998x: Document the required 'port' node.
  net/macb: bindings doc: Merge cdns-emac to macb
  dt-bindings: Misc fix for the ATH79 DDR controllers
  dt-bindings: Misc fix for the ATH79 MISC interrupt controllers
  Documentation: dt: Add bindings for Secure-only devices
  dt-bindings: ARM: add arm,cortex-a72 compatible string
  ASoC: Atmel: ClassD: add GCK's parent clock in DT binding
  DT: add Olimex to vendor prefixes
  Documentation: fsl-quadspi: Add fsl,ls1021-qspi compatible string
  Documentation/devicetree: document OCTEON USB bindings
  usb: misc: usb3503: Describe better how to bind clock to the hub
  dt-bindings: Consolidate SRAM bindings from all vendors
  ...
2016-01-14 11:13:28 -08:00
Damien Riegel
0f6d785c84 irqchip/ts4800: Add documentation for TS-4800 interrupt controller
This is an interrupt-controller implemented in an FPGA, to multiplex
interrupts generated from other IPs. The FPGA usually uses a GPIO as a
parent interrupt controller to notify that one of the multiplexed
interrupts has triggered.

Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: kernel@savoirfairelinux.com
Link: http://lkml.kernel.org/r/1450728683-31416-1-git-send-email-damien.riegel@savoirfairelinux.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-12-29 11:58:53 +01:00
Thomas Gleixner
5c4acd97e8 irqchip core changes for v4.5
- renesas-intc-irqpin: Remove platform code, improve clock handling
  - sunxi-nmi: Extend NMI support to include A80
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Merge tag 'irqchip-core-v4.5' of git://git.infradead.org/users/jcooper/linux into irq/core

Pull irqchip core changes for v4.5 from Jason Cooper:

 - renesas-intc-irqpin: Remove platform code, improve clock handling

 - sunxi-nmi: Extend NMI support to include A80
2015-12-29 10:25:20 +01:00
Thomas Gleixner
4e8dbe9e93 Merge branch 'irq/gic-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull the GIC related updates from Marc Zyngier:

 "Not a lot this time (what a relief!), but an interesting series from
  Linus Walleij coming out of his work converting the ARM RealView
  platforms to DT, and a couple of mundane fixes."
2015-12-19 12:16:20 +01:00
Ma Jun
752b1b94e6 dt-bindings: Documents the mbigen bindings
Add the mbigen msi interrupt controller bindings document.

This patch based on Mark Rutland's patch
https://lkml.org/lkml/2015/7/23/558

Signed-off-by: Ma Jun <majun258@huawei.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-12-18 11:44:20 +00:00
Linus Walleij
126aebd055 irqchip/gic: Fix ARM11MPCore GIC bindings
The GIC bindings for the ARM11MPCore need to differentiate between
the GIC on the Test Chip and the one on the evaluation baseboard.
Split the binding in two and define new compatible-strings.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-12-16 15:30:50 +00:00
Alban Bedel
ef8322427e dt-bindings: Misc fix for the ATH79 MISC interrupt controllers
Add a missing quote in the example

Signed-off-by: Alban Bedel <albeu@free.fr>
CC: trivial@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
2015-12-09 15:30:50 -06:00
Chen-Yu Tsai
cc66ef3c39 irqchip/sunxi-nmi: Add sun9i-a80 variant to binding doc
sun9i A80 introduces a new variant of the NMI controller. The registers
are reordered, but the functionality remains the same.

Add a new compatible string for it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lkml.kernel.org/r/1449130813-22400-3-git-send-email-wens@csie.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-12-03 12:53:39 +00:00
Chen-Yu Tsai
57e7b08263 irqchip/sunxi-nmi: Rename binding doc filename to allwinner,sunxi-nmi.txt
The NMI controller is found in all Allwinner multi-core SoCs. It is not
limited to sun[67]i, nor is it always found in the "system controller"
block. On sun[68]i, it is in the RTC block, while on sun9i, it is in the
PRCM block.

Drop these 2 specific bits from the binding doc filename.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lkml.kernel.org/r/1449130813-22400-2-git-send-email-wens@csie.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-12-03 12:52:15 +00:00
Erin Lo
02eca17376 Document: DT: Add bindings for mediatek MT2701 SoC Platform
This adds a DT binding documentation for the MT2701 SoC from Mediatek.

Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-11-20 13:59:04 +01:00
Linus Torvalds
9bbd4b9f38 DeviceTree updates for 4.4:
- DT binding doc consolidation moving similar bindings to common
   locations. The majority of these are display related which were
   scattered in video/, fb/, drm/, gpu/, and panel/ directories.
 - Add new config option, CONFIG_OF_ALL_DTBS, to enable building all dtbs
   in the tree for most arches with dts files (except powerpc for now).
 - OF_IRQ=n fixes for user enabled CONFIG_OF.
 - of_node_put ref counting fixes from Julia Lawall.
 - Common DT binding for wakeup-source and deprecation of all similar
   bindings.
 - DT binding for PXA LCD controller.
 - Allow ignoring failed PCI resource translations in order to ignore
   64-bit addresses on non-LPAE 32-bit kernels.
 - Support setting the NUMA node from DT instead of only from parent
   device.
 - Couple of earlycon DT parsing fixes for address and options.
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Merge tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull DeviceTree updates from Rob Herring:
 "A fairly large (by DT standards) pull request this time with the
  majority being some overdue moving DT binding docs around to
  consolidate similar bindings.

   - DT binding doc consolidation moving similar bindings to common
     locations.  The majority of these are display related which were
     scattered in video/, fb/, drm/, gpu/, and panel/ directories.

   - Add new config option, CONFIG_OF_ALL_DTBS, to enable building all
     dtbs in the tree for most arches with dts files (except powerpc for
     now).

   - OF_IRQ=n fixes for user enabled CONFIG_OF.

   - of_node_put ref counting fixes from Julia Lawall.

   - Common DT binding for wakeup-source and deprecation of all similar
     bindings.

   - DT binding for PXA LCD controller.

   - Allow ignoring failed PCI resource translations in order to ignore
     64-bit addresses on non-LPAE 32-bit kernels.

   - Support setting the NUMA node from DT instead of only from parent
     device.

   - Couple of earlycon DT parsing fixes for address and options"

* tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (45 commits)
  MAINTAINERS: update DT binding doc locations
  devicetree: add Sigma Designs vendor prefix
  of: simplify arch_find_n_match_cpu_physical_id() function
  Documentation: arm: Fixed typo in socfpga fpga mgr example
  Documentation: devicetree: fix reference to legacy wakeup properties
  Documentation: devicetree: standardize/consolidate on "wakeup-source" property
  drivers: of: removing assignment of 0 to static variable
  xtensa: enable building of all dtbs
  mips: enable building of all dtbs
  metag: enable building of all dtbs
  metag: use common make variables for dtb builds
  h8300: enable building of all dtbs
  arm64: enable building of all dtbs
  arm: enable building of all dtbs
  arc: enable building of all dtbs
  arc: use common make variables for dtb builds
  of: add config option to enable building of all dtbs
  of/fdt: fix error checking for earlycon address
  of/overlay: add missing of_node_put
  of/platform: add missing of_node_put
  ...
2015-11-06 12:17:09 -08:00
Rob Herring
eb3fcf007f dt-bindings: consolidate interrupt controller bindings
Move various interrupt controller bindings into the
interrupt-controller/ directory.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: linux-mediatek@lists.infradead.org
2015-10-22 09:21:25 -05:00
Rob Herring
d9d41df3e8 dt-bindings: consolidate various misc bindings
Move various bindings in misc to appropriate subsystem directories.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
2015-10-22 09:21:23 -05:00
Thomas Gleixner
e50226b4b8 Merge branch 'linus' into irq/core
Bring in upstream updates for patches which depend on them
2015-10-13 19:00:14 +02:00
Magnus Damm
e7dbe2da5e irqchip/renesas-irqc: Add r8a7795 INTC-EX DT documentation
For some reason the name of the external interrupt controller
has changed name with r8a7795, so use "intc-ex" instead of "irqc"
as r8a7795 compat string to follow the friendly documentation.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: horms@verge.net.au
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: jason@lakedaemon.net
Cc: Magnus Damm <magnus.damm@gmail.com>
Link: http://lkml.kernel.org/r/20150928094228.32552.83336.sendpatchset@little-apple
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-09-29 20:41:00 +02:00
Alexander Couzens
19446da415 MIPS: ATH79: Add irq chip ar7240-misc-intc
The ar7240 misc irq chip use ack handler
instead of ack_mask handler. All new ath79 chips use
the ar7240 misc irq chip

Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Acked-by: Alban Bedel <albeu@free.fr>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11164/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-09-22 19:07:11 +02:00
Linus Torvalds
f1a3c0b933 DeviceTree updates for 4.3:
- Adding Frank Rowand as DT maintainer in preparation for Grant's
   retirement.
 - Generic MSI binding documentation and a few other minor doc updates
 - Fix long standing issue with DT platorm device unregistration
 - Fix loop forever bug in of_find_matching_node_by_address()
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Merge tag 'devicetree-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 - added Frank Rowand as DT maintainer in preparation for Grant's
   retirement.
 - generic MSI binding documentation and a few other minor doc updates
 - fix long standing issue with DT platorm device unregistration
 - fix loop forever bug in of_find_matching_node_by_address()

* tag 'devicetree-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  MAINTAINERS: Add Frank Rowand as DT maintainer
  mtd: nand: pxa3xx: add optional dma for pxa architecture
  Documentation: DT: cpsw: document missing compatible
  Docs: dt: add generic MSI bindings
  drivercore: Fix unregistration path of platform devices
  of/address: Don't loop forever in of_find_matching_node_by_address().
  of: Add vendor prefix for JEDEC Solid State Technology Association
  of/platform: add function to populate default bus
  of: Add vendor prefix for Sharp Corporation
2015-09-01 19:37:56 -07:00
Mark Rutland
126b16e2ad Docs: dt: add generic MSI bindings
Currently msi-parent is used in a couple of drivers despite being fairly
underspecified. This patch adds a generic binding for MSIs (including
the existing msi-parent property) enabling the description of platform
devices capable of using MSIs.

While MSIs are primarily distinguished by doorbell and payload, some MSI
controllers (e.g. the GICv3 ITS) also use side-band information
accompanying the write to identify the master which originated the MSI,
to allow for sandboxing. This sideband information is non-probeable and
needs to be described in the DT. Other MSI controllers may have
additional configuration details which need to be described per-master.

This patch adds a generic msi-parent binding document, extending the
de-facto standard with a new (optional) #msi-cells which can be used to
express any per-master configuration and/or sideband data. This is
sufficient to describe non-hotpluggable devices.

For busses where sideband data may be derived from some bus-specific
master ID scheme, other properties will be required to describe the
mapping.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2015-08-25 11:29:57 -05:00
Eric Anholt
815e7a31c3 irqchip: Add documentation for the bcm2836 interrupt controller
This is a new per-cpu root interrupt controller on the Raspberry Pi 2,
which will chain to the bcm2835 interrupt controller for peripheral
interrupts.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: linux-rpi-kernel@lists.infradead.org
Cc: Lee Jones <lee@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1438902033-31477-4-git-send-email-eric@anholt.net
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-08-20 22:38:42 +02:00
Eric Anholt
a493f339a8 irqchip/bcm2835: Add support for being used as a second level controller
The BCM2836 (Raspberry Pi 2) uses two levels of interrupt handling
with the CPU-local interrupts being the root, so we need to register
ours as chained off of the CPU's local interrupt.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: linux-rpi-kernel@lists.infradead.org
Cc: Lee Jones <lee@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1438902033-31477-3-git-send-email-eric@anholt.net
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-08-20 22:38:41 +02:00
Linus Torvalds
78c10e556e Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:

 - Improvements to the tlb_dump code
 - KVM fixes
 - Add support for appended DTB
 - Minor improvements to the R12000 support
 - Minor improvements to the R12000 support
 - Various platform improvments for BCM47xx
 - The usual pile of minor cleanups
 - A number of BPF fixes and improvments
 - Some improvments to the support for R3000 and DECstations
 - Some improvments to the ATH79 platform support
 - A major patchset for the JZ4740 SOC adding support for the CI20 platform
 - Add support for the Pistachio SOC
 - Minor BMIPS/BCM63xx platform support improvments.
 - Avoid "SYNC 0" as memory barrier when unlocking spinlocks
 - Add support for the XWR-1750 board.
 - Paul's __cpuinit/__cpuinitdata cleanups.
 - New Malta CPU board support large memory so enable ZONE_DMA32.

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (131 commits)
  MIPS: spinlock: Adjust arch_spin_lock back-off time
  MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA
  MIPS: BCM47xx: Simplify handling SPROM revisions
  MIPS: Cobalt Don't use module_init in non-modular MTD registration.
  MIPS: BCM47xx: Move NVRAM driver to the drivers/firmware/
  MIPS: use for_each_sg()
  MIPS: BCM47xx: Don't select BCMA_HOST_PCI
  MIPS: BCM47xx: Add helper variable for storing NVRAM length
  MIPS: IRQ/IP27: Move IRQ allocation API to platform code.
  MIPS: Replace smp_mb with release barrier function in unlocks.
  MIPS: i8259: DT support
  MIPS: Malta: Basic DT plumbing
  MIPS: include errno.h for ENODEV in mips-cm.h
  MIPS: Define GCR_GIC_STATUS register fields
  MIPS: BPF: Introduce BPF ASM helpers
  MIPS: BPF: Use BPF register names to describe the ABI
  MIPS: BPF: Move register definition to the BPF header
  MIPS: net: BPF: Replace RSIZE with SZREG
  MIPS: BPF: Free up some callee-saved registers
  MIPS: Xtalk: Update xwidget.h with known Xtalk device numbers
  ...
2015-06-27 12:44:34 -07:00
Linus Torvalds
55a7d4b85c h8300 pull request for 4.2
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Merge tag 'for-4.2' of git://git.sourceforge.jp/gitroot/uclinux-h8/linux

Pull Renesas H8/300 architecture re-introduction from Yoshinori Sato.

We dropped arch/h8300 two years ago as stale and old, this is a new and
more modern rewritten arch support for the same architecture.

* tag 'for-4.2' of git://git.sourceforge.jp/gitroot/uclinux-h8/linux: (27 commits)
  h8300: fix typo.
  h8300: Always build dtb
  h8300: Remove ARCH_WANT_IPC_PARSE_VERSION
  sh-sci: Get register size from platform device
  clk: h8300: fix error handling in h8s2678_pll_clk_setup()
  h8300: Symbol name fix
  h8300: devicetree source
  h8300: configs
  h8300: IRQ chip driver
  h8300: clocksource
  h8300: clock driver
  h8300: Build scripts
  h8300: library functions
  h8300: Memory management
  h8300: miscellaneous functions
  h8300: process helpers
  h8300: compressed image support
  h8300: Low level entry
  h8300: kernel startup
  h8300: Interrupt and exceptions
  ...
2015-06-25 13:07:24 -07:00
Yoshinori Sato
8a7644821a h8300: IRQ chip driver
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
2015-06-23 13:35:56 +09:00
Alban Bedel
bb35586fd0 DEVICETREE: Add bindings for the ATH79 MISC interrupt controllers
Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-21 21:54:03 +02:00
Alban Bedel
0fa4af8f53 DEVICETREE: Add bindings for the ATH79 interrupt controllers
Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-21 21:54:03 +02:00
Paul Burton
5f408ebfd2 devicetree: document Ingenic SoC interrupt controller binding
Add binding documentation for Ingenic SoC interrupt controllers.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10134/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-21 21:52:56 +02:00
Nicolas Ferre
62a993df31 irqchip: atmel-aic5: Add sama5d2 support
Add sama5d2 support to irq-atmel-aic5.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Boris BREZILLON <boris.brezillon@free-electrons.com>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Ludovic Desroches <ludovic.desroches@atmel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: <linux-arm-kernel@lists.infradead.org>
Link: http://lkml.kernel.org/r/1434632855-27272-1-git-send-email-nicolas.ferre@atmel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-06-18 15:29:52 +02:00
Geert Uytterhoeven
496c28b13e irqchip: renesas: intc-irqpin: Improve binding documentation
Add missing documentation for required properties:
  - interrupt-controller,
  - parent interrupts (one entry per provided interrupt).

Add missing documentation for optional properties:
  - functional clock (managed since commit 705bc96c2c ("irqchip:
    renesas-intc-irqpin: Add minimal runtime PM support")),
  - power-domains.

Add an example, taken from r8a7740.dtsi.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1432891663-23641-1-git-send-email-geert%2Brenesas@glider.be
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-06-05 22:26:33 +02:00
Linus Torvalds
bfaf245022 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for MIPS for Linux 4.1.  Most
  noteworthy:

   - Add more Octeon-optimized crypto functions
   - Octeon crypto preemption and locking fixes
   - Little endian support for Octeon
   - Use correct CSR to soft reset Octeons
   - Support LEDs on the Octeon-based DSR-1000N
   - Fix PCI interrupt mapping for the Octeon-based DSR-1000N
   - Mark prom_free_prom_memory() as __init for a number of systems
   - Support for Imagination's Pistachio SOC.  This includes arch and
     CLK bits.  I'd like to merge pinctrl bits later
   - Improve parallelism of csum_partial for certain pipelines
   - Organize DTB files in subdirs like other architectures
   - Implement read_sched_clock for all MIPS platforms other than
     Octeon
   - Massive series of 38 fixes and cleanups for the FPU emulator /
     kernel
   - Further FPU remulator work to support new features.  This sits on a
     separate branch which also has been pulled into the 4.1 KVM branch
   - Clean up and fixes for the SEAD3 eval board; remove unused file
   - Various updates for Netlogic platforms
   - A number of small updates for Loongson 3 platforms
   - Increase the memory limit for ATH79 platforms to 256MB
   - A fair number of fixes and updates for BCM47xx platforms
   - Finish the implementation of XPA support
   - MIPS FDC support.  No, not floppy controller but Fast Debug Channel :)
   - Detect the R16000 used in SGI legacy platforms
   - Fix Kconfig dependencies for the SSB bus support"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (265 commits)
  MIPS: Makefile: Fix MIPS ASE detection code
  MIPS: asm: elf: Set O32 default FPU flags
  MIPS: BCM47XX: Fix detecting Microsoft MN-700 & Asus WL500G
  MIPS: Kconfig: Disable SMP/CPS for 64-bit
  MIPS: Hibernate: flush TLB entries earlier
  MIPS: smp-cps: cpu_set FPU mask if FPU present
  MIPS: lose_fpu(): Disable FPU when MSA enabled
  MIPS: ralink: add missing symbol for RALINK_ILL_ACC
  MIPS: ralink: Fix bad config symbol in PCI makefile.
  SSB: fix Kconfig dependencies
  MIPS: Malta: Detect and fix bad memsize values
  Revert "MIPS: Avoid pipeline stalls on some MIPS32R2 cores."
  MIPS: Octeon: Delete override of cpu_has_mips_r2_exec_hazard.
  MIPS: Fix cpu_has_mips_r2_exec_hazard.
  MIPS: kernel: entry.S: Set correct ISA level for mips_ihb
  MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case
  MIPS: r4kcache: Use correct base register for MIPS R6 cache flushes
  MIPS: Kconfig: Fix typo for the r2-to-r6 emulator kernel parameter
  MIPS: unaligned: Fix regular load/store instruction emulation for EVA
  MIPS: unaligned: Surround load/store macros in do {} while statements
  ...
2015-04-17 15:50:54 -04:00
Linus Torvalds
96d928ed75 Xtensa changes and fixes for 4.1
- fix linker script transformation for .text / .text.fixup
 - wire bpf and execveat syscalls;
 - provide __NR_sync_file_range2 instead of __NR_sync_file_range, as that's
   what xtensa uses.
 
 - make xtfpgs LCD driver functional and configurable. This fixes hardware
   lockup on KC705/ML605 boot;
 - add audio subsystem bits to xtfpga DTS and provide sample KC705 config
   with audio features enabled.
 - add CY7C67300 USB controller support to XTFPGA.
 - fix locking issues in ISS network driver;
 - document PIC and MX interrupt distributor device tree bindings;
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Merge tag 'xtensa-20150416' of git://github.com/czankel/xtensa-linux

Pull Xtensa updates from Chris Zankel:

 - fix linker script transformation for .text / .text.fixup

 - wire bpf and execveat syscalls

 - provide __NR_sync_file_range2 instead of __NR_sync_file_range, as
   that's what xtensa uses.

 - make xtfpgs LCD driver functional and configurable.  This fixes
   hardware lockup on KC705/ML605 boot

 - add audio subsystem bits to xtfpga DTS and provide sample KC705
   config with audio features enabled

 - add CY7C67300 USB controller support to XTFPGA

 - fix locking issues in ISS network driver

 - document PIC and MX interrupt distributor device tree bindings

* tag 'xtensa-20150416' of git://github.com/czankel/xtensa-linux:
  xtensa: xtfpga: add CY7C67300 USB controller support
  irqchip: xtensa-pic: xtensa-mx: document DT bindings
  xtensa: ISS: fix locking in TAP network adapter
  xtensa: Fix fix linker script transformation for .text / .text.fixup
  xtensa: provide __NR_sync_file_range2 instead of __NR_sync_file_range
  xtensa: wire bpf and execveat syscalls
  xtensa: xtfpga: fix hardware lockup caused by LCD driver
  xtensa: xtfpga: provide defconfig with audio subsystem
  xtensa: xtfpga: add audio card to xtfpga DTS
2015-04-17 15:32:30 -04:00
Max Filippov
b67c961cb8 irqchip: xtensa-pic: xtensa-mx: document DT bindings
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-04-13 09:02:45 +03:00
Jason Cooper
07c523f149 Merge branch 'irqchip/stacked-omap' into irqchip/core 2015-04-10 22:57:56 +00:00
Jason Cooper
37b25fffd1 Merge branch 'irqchip/stacked-tegra' into irqchip/core 2015-04-10 22:57:53 +00:00
Jason Cooper
78223354a6 Merge branch 'irqchip/renesas' into irqchip/core 2015-04-02 23:27:23 +00:00
Andrew Bresticker
5b4e845393 CLOCKSOURCE: mips-gic: Allow GIC clock to be specified in device-tree
As an alternative to the "clock-frequency" property, allow the GIC
timer operating clock to be specified in the device-tree instead.
This is useful on systems which use common clock or where the GIC
is not fixed to a particular frequency and is instead, for example,
derived from the CPU clock.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9309/
2015-04-01 17:22:11 +02:00
Kevin Cernekee
5f7f0317ed IRQCHIP: Add new driver for BCM7038-style level 1 interrupt controllers
This is the main peripheral IRQ controller on the BCM7xxx MIPS chips;
it has the following characteristics:

 - 64 to 160+ level IRQs
 - Atomic set/clear registers
 - Reasonably predictable register layout (N status words, then N
   mask status words, then N mask set words, then N mask clear words)
 - SMP affinity supported on most systems
 - Typically connected to MIPS IRQ 2,3,2,3 on CPUs 0,1,2,3

This driver registers one IRQ domain and one IRQ chip to cover all
instances of the block.  Up to 4 instances of the block may appear, as
it supports 4-way IRQ affinity on BCM7435.

The same block exists on the ARM BCM7xxx chips, but typically the ARM GIC
is used instead.  So this driver is primarily intended for MIPS STB chips.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jaedon.shin@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8844/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-01 17:21:37 +02:00
Kevin Cernekee
7b7230e70e IRQCHIP: bcm7120-l2: Add support for BCM3380-style controllers
These controllers support multiple enable/status pairs (64+ IRQs),
can put the enable/status words at different offsets, and do not
support multiple parent IRQs.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jaedon.shin@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8843/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-01 17:21:37 +02:00
Kevin Cernekee
ca40f1b23d IRQCHIP: bcm7120-l2: Split STB-specific logic into its own function
The BCM7xxx instances of this block (listed in the register manual as
simply "IRQ0") all have the following items in common:

 - brcm,int-map-mask: for routing different bits in the L2 to different
   parent IRQs

 - brcm,int-fwd-mask: for hardwiring certain IRQs to bypass the L2 and
   use dedicated L1 lines

 - one enable/status pair (32 bits only)

Much of the driver code can be shared with BCM3380-style controllers, but
in order to do this cleanly, let's split out the BCM7xxx-specific logic
first.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jaedon.shin@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8842/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-01 17:21:37 +02:00
Geert Uytterhoeven
5593ce64d8 irqchip: renesas-irqc: Add functional clock to bindings
The external IRQ controller has a functional clock, which is used for
power management. Document it.

Fix a typo in the r8a73a4 SoC name while we're at it.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lkml.kernel.org/r/1426704961-27322-4-git-send-email-geert+renesas@glider.be
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-23 09:35:01 +00:00
Marc Zyngier
918d98db8c DT: omap4/5: add binding for the wake-up generator
Add a binding for the OMAP4/5 wake-up generator, which acts as
an interrupt controller feeding into the GIC.

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088629-15377-7-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-15 00:56:08 +00:00
Marc Zyngier
f6f53169ea DT: tegra: add binding for the legacy interrupt controller
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088583-15097-6-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-15 00:40:49 +00:00
Lee Jones
f1f5bc30f5 irqchip: st: Add documentation for STi based syscfg IRQs
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lkml.kernel.org/r/1424272444-16230-4-git-send-email-lee.jones@linaro.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-03 19:50:02 +00:00
Baruch Siach
f848526f37 irqchip: Devicetree: document Conexant Digicolor irq binding
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/505a65c8861e5210d94227bc0eec89cab0593fca.1421317616.git.baruch@tkos.co.il
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-01-26 11:38:23 +01:00
Tony Lindgren
19f92b237b irqchip: omap-intc: Fix support for dm814 and dm816
On dm81xx we have 128 interrupts like am33xx has. Let's add
compatible flags for dm814x and dm816x, and document the
existing binding.

As the dm81xx are booting in device tree only mode, we can now
also remove ti81xx_init_irq() legacy function.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1421187806-6804-2-git-send-email-tony@atomide.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-01-26 11:38:23 +01:00
Magnus Damm
e03f9088e2 irqchip: renesas-intc-irqpin: r8a7779 IRLM setup support
Add r8a7779 specific support for IRLM bit configuration
in the INTC-IRQPIN driver. Without this code we need
special workaround code in arch/arm/mach-shmobile.

The IRLM bit for the INTC hardware exists on various
older SH-based SoCs and is used to select between two
modes for the external interrupt pins IRQ0 to IRQ3:

IRLM = 0: (default from reset on r8a7779)
In this mode the pins IRQ0 to IRQ3 are used together
to give a value between 0 and 15 to the SoC. External
logic is required for masking. This mode is not
supported by the INTC-IRQPIN driver.

IRLM = 1: (needs this patch or configuration elsewhere)
In this mode IRQ0 to IRQ3 operate as 4 individual
external interrupt pins. In this mode the SMSC ethernet
chip can be used via IRQ1 on r8a7779 Marzen. This mode
is the only supported mode by the INTC-IRQPIN driver.

For this patch to work the r8a7779 DTS needs to pass
the ICR0 register as the last register bank.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: horms@verge.net.au
Cc: jason@lakedaemon.net
Link: http://lkml.kernel.org/r/20141203121803.5936.35881.sendpatchset@w520
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-01-26 11:38:22 +01:00
Linus Torvalds
c0222ac086 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 "This is an unusually large pull request for MIPS - in parts because
  lots of patches missed the 3.18 deadline but primarily because some
  folks opened the flood gates.

   - Retire the MIPS-specific phys_t with the generic phys_addr_t.
   - Improvments for the backtrace code used by oprofile.
   - Better backtraces on SMP systems.
   - Cleanups for the Octeon platform code.
   - Cleanups and fixes for the Loongson platform code.
   - Cleanups and fixes to the firmware library.
   - Switch ATH79 platform to use the firmware library.
   - Grand overhault to the SEAD3 and Malta interrupt code.
   - Move the GIC interrupt code to drivers/irqchip
   - Lots of GIC cleanups and updates to the GIC code to use modern IRQ
     infrastructures and features of the kernel.
   - OF documentation updates for the GIC bindings
   - Move GIC clocksource driver to drivers/clocksource
   - Merge GIC clocksource driver with clockevent driver.
   - Further updates to bring the GIC clocksource driver up to date.
   - R3000 TLB code cleanups
   - Improvments to the Loongson 3 platform code.
   - Convert pr_warning to pr_warn.
   - Merge a bunch of small lantiq and ralink fixes that have been
     staged/lingering inside the openwrt tree for a while.
   - Update archhelp for IP22/IP32
   - Fix a number of issues for Loongson 1B.
   - New clocksource and clockevent driver for Loongson 1B.
   - Further work on clk handling for Loongson 1B.
   - Platform work for Broadcom BMIPS.
   - Error handling cleanups for TurboChannel.
   - Fixes and optimization to the microMIPS support.
   - Option to disable the FTLB.
   - Dump more relevant information on machine check exception
   - Change binfmt to allow arch to examine PT_*PROC headers
   - Support for new style FPU register model in O32
   - VDSO randomization.
   - BCM47xx cleanups
   - BCM47xx reimplement the way the kernel accesses NVRAM information.
   - Random cleanups
   - Add support for ATH25 platforms
   - Remove pointless locking code in some PCI platforms.
   - Some improvments to EVA support
   - Minor Alchemy cleanup"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (185 commits)
  MIPS: Add MFHC0 and MTHC0 instructions to uasm.
  MIPS: Cosmetic cleanups of page table headers.
  MIPS: Add CP0 macros for extended EntryLo registers
  MIPS: Remove now unused definition of phys_t.
  MIPS: Replace use of phys_t with phys_addr_t.
  MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BIT
  PCMCIA: Alchemy Don't select 64BIT_PHYS_ADDR in Kconfig.
  MIPS: lib: memset: Clean up some MIPS{EL,EB} ifdefery
  MIPS: iomap: Use __mem_{read,write}{b,w,l} for MMIO
  MIPS: <asm/types.h> fix indentation.
  MAINTAINERS: Add entry for BMIPS multiplatform kernel
  MIPS: Enable VDSO randomization
  MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration
  MIPS: Remove declaration of obsolete arch_init_clk_ops()
  MIPS: atomic.h: Reformat to fit in 79 columns
  MIPS: Apply `.insn' to fixup labels throughout
  MIPS: Fix microMIPS LL/SC immediate offsets
  MIPS: Kconfig: Only allow 32-bit microMIPS builds
  MIPS: signal.c: Fix an invalid cast in ISA mode bit handling
  MIPS: mm: Only build one microassembler that is suitable
  ...
2014-12-11 17:56:37 -08:00